Claims
- 1. A transmitter for use in a geopositioning system, comprising:
- a) a synchronization spreading code generator generating a synchronization code spreading signal;
- b) a data spreading code generator generating a data code spreading signal;
- c) a forward error corrector encoding user data for later error correction at a receive end;
- d) a first modulator being coupled to the data code generator and the forward error corrector and modulating the encoded data on the data code spreading signal to form a data signal;
- e) a first chip filter being coupled to first modulator and filtering the data signal,
- f) a second chip filter being coupled to the synchronization code generator and filtering the synchronization code spreading signal;
- g) a second modulator being coupled to the delay element;
- h) a third modulator being coupled to the second chip filter,
- i) a summer coupled to the second modulator and the third modulator and outputting a combined synchronization and data signal.
- 2. The transmitter according to claim 1, further comprising a delay element being coupled to the first chip filter and delaying one of the data or synchronization signals with respect to the other by one half chip.
- 3. The transmitter according to claim 1, wherein the synchronization and data spreading code generators produce repeated pairs of multilength chip sequences at a predetermined chip rate, and the data spreading sequence is modulated by a supercode at a predetermined data spreading sequence repetition rate.
- 4. The transmitter according to claim 3, wherein the synchronization spreading code generator produces a synchronization spreading sequence that is a multi-chip augmented maximal length pseudo random code, which is formed from a predetermined chip sequence that is augmented by adding a 0 to the predetermined sequence of consecutive 0's.
- 5. The transmitter according to claim 3, wherein the data spreading code generator produces a data spreading sequence that is a multi-chip augmented maximal length pseudo random code, which is formed from a predetermined chip sequence that is augmented by adding a 0 to the predetermined sequence of consecutive 0's.
- 6. The transmitter according to claim 3, wherein the forward error corrector produces a supercode sequence at a predetermined rate of code bits per second from a predetermined data stream, the forward error corrector includes two cascaded coders, a rate 1/3 convolutional coder and a orthogonal block coder, and an output of the forward error corrector is coupled to the first modulator mixed with an output from the data spreading code generator.
- 7. The transmitter according to claim 3, wherein the chip filters each accept digital data at a first data rate and produce interpolated and filtered baseband data at a higher data rate.
- 8. The transmitter according to claim 3, wherein a structure of data packets is different for the forward and reverse links, on the forward link, transmission is continuous and packets follow each other without interruption, whereas on the reverse link, individual units respond in a polled TDMA fashion.
- 9. The transmitter according to claim 1, wherein the third modulator is ninety degrees out of phase relative to the first quadrature modulator.
Parent Case Info
This is a division of U.S. patent application Ser. No. 08/974,839, filed Nov. 20, 1997, now U.S. Pat. No. 5,955,986.
US Referenced Citations (13)
Divisions (1)
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Number |
Date |
Country |
Parent |
974839 |
Nov 1997 |
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