The invention relates to boosted voltage generators, and, more particularly, to a boosted voltage generator with a reduced peak-to-peak ripple.
Charge pumps are widely used for generating a voltage larger than the available supply voltage. These generators are used, for example, in FLASH memory devices for reading or writing memory cells, or also for powering certain electronic circuits at a specified boosted voltage.
Typically, charge pumps include a certain number N of stages connected in cascade and the output voltage VOUT generated by the last stage is a multiple of the supply voltage Vdd according to the following equations:
VOUT=(N+1)·Vdd or VOUT=−N·Vdd
depending on whether the output voltage is positive or negative. Therefore, the number of stages N of a multi-stage charge pump is established as a function of the voltage to be generated.
Commonly, the supply voltage is not constant, but varies in a certain range. To generate a constant voltage VOUT, the charge pump may be provided with a regulation circuit of its output voltage. This regulation circuit compares the output voltage VOUT with a reference voltage and stops switching the stages of the charge pump when the output voltage crosses the reference voltage.
The output voltage so generated is affected by a relevant ripple in correspondence with the nominal output voltage of the charge pump. This ripple, that might even be 1V peak-to-peak in value maybe a significant problem in multi-level FLASH memory devices, and may lead to erroneous operation. Indeed, in multi-level memory devices, a maximum ripple of only a few tens of millivolts is allowed.
Charge pumps are also used for powering linear voltage regulators with a controlled voltage. A ripple of this controlled voltage reduces the precision of voltage regulators particularly when the powered regulators do not have a relatively large PSRR (Power Supply Rejection Ratio).
An object of the invention is to provide a voltage generator that may generate a boosted voltage with a reduced ripple and a method that may reduce the ripple of a boosted voltage.
According to the invention, the output voltage ripple of a single stage or a multi-stage charge pump may significantly be reduced by introducing in the voltage generator a cascode connected output transistor. In operation, this output transistor may always be in a conduction state and may be controlled with a voltage having a smaller ripple than the voltage output by the charge pump.
More precisely, this invention provides a method that may reduce the ripple of a boosted voltage and a relative generator of a boosted voltage, and may comprise a charge pump generating a controlled voltage at the output of the last stage of the charge pump. The generator may generate a boosted voltage with a relatively small ripple by virtue of a cascode connected output transistor, and the current terminals of which may be connected to the output of a stage of the charge pump and to an output node of the generator, respectively, and may have a control node coupled to a voltage, less corrupted by ripple than the controlled voltage, that may maintain the output transistor in a conduction state.
The various features and advantages of the invention will be even more evident through a detailed description of several embodiments referring to the attached drawings, wherein:
A first architecture of a boosted voltage generator is depicted in
The generator is described referring to the case in which the cascode connected output transistor is a MOS transistor, but the same considerations apply with the necessary changes having been made for a BJT transistor. Preferably the charge pump is a multi-stage charge pump and the voltage Vgate is generated by any common node between two stages of the multi-stage charge pump.
If the charge pump generates a positive voltage, the output transistor C
Vout2=Vgate−Vth.
Therefore, the cascode connected output transistor C
If each stage of the charge pump is a voltage doubler, as depicted in
As an alternative, the control voltage Vgate of this output transistor C
If the transistor is symmetrical, the output node of the generator may be the drain or the source terminal of the transistor. By contrast, if the transistor is asymmetrical, the output node of the generator is the source or the drain terminal depending on whether a NMOS or a PMOS is used, respectively.
According to a preferred embodiment, the cascode connected output transistor comprises a natural transistor, which is a transistor with a very small threshold voltage Vth. As stated before, the boosted voltage is given by the following equation
Vout2=Vgate−Vth.
Thus, it is desirable to use a natural transistor if a boosted voltage Vout2 with the largest possible value is desired. Preferably, the cascode connected transistor comprises a high-voltage transistor, because it may withstand voltages larger than the supply voltage of the generator.
According to an alternative embodiment, the current terminal of the output transistor C
A second embodiment of the generator is depicted in
An alternative embodiment to the architecture of
The time diagrams of
Number | Date | Country | Kind |
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05425001.4 | Jan 2005 | EP | regional |