Patent Application
20220317494
The present disclosure relates to the field of display technology, in particular to a low temperature poly-silicon display panel and a manufacturing method of the low temperature poly-silicon display panel, and a liquid crystal display device.
Low temperature poly-silicon (LTPS) display panels have the advantages of high resolution, fast response, high brightness, etc., and have been more widely applied. The LTPS liquid crystal display panel includes an array substrate and a color filter substrate that are opposite to each other, a thin film transistor layer is provided on the array substrate, and a color filter layer and black matrixes are provided on the color filter substrate. However, if a panel with this structure is applied to a curved screen, the relative position of the color filter substrate and the array substrate will be shifted after the color filter substrate and the array substrate are bent. Accordingly, the metal layer in the array substrate is exposed in the opening region defined by the black matrixes on the color filter substrate and thus light leakage of the metal occurs.
So far, limited by the process factors of the LTPS display panel, the color filter on array (COA) technology is difficult to improve the current problem. The possibility of exposing the metal layer to the opening is reduced merely by reducing the area of the opening region.
However, the pixel density of the LTPS display panel is relatively high, and the area of the opening region of a single subpixel is generally small. If the light leakage of the metal is reduced by reducing the area of the opening region, the display of the LTPS display panel will be significantly affected.
In view of this, embodiments of the present disclosure provide a low temperature poly-silicon display panel and a manufacturing method of the low temperature poly-silicon display panel, and a liquid crystal display device, which can effectively improve light leakage of the metal while ensuring that the low temperature poly-silicon display panel has a high display performance.
On the one hand, some embodiments of the present disclosure provide a low temperature poly-silicon display panel. In an embodiment, the low temperature poly-silicon display panel includes an array substrate and an alignment substrate opposite the array substrate, liquid crystals filled between the array substrate and the alignment substrate, a color filter layer provided on the array substrate and located on a side of the source-drain layer facing away from a base substrate, and a light shielding layer configured to define an opening region of the low temperature poly-silicon display panel. In an embodiment, the array substrate includes the base substrate, and a low temperature poly-silicon active layer, a gate layer, and a source-drain layer are sequentially arranged on the base substrate along a light emitting direction. In an embodiment, at least part of the light shielding layer is provided on the array substrate, and the light shielding layer provided on the array substrate is located on the side of the source-drain layer facing away from the base substrate.
On the other hand, some embodiments of the present disclosure provide a manufacturing method of a low temperature poly-silicon display panel for manufacturing the above low temperature poly-silicon display panel. In an embodiment, the manufacturing method includes forming the array substrate, forming the alignment substrate, and oppositely arranging the array substrate and the alignment substrate to form a cell and injecting the liquid crystals between the array substrate and the alignment substrate. In an embodiment, the forming the array substrate includes sequentially forming the low temperature poly-silicon active layer, the gate layer, and the source-drain layer on the base substrate, and forming the color filter layer and the at least part of the light shielding layer on the side of the source-drain layer facing away from the base substrate. In an embodiment, when forming the low temperature poly-silicon active layer, laser annealing is performed on the low temperature poly-silicon active layer at a temperature ranging from 500° C. to 600° C., and when forming the source-drain layer, high-temperature tempering is performed on the source-drain layer at a temperature ranging from 300° C. to 400° C. The light shielding layer is configured to define the opening region of the low temperature poly-silicon display panel.
In another aspect, some embodiments of the present disclosure provide a liquid crystal display device including the above low temperature poly-silicon display panel.
One of the above technical solutions has the following beneficial effects.
In the technical solutions provided by embodiments of the present disclosure, the color filter layer and the at least part of the light shielding layer are disposed on the array substrate. That is, the metal layers on the array substrate, such as the gate layer and the source-drain layer, are located at a same side as the at least part of the light shielding layer. In an embodiment, when the low temperature poly-silicon display panel is bent, the relative positional relationship between the metal layers and this part of the light shielding layer will not be affected by the alignment factors between the array substrate and the alignment substrate. In an embodiment, the metal layers and the light shielding layer that are located in the same region of the array substrate have similar deformation degrees under the same bending force, such that the metal layers in this region are still shielded by the light shielding layer, which reduces the risk of exposure to the opening region, thereby effectively improving the phenomenon of light leakage of the metal. Moreover, compared with the method in the prior art in which the coverage area of the light shielding layer is increased to improve light leakage of the metal, the technical solutions provided by the embodiments of the present disclosure are unnecessary to adjust the coverage area of the light shielding layer, so that the low temperature poly-silicon display panel maintains a higher aperture ratio to have a better display performance.
Moreover, in the manufacturing process of the low temperature poly-silicon display panel, when forming the low temperature poly-silicon active layer, the laser annealing is perform on the low temperature poly-silicon active layer at the temperature ranging from 500° C. to 600° C., and when forming the source-drain layer, the high-temperature tempering is performed on the source-drain layer at the temperature ranging from 300° C. to 400° C. Since the current tolerance temperature of the materials for forming the light shielding layer and the color filter layer is lower than 250° C., in the embodiments of the present disclosure, the color filter layer and the at least part of the light shielding layer are disposed on the side of the source- drain layer facing away from the base substrate, which can perform the high-temperature treatment process required for the low temperature poly-silicon display panels before forming the color filter layer and the light shielding layer. In an embodiment, after the color filter layer and the light shielding layer are formed, it is unnecessary to perform the high-temperature processing, thereby preventing the color filter layer and the light shielding layer from being affected by the high-temperature process, improving the reliability of the arrangement of the color filter layer and the light shielding layer, and further improving the feasibility of integrating the color filter layer and the light shielding layer on the array substrate.
In addition, it should be noted that when only a part of the light shielding layer is provided on the array substrate, and this part of the light shielding layer is also used to define the opening region. Accordingly, in an embodiment, when the low temperature poly-silicon display panel is bent, the alignment stability between this part of the light shielding layer and the metal layers is increased such that the metal layers are still covered by the part of the light shielding layer, which can still reduce the risk of the metal layers being exposed to the opening region to a certain extent and improve the phenomenon of light leakage of the metal.
For the sake of clearly illustrating the technical solutions in the embodiments of the present disclosure, the accompanying drawings used in the embodiments are briefly described below. Obviously, the drawings described below are merely some embodiments of the present disclosure. Those skilled in the art can obtain other drawings without creative efforts.
For the sake of better comprehension of the technical solutions of the present disclosure, the embodiments of the present disclosure are described in details with reference to the drawings.
It should be noted that the described embodiments are merely part of the embodiments of the present disclosure rather than all of the embodiments. Other embodiments obtained by those skilled in the art without creative efforts are within the scope of the present disclosure.
The terms used in the embodiments of the present disclosure are merely for the purpose of describing specific embodiments and not intended to limit the present disclosure thereto. Unless otherwise noted in the context, the singular form expressions “a”, “an”, “the” and “said” used in the embodiments and appended claims of the present disclosure are also intended to represent a plural form.
It should be understood that the term “and/or” as used herein is merely an association describing the associated object, indicating that there may be three relationships. For example, A and/or B may indicate three cases: A alone; A and B; B alone. In addition, a character “/” herein generally indicates that the contextual objects are in an “or” relationship.
It should be understood that although the terms first, second, etc. can be used to describe the insulating layers and the light shielding portions in the embodiments of the present disclosure, these insulating layers and the light shielding portions should not be limited to these terms. These terms are merely used to distinguish the insulating layers and the light shielding portions from each other. For example, without departing from the scope of the embodiments of the present disclosure, the first insulating layer can also be referred to as the second insulating layer, and similarly, the second insulating layer can also be referred to as the first insulating layer.
An embodiment of the present disclosure provides a low temperature poly-silicon display panel, as shown in
In addition, the low temperature poly-silicon display panel further includes a color filter layer 8 and a light shielding layer 9. The color filter layer 8 is provided on the array substrate 1 and located on a side of the source-drain layer 7 facing away from the base substrate 4. The light shielding layer 9 is used to define an opening region 10 of the low temperature poly-silicon display panel, that is, a light-emitting region of the low temperature poly-silicon display panel. At least part of the light shielding layer 9 is provided on the array substrate 1, and the light shielding layer 9 on the array substrate 1 is located on the side of the source-drain layer 7 facing away from the base substrate 4.
It can be understood that each of the array substrate 1 and the alignment substrate 2 is provided with an alignment layer 11 to drive the liquid crystals 3 to flip normally. In addition, spacers 12 are provided between the array substrate 1 and the alignment substrate 2 to stably support the gap. The spacers 12 may be provided on the array substrate 1 or on the alignment substrate 2, which is not limited in the embodiment of the present disclosure.
In the low temperature poly-silicon display panel according to the embodiment of the present disclosure, the color filter layer 8 and at least part of the light shielding layer 9 are disposed on the array substrate 1. That is, the metal layers on the array substrate 1, such as the gate layer 6 and the source-drain layer 7, are located at a same side as the at least part of the light shielding layer 9. When the low temperature poly-silicon display panel is bent, the relative positional relationship between the metal layers and this part of the light shielding layer 9 will not be affected by the alignment factor between the array substrate 1 and the alignment substrate 2. The deformation degrees of the metal layers and the light shielding layer 9 that are located in the same region of the array substrate 1 under the same bending force are similar to each other, such that the metal layers in this region is still shielded by the light shielding layer 9, thereby reducing the risk of being exposed to the opening region 10. Therefore, the phenomenon of light leakage of the metal can be effectively improved. Moreover, compared with the method in the prior art in which the coverage area of the light shielding layer is increased to improve the light leakage of the metal, the technical solution according to the embodiment of the present disclosure is not required to adjust the coverage area of the light shielding layer 9, thereby maintaining a higher aperture ratio of the low temperature poly-silicon display panel to achieve better display performance.
Moreover, in the process of the low temperature poly-silicon display panel, when forming the low temperature poly-silicon active layer 5, it is required to perform laser annealing on the low temperature poly-silicon active layer 5 at a temperature ranging from 500° C. to 600° C., and when forming the source-drain layer 7, it is required to perform high temperature tempering on the source-drain layer 7 at a temperature ranging from 300° C. to 400° C. Since the current tolerance temperature of the materials for forming the light shielding layer 9 and the color filter layer 8 is lower than 250° C., in some embodiments of the present disclosure, the color filter layer 8 and at least part of the light shielding layer 9 are arranged on the side of the source-drain layer 7 facing away from the base substrate 4, which can perform the high-temperature treatment process required for the low temperature poly-silicon display panels before forming the color filter layer 8 and the light shielding layer 9. After the color filter layer 8 and the light shielding layer 9 are formed, the high-temperature processing is not required, thereby preventing the color filter layer 8 and the light shielding layer 9 from being affected by the high-temperature process, improving the reliability of the arrangement of the color filter layer 8 and the light shielding layer 9, and further improving the feasibility of integrating the color filter layer 8 and the light shielding layer 9 on the array substrate 1.
In addition, it should be noted that when only a part of the light shielding layer 9 is provided on the array substrate 1, this part of the light shielding layer 9 is also used to define the opening region 10. Accordingly, when the low temperature poly-silicon display panel is bent, the alignment stability between this part of the light shielding layer 9 and the metal layers is increased, so that the metal layers are still covered by this part of the light shielding layer 9, which can still reduce the risk of the metal layers being exposed to the opening region 10 to a certain extent, and improve the phenomenon of light leakage of the metal.
Optionally, referring to
Optionally, in conjunction with
An upper surface of the planarization layer 13 away from the base substrate 4 is a relatively flat surface in order to effectively achieve planarization. When the light shielding layer 9 is arranged on the side of the planarization layer 13 facing away from the base substrate 4, for example, the light shielding layer 9 is located on the upper surface of the planarization layer 13. When the light shielding layer 9 is formed, the entire upper surface of the planarization layer 13 is coated with a light shielding material, such as a black resin material, to form an entire layer of light shielding layer having a relative flat surface. It is difficult to align the mask with the light shielding layer in the subsequent exposure, and it is difficult to etch the light shielding layer to form the opening region 10. However, in the embodiments of the present disclosure, there is a height difference between a position of the at least one groove 16 and the surrounding position by providing the at least one groove 16 on a part of the planarization layer 13 located in the non-display region 15. In the subsequence process of coating with the light shielding material to form the light shielding layer, the light shielding layer will be recessed downwards at the at least one groove 16, such that the light shielding layer will form a grayscale difference between the position of the at least one groove 16 and the surrounding position. When the mask is aligned, the formed grayscale difference is an alignment mark, which achieves accurate alignment and improves the accuracy of etching, thereby improving the accuracy of the position of the opening region 10.
Moreover, compared with other layers on the array substrate 1, the planarization layer 13 has a larger thickness. Therefore, the at least one groove 16 is provided on the planarization layer 13. The height difference between the position of the at least one groove 16 and the surrounding position is relatively large. After subsequently coating with the light shielding material to form the light shielding layer, the greyscale difference between the position of the at least one groove 16 and the surrounding position is more significant, and thus can be better recognized.
In addition, refer to
In view of the above, at least part of the light shielding layer 9 is located on a side of each of the pixel electrodes 21 facing away from the base substrate 4. As a result, on the premise that the light leakage of the metal is effectively improved and the low temperature poly-silicon display panel maintains a high aperture ratio, when forming the light shielding layer 9, the process of forming the light shielding layer 9 is required merely after the pixel electrodes 21 are formed, and the original process of the array substrate 1 will not be greatly affected.
In addition, the vias are provided in the layers on the side of the planarization layer 13 facing away from the base substrate 4 such that the small molecules in the color filter layer 8 and other organic layers, which are not completely volatilized, are volatilized through the vias in the subsequent manufacturing process, thereby avoiding that small molecules remains in the panel and thus affect the working stability of the panel.
Further, referring to
In view of the above, refer to
With the above configuration, under the premise of effectively improving light leakage of the metal and keeping the low temperature poly-silicon display panel with a high aperture ratio, on the one hand, the light shielding layer 9 is located on the side of each of the touch signal lines 17 facing away from the base substrate 4, and besides shielding the source-drain layer 7, the gate layer 6, and other metal layers, the light shielding layer 9 also shields the touch signal lines 17, thereby greatly reducing the risk of the metal being visitable. On the other hand, the light shielding layer 9 may also increase the distance between the pixel electrodes 21 and other metal layers, such as the touch signal lines 17, the source-drain layer 7, and the gate layer 6, and also increase the distance between the common electrode 19 and these other metal layers, thereby reducing the coupling capacitance between the pixel electrodes 21 and other metal layers and the coupling capacitance between the common electrode 19 and other metal layers, and further reducing power consumption.
In view of the above, refer to
With the above configuration, under the premise of effectively improving light leakage of the metal and keeping the low temperature poly-silicon display panel with a high aperture ratio, on the one hand, the light shielding layer 9 is relatively close to the planarization layer 13. In particular, when the light shielding layer 9 is located between the touch signal lines 17 and the planarization layer 13, the light shielding layer 9 is directly arranged on a surface of the planarization layer 13. With reference to
Optionally, referring to
Further, refer to
For a color filter 28 of a certain color, the color filter 28 only allows light within a wavelength range corresponding to the light of this color to be emitted. For example, a red color filter only emits red light within a wavelength range from 625 nm to 740 nm. When the color filter 28 of one color is superimposed on the color filter 28 of another color, since the light of the two colors corresponds to different wavelength ranges, the light emitted through the color filter 28 of the one color cannot be further emitted from the color filter 28 of the another color, thereby achieving a light shielding effect. The overlapped portions of the color filters 28 of different colors are reused as the second light shielding portion 27 such that additional process is not required to form the second light shielding potion 27, which simplifies the manufacturing process, reduces the manufacturing cost, and also reduces the thickness of the low temperature poly-silicon display.
The first light shielding portion 26 and the second light shielding portion 27 are both arranged on the array substrate 1, that is, the entire light shielding layer 9 in the opening region 10 is defined to be arranged on the same side as the metal layers. When the low temperature poly-silicon display panel is bent, the relative positional relationship between the metal layers and the entire light shielding layer 9 will not be affected by the alignment factor between the array substrate 1 and the alignment substrate 2, thereby further improving the phenomenon of light leakage of the metal.
Since the opening region 10 is defined by the first light shielding portion 26 and the second light shielding portion 27, the second light shielding portion 27 is arranged on the array substrate 1. When the low temperature poly-silicon display panel is bent, the metal layers may still be shielded by the second light shielding portion 27, which is also capable of reducing the risk of the metal layers being exposed in the opening region 10.
In addition, in some embodiments of the present disclosure, after the color filter layer 8 and/or the light shielding layer 9 are integrated and disposed on the array substrate 1, the distance between the source-drain layer 7 and each of the pixel electrodes 21 is increased. When the pixel electrodes 21 are electrically connected to the source-drain layer 7 through the via, the depth of the via is larger and the process is more difficult. Therefore, as shown in
Some embodiments of the present disclosure also provide a manufacturing method of the low temperature poly-silicon display panel. The manufacturing method is used to manufacture the above-mentioned low temperature poly-silicon display panel. With reference to
In a step S1, the array substrate 1 is formed. The process of forming the array substrate 1 includes forming the low temperature poly-silicon active layer 5, the gate layer 6 and the source-drain layer 7 in sequence on the base substrate 4. When forming the low temperature poly-silicon active layer 5, laser annealing is performed on the low temperature poly-silicon active layer 5 at a temperature ranging from 500° C. to 600° C., and when forming the source-drain layer 7, high-temperature tempering is performed on the source-drain layer 7 at a temperature ranging from 300° C. to 400° C. The color filter layer 8 and at least part of the light shielding layer 9 are formed on the side of the source-drain layer 7 facing away from the base substrate 4, and the light shielding layer 9 is used to define the opening region 10 of the low temperature poly-silicon display panel.
It should be noted that when the gate layer 6 is formed, tempering may be selectively performed on the gate layer 6 in accordance with the material for forming the gate layer 6. For example, if the metal material for forming the gate layer 6 has a poor electrical conductivity, high-temperature tempering is performed on the gate layer 6 at a temperature ranging from 300° C. to 400° C. to enhance the electrical conductivity of the gate layer 6; and if the metal material for forming the gate layer 6 has a strong electrical conductivity, there is unnecessary to perform the high-temperature tempering.
In a step S2, the alignment substrate 2 is formed.
In a step S3, the array substrate 1 and the alignment substrate 2 are oppositely arranged, and the liquid crystals 3 are injected between the array substrate 1 and the alignment substrate 2.
In the technical solutions according to the embodiments of the present disclosure, the metal layers on the array substrate 1, such as the gate layer 6 and the source-drain layer 7, are located at a same side as the light shielding layer 9. When the low temperature poly-silicon display panel is bent, the relative positional relationship between the metal layers and this part of the light shielding layer 9 will not be affected by the alignment factors between the array substrate 1 and the alignment substrate 2. The metal layers and the light shielding layer 9 that are located in the same region of the array substrate 1 have similar deformation degrees under the same bending force, such that the metal layers in this region are still shielded by the light shielding layer 9, reducing the risk of the metal layers being exposed in the opening region 10, thereby effectively improving the phenomenon of light leakage of the metal. Moreover, with the technical solutions according to the embodiments of the present disclosure, the coverage area of the light shielding layer 9 is not required to be adjusted, so that the low temperature poly-silicon display panel still maintains a relatively high aperture ratio and has a better display performance.
Moreover, in some embodiments of the present disclosure, the color filter layer 8 and at least part of the light shielding layer 9 are arranged on the side of the source-drain layer 7 facing away from the base substrate 4, such that the process flow of the high-temperature processing required for the low temperature poly-silicon display panel is performed before forming the color filter layer 8 and the light shielding layer 9. After the color filter layer 8 and the light shielding layer 9 are formed, it is unnecessary to perform high-temperature treatment, thereby preventing the color filter layer 8 and the light shielding layer 9 from being affected by high temperature factors. Therefore, the reliability of the arrangement of the color filter layer 8 and the light shielding layer 9 is improved, and the feasibility of integrating the color filter layer 8 and the light shielding layer 9 on the array substrate 1 is improved.
Optionally, in conjunction with
Optionally, in conjunction with
Moreover, compared with other layers on the array substrate 1, the planarization layer 13 has a relatively large thickness. Therefore, the at least one groove 16 is provided on the planarization layer 13 such that the height difference between the position of the at least one groove 16 and the surrounding position is larger. After coating with the light shielding material subsequently to form the light shielding layer, the grayscale difference between the position of the at least one groove 16 and the surrounding position is more significant and thus is easier to be recognized.
step K1: forming the touch signal lines 17 on the side of the planarization layer 13 facing away from the base substrate 4;
step K2: forming the first insulating layer 18 on the side of the touch signal lines 17 facing away from the base substrate 4;
step K3: forming the common electrode 19 on the side of the first insulating layer 18 facing away from the base substrate 4, wherein the common electrode 19 is reused as touch electrodes and electrically connected to the touch signal lines 17;
step K4: forming the second insulating layer 20 on the side of the common electrode 19 facing away from the base substrate 4; and
step K5, forming pixel electrodes 21 on the side of the second insulating layer 20 facing away from the base substrate 4.
In view of the above, the process of forming at least part of the light shielding layer 9 on the side of the planarization layer 13 facing away from the base substrate 4 includes forming the at least part of the light shielding layer 9 on the side of each of the pixel electrodes 21 facing away from the base substrate 4. In this way, under the premise of effectively improving light leakage of the metal and keeping the low temperature poly-silicon display panel with a high aperture ratio, when forming the light shielding layer 9, the process of forming the light shielding layer 9 is required only after forming the pixel electrodes 21, and the original process of the array substrate 1 will not be greatly affected.
Further, in conjunction with
The vias are formed on the layers located on the side of the light shielding layer 9 facing toward the base substrate 4 such that when coating with the light shielding material to form the light shielding layer 9, a part of the light shielding material sinks into the vias. In this way, the layer thickness of the light shielding layer 9 formed by the light shielding material is reduced to avoid large undulation of the upper surface of the array substrate due to the excessive large thickness of the light shielding layer 9, which is beneficial to the subsequent coating and alignment of the alignment layer 11. In addition, it is also beneficial for the small molecular substances that are not completely volatilized in the organic layer such as the color filter layer 8 to be further volatilized through the vias in the subsequent manufacturing process, so as to prevent the small molecular substances from remaining in the panel and affecting the working stability of the panel.
Further, with reference to
Optionally, referring to
step Kl: forming the touch signal lines 17 on the side of the planarization layer 13 facing away from the base substrate 4;
step K2: forming the first insulating layer 18 on the side of each of the touch signal lines 17 facing away from the base substrate 4;
step K3: forming the common electrode 19 on the side of the first insulating layer 18 facing away from the base substrate 4, wherein the common electrode 19 is reused as touch electrodes and electrically connected to the touch signal lines 17;
step K4: forming the second insulating layer 20 on the side of the common electrode 19 facing away from the base substrate 4; and
step K5: forming the pixel electrodes 21 on the side of the second insulating layer 20 facing away from the base substrate 4.
In view of the above, the process of forming the at least part of the light shielding layer 9 on the side of the planarization layer 13 facing away from the base substrate 4 includes: in conjunction with
Alternatively, the process of forming the at least part of the light shielding layer 9 on the side of the planarization layer 13 facing away from the base substrate 4 includes: in conjunction with
Optionally, in conjunction with
Optionally, with reference to
Some embodiments of the present disclosure further provide a liquid crystal display device including the above-mentioned low temperature poly-silicon display panel. Specifically, the liquid crystal display device may be an electronic display device such as a vehicular display screen, a mobile phone, a computer, or a TV. When the liquid crystal display device is used as the vehicular display screen, it is applicable in vehicles, such as cars, ships, or airplanes. For example, the liquid crystal display device is applied to a car, as shown in
Since the liquid crystal display device 100 according to the embodiments of the present disclosure includes the aforementioned low temperature poly-silicon display panel 200, the liquid crystal display device 100 functions to effectively improve the light leakage of the metal while maintaining a high aperture ratio, the color filter layer 8 and the light shielding layer 9 can also be prevented from being affected by the high-temperature process. Accordingly, the reliability of the arrangement of the color filter layer 8 and the light shielding layer 9 and further improves the feasibility of integrating the color filter layer 8 and the light shielding layer 9 on the array substrate 1.
The above description only illustrates preferred embodiments of the present disclosure and is not intended to limit the present disclosure thereto. Any modification, equivalent replacement, improvement, and so on can be made by those skilled in the art within the spirit and principle of the present disclosure and should fall within the scope of the present disclosure.
Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, but not to limit thereto. Although the present disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that the technical solutions described in the foregoing embodiments may be modified or some or all of the technical features may be equivalently replaced. The essence of technical solutions corresponding to these modifications or replacements do not deviate from the scope of the technical solutions of the embodiments of the present disclosure.
| Number | Date | Country | Kind |
|---|---|---|---|
| 202010259097.3 | Apr 2020 | CN | national |
The present application is a U.S. national stage application of International Patent Application No. PCT/CN2020/091096, filed May 19, 2020, which claims priority to Chinese Patent Application No. 202010259097.3, titled “LOW TEMPERATURE POLY-SILICON DISPLAY PANEL, MANUFACTURING METHOD THEREFOR, AND LIQUID CRYSTAL DISPLAY DEVICE” and filed on Apr. 3, 2020, the content of which is incorporated by reference in its entirety.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/CN2020/091096 | 5/19/2020 | WO |
