Patent Grant
10865497
An aspect of the disclosure relates to a manufacturing method of a mask used when particles are vapor-deposited onto a display device during manufacture.
In the manufacture of a display device, in order to vapor-deposit particles for forming light-emitting elements, each corresponding to a subpixel, a mask (also referred to as a “metal mask”) including a plurality of openings corresponding to the subpixels has been used. The openings of this mask are manufactured using an etching method or an electrolytic casting method (plating method). When an etching method is used, the mask can be manufactured at low cost, but it is difficult to form the openings at high resolution. On the other hand, when a plating method is used, the cost is higher than when an etching method is used, but there is a high degree of freedom in a pattern design of the openings. Thus, in the formation of openings, much focus is being placed on the plating method. In PTL 1, for example, there is disclosed a manufacturing method of a mask that uses such a plating method.
PTL 1: JP 2016-100296 A (published May 30, 2016).
Nevertheless, in PTL 1, there is no mention of the type of plating method used when the openings are formed. Therefore, in PTL 1, due to the shapes of the openings formed in the mask, the particles are not uniformly vapor-deposited onto the display device during manufacture, and a shadow (step in film thickness) is formed on an end side of each of the openings. In this case, in a light-emitting element in which the particles are not uniformly vapor-deposited, defects such as color unevenness occur during light emission.
According to an aspect of the disclosure, an object of the disclosure is to achieve a manufacturing method of a mask capable of vapor-depositing particles within a plane of a light-emitting element in a substantially uniform manner.
To solve the problems described above, a manufacturing method of a mask according to an aspect of the disclosure is a manufacturing method of a mask used when particles are vapor-deposited onto a display device during manufacture, the manufacturing method including a film formation step for forming a metal layer including a plurality of openings on a mask substrate, and a shaping step for shaping the metal layer using pulse electrolysis.
According to an aspect of the disclosure, an advantage of making it possible to vapor-deposit particles within a plane of a light-emitting element in a substantially uniform manner is achieved.
For example, when the display device 2, being a flexible display, is manufactured, first, a resin layer 12 is formed on a light-transmissive support substrate (for example, a mother glass substrate; not illustrated) as illustrated in
Examples of the material of the resin layer 12 include a polyimide. Examples of the material used in the lower face film 10 include polyethylene terephthalate (PET).
The barrier layer 3 is a layer for preventing foreign matters such as water and oxygen from penetrating into the TFT layer 4 and the light-emitting element layer 5 during usage of the display device 2. The barrier layer 3 may include, for example, a silicon oxide (SiOx) film, a silicon nitride film (SiNx), a silicon oxynitride film (SiOxNy), or a layered film of these, formed using chemical vapor deposition (CVD).
The TFT layer 4 includes a semiconductor film 15, an inorganic insulating film 16 (a gate insulating film) as an upper layer of the semiconductor film 15, a gate electrode GE as an upper layer of the inorganic insulating film 16, an inorganic insulating film 18 as an upper layer of the gate electrode GE, a capacity wiring line CE as an upper layer of the inorganic insulating film 18, an inorganic insulating film 20 as an upper layer of the capacity wiring line CE, a source wiring line SH as an upper layer of the inorganic insulating film 20, and a flattening film 21 as an upper layer of the source wiring line SH.
A thin film transistor (TFT) Tr includes the semiconductor film 15, the inorganic insulating film 16 (the gate insulating film), and the gate electrode GE.
The semiconductor film 15 is made of a low-temperature polysilicon (LTPS) or an oxide semiconductor, for example. Note that
The gate electrode GE, the capacitance electrode CE, and the source wiring line SH are each composed of a single layer film or a layered film of a metal, for example. The metal includes at least one of aluminum (Al), tungsten (W), molybdenum (Mo), tantalum (Ta), chromium (Cr), titanium (Ti), and copper (Cu), for example.
The inorganic insulating films 16, 18, and 20 may include a silicon oxide film, a silicon nitride film, or a layered film of these, formed using CVD. The flattening film (interlayer insulating film) 21 may include, for example, a coatable photosensitive organic material, such as a polyimide, an acrylic, or the like.
The light-emitting element layer 5 (for example, OLED layer) includes an anode (anode electrode) 22 as an upper layer of the flattering film 21, an anode cover film 23 configured to cover an edge of the anode 22, an electroluminescence (EL) layer 24 as an upper layer of the anode 22, and a cathode (cathode electrode) 25 as an upper layer of the EL layer 24. In the light-emitting element layer 5, (i) a light-emitting element (for example, OLED) including the anode 22 having an island shape, the EL layer 24 having an island shape, and the cathode (cathode electrode) 25, and (ii) a subpixel circuit configured to drive the light-emitting element are provided on a subpixel-by-subpixel basis.
The anode cover film 23 is an organic insulating film. The anode cover film 23 is formed by, for example, applying a photosensitive organic material (example: a polyimide, an acrylic, or the like), and then patterning the photosensitive organic material by photolithography.
The EL layer 24 is formed by, for example, layering a hole transport layer, a light-emitting layer, and an electron transport layer in this order from the lower layer side. The light-emitting layer is formed into an island shape on a subpixel-by-subpixel basis by vapor deposition or an ink-jet method. The hole transport layer and the electron transport layer may be formed into island shapes on a subpixel-by-subpixel basis. Or, the hole transport layer and the electron transport layer may be formed into solid-like shapes as a common layer of a plurality of subpixels.
The anode 22 is formed by, for example, the layering of indium tin oxide (ITO) and an alloy containing Ag. The anode 22 has light reflectivity. The cathode 25 may include a light-transmissive conductive material such as ITO and indium zinc oxide (IZO).
When the light-emitting element layer 5 is the OLED layer, positive holes and electrons are recombined inside the EL layer 24 by a drive current between the anode 22 and the cathode 25. Light is emitted as a result of excitons that are generated by the recombination falling into a ground state. In the display device 2, since the cathode 25 is light-transmissive and the anode 22 is light-reflective, the light emitted from the EL layer 24 travels upwards. Thus, the display device 2 may be configured as a top-emitting type device.
The sealing layer 6 includes an inorganic sealing film 26 as an upper layer of the cathode 25, an organic sealing film 27 as an upper layer of the inorganic sealing film 26, and an inorganic sealing film 28 as an upper layer of the organic sealing film 27. The sealing layer 6 prevents foreign matters (examples: water, oxygen, and the like) from penetrating into an interior of the light-emitting element layer 5. The inorganic sealing films 26 and 28 may be made of a silicon oxide film, a silicon nitride film, a silicon oxynitride film, or a layered film of these, formed by CVD, for example. The organic sealing film 27 may be made of a coatable photosensitive organic material (example: a polyimide, an acrylic, or the like) on an upper face of the inorganic sealing film 26.
The lower face film 10 is bonded to the lower face of the resin layer 12 after the support substrate has been peeled off. With the lower face film 10, the display device 2 having excellent flexibility can be achieved. Examples of the material used in the lower face film 10 include PET. The function film 39 includes a predetermined function (examples: an optical compensation function, a touch sensor function, a protection function, or the like).
The above has described a case where the display device 2 is manufactured as a flexible display. However, when the display device 2 is manufactured as a non-flexible display, replacement of the support substrate or the like is not required. Thus, for example, the flow transitions from S5 to S10 in
In S4 described above, the light-emitting element layer 5 may be formed using a vapor deposition mask 220 (refer to
Next, particles Z (for example, an organic light-emitting material) vaporized or sublimated by a vapor deposition source 70 are vapor-deposited onto the TFT substrate 43 over the mask sheet 300. Thus, a vapor deposition pattern is formed in a pattern corresponding to the openings of the mask sheet 300.
Note that, in
In
The mask sheet 300 is aligned with the frame 212. Specifically, the mask sheet 300 is aligned so that a position of the openings 304 in the valid portion YA aligns with a pixel area (light-emitting area) of the TFT substrate 43. The valid portions YA each correspond to a single display region DA of the display device 2 (example: OLED panel).
That is, the particles Z emitted from the vapor deposition source 70 are vapor-deposited onto the display region DA through the openings 304. An edge portion of the mask sheet 300 overlaps with the non-display region NA. The particles Z are blocked by the edge portion, and do not reach the non-display region NA.
The manufacturing method of the mask sheet 300 according to the present embodiment, which is used when the particles Z are vapor-deposited onto the display device 2 during manufacture, will now be described with reference to
First, the pulse electrolysis used in the manufacturing method of the mask sheet 300 will be described.
Examples of the plating method described above include direct current electrolysis and pulse electrolysis. Direct current electrolysis is a method for forming a metal layer (forming a metal film) on a substrate by establishing a substrate to be plated (deposition target) as a cathode electrode, and introducing electric current from an anode electrode to the cathode electrode. That is, in direct current electrolysis, the direction in which the current flows is constant, and the substrate to be plated functions as the cathode electrode.
On the other hand, pulse electrolysis is, for example, a pulse plating method for forming a metal layer on a substrate by repeatedly applying (on-time) and stopping (off-time) current, or a periodic reverse (PR) plating method for forming a metal layer on a substrate by periodically changing the direction in which the current flows. This pulse electrolysis is, for example, applied to a technology in which a through-hole such as a through silicon via (TSV) is filled with copper. Note that, in the following, descriptions are made with the PR plating method as the method of pulse electrolysis, using
As illustrated in
As illustrated in
On the other hand, as illustrated in
Thus, with pulse electrolysis, the substrate to be plated can be switched to a cathode electrode or an anode electrode by switching the forward current and the reverse current (that is, switching the direction in which the current flows). Specifically, when the substrate functions as a cathode electrode, the metal in the solution 200 is deposited onto the substrate, and when the substrate functions as an anode electrode, the metal deposited onto the substrate is dissolved. Thus, with pulse electrolysis, the metal layer is deposited onto the substrate by repeatedly depositing and dissolving the metal on the substrate.
In the manufacturing method of the mask sheet 300 of the present embodiment, pulse electrolysis is used in addition to direct current electrolysis. In at least the direct current electrolysis, a mask substrate 301 (mask substrate 301 for forming metal layers 302a and 302b) for manufacturing the mask sheet 300 to be plated is made to function as a cathode electrode. The metal layer 302a is repeatedly deposited and dissolved on the mask substrate 301 on which the metal layer 302a was formed using direct current electrolysis, by further using pulse electrolysis. Note that, in the present embodiment, descriptions are made with the PR plating method as the method of pulse electrolysis.
In the following, a specific example of the manufacturing method of the mask sheet 300 will be described using
The mask substrate 301 is prepared for manufacturing the mask sheet 300 as illustrated in
Next, as illustrated in
After formation of the resist layer 303, a space 303s (space portion) for forming the metal layer 302a (ultimately, the metal layer 302b) included in the mask sheet 300 is formed in the resist layer 303, as illustrated in
The space 303s is formed using, for example, photolithography. That is, to form the space 303s in the resist layer 303 (in other words, to form the plurality of openings 304 having a predetermined pattern), a portion (portion where the space 303s is to be formed) of the resist layer 303 other than the predetermined pattern is irradiated (exposed) with light or an electron beam to change a solubility of the portion, and the resist layer 303 after exposure is developed. As a result, the resist of the portion is removed, and the space 303s is formed in the portion.
That is, at least the two steps illustrated in
Next, as illustrated in
The metal layer 302a is made of the same type of metal as the metal layer 302. In the present embodiment, to form the metal layer 302a on the mask substrate 301, an iron-nickel alloy plating solution (a plating solution that includes iron in a plating solution that includes nickel (nickel plating solution)) is used, for example, as the solution 200. This iron-nickel alloy plating solution is a solution having a pH of from 2.3 to 3.5, inclusive, for example. Furthermore, a temperature when the metal layer 302a is formed by direct current electrolysis is, for example, 50° C. Furthermore, compositions of the iron-nickel alloy plating solution, and an example of a molar concentration of each composition are as follows.
Note that sodium saccharinate as well as about the same amount of naphthalenedisulfonic acid sodium can be used as a brightening agent in a surface conditioner. Furthermore, to level a front face of the metal layer 302a, butanediol or propargyl alcohol may be added and level adjustment carried out.
Furthermore, the solution 200 is not limited to the iron-nickel alloy plating solution, and may be, for example, a nickel plating solution or a cobalt (CO)-nickel alloy plating solution (a plating solution obtained by adding cobalt to a nickel plating solution).
Furthermore, the current density when the metal layer 302a is formed using direct current electrolysis is constant, as illustrated in
A thickness of the portion of the metal layer 302a that is formed using direct current electrolysis (a thickness of the portion that does not include the metal layer 302 formed in
After the metal layer 302a is formed to the thickness described above, the mask substrate 301 on which the metal layer 302a is formed is removed from the solution 200. Then, as illustrated in
That is, at least the two steps illustrated in
At this time, when the mask substrate 301 is peeled from the metal layer 302a, a mask sheet 1000 (refer to
Specifically, as illustrated in
The rectifier 103, as illustrated in
As a result, the metal layer 302a that includes the openings 304 that are not tapered (θ=0°) and is illustrated in
Note that the first electrode 101 may also be referred to as an electrode on the side where the metal layer 302a is shaped in the shaping step. Furthermore, the formed angle described above can also be referred to as the angle formed on the opening 304 side by the TFT substrate 43 (refer to
When pulse electrolysis is used, the first electrode 101 functions as a cathode electrode in the same way as direct current electrolysis when a forward current flows. As a result, the metal layer 302a grows in a direction away from the mask substrate 301 (to the facing electrode (second electrode 102) side).
When a reverse current flows, the first electrode 101 functions as an anode electrode. As a result, as illustrated in
Thus, the directions of growth of the metal layer 302a differ depending on whether a forward current or a reverse current is applied. Specifically, the opening 304 can be formed into a tapered shape by making the current density of the reverse current greater than the current density of the forward current.
In this case, in locations where lines of electric force readily concentrate in the metal layer 302a (on the side close to the facing electrode, that is, in locations where current density is high), dissolving takes priority over deposition. Furthermore, on the side surface side of the metal layer 302a, the metal layer 302a hardly dissolves in locations where the lines of electric force hardly concentrate (on the side away from the facing electrode, that is, in locations where current density is low). That is, on the side surface of the metal layer 302a, the deposited metal layer is less likely to dissolve as the distance from the facing electrode increases (as the distance to the mask substrate 301 side decreases), and thus film formation in the side surface direction continues by repeated application of a forward current and a reverse current.
In the present embodiment, the current density of the reverse current, for example, is set to from two times to eight times, inclusive, the current density of the forward current. That is, (Current density of forward current):(Current density of reverse current) is set to from 1:2 to 1:8, inclusive.
Furthermore, given a forward time as time when the forward current is flowing and a reverse time as a time when the reverse current is flowing, the reverse time is preferably set shorter than the forward time. For example, the reverse time is set to from 1/20 to 1/10, inclusive, of the forward time. For example, when the forward time per application is set to 80 ms, the reverse time per application is set to from 4 ms to 8 ms, inclusive.
Consider a case where the forward time and the reverse time are set to 4 ms and 80 ms, respectively, under conditions in which the current densities of the forward current and the reverse current are the same as when the forward time and the reverse time are set as described above. In this case, the dissolved amount even on the side surface side of the metal layer 302 (particularly, the side close to the mask substrate 301) increases, causing the deposited amount of the metal to be insufficient, and a taper not to form on the side surface side. As a result, to suppress film formation on the side close to the facing electrode (the side having a high current density) and continue deposition of the metal on the side away from the facing electrode (the side having a low current density), it is preferable to set the forward time longer than the reverse time.
In the example in
Note that the formed angle described above is sufficient as long as the particles Z are vapor-deposited substantially uniformly onto the TFT substrate 43 via the openings 304. Furthermore, a degree of deformation of the metal layer 302a is sufficient as long as the formed angle is satisfied and the metal layer 302b does not block the openings 304 (the function of the mask sheet 300 is not lost).
To achieve such formation of the openings 304, various conditions are set in the shaping step using pulse electrolysis. Examples of the various conditions include (1) the composition, pH, or temperature of the solution 200, (2) the above-described ratio of the forward current to the reverse current, (3) the above-described ratio of the forward time to the reverse time, (4) the total processing time of the shaping step. Based on this condition setting, a level of decrease from the thickness of the metal layer 302a to the thickness of the metal layer 302b (a decrease rate of the thickness of the metal layer 302a), a growth rate of the metal layer 302a to the side surface side (example: a maximum growth rate of the metal layer 302a on the bottom face side), and the like are determined. That is, such a formed angle and degree of deformation of the metal layer 302 as described above are achieved, and thus the openings 304 are formed into tapered shapes.
After the metal layer 302b is formed in the shaping step, the mask substrate 301 is peeled from the metal layer 302b, thereby completing the mask sheet 300 including the metal layer 302b provided with the plurality of openings 304, as illustrated in
The advantageous effects of the manufacturing method of the mask sheet 300 will be described using
As illustrated in
As illustrated in
In particular, under present circumstances where miniaturization of the subpixels (pixel area) has advanced, the demand for miniaturization of the openings 1004 is high. Accordingly, the openings 1004 cannot be sufficiently enlarged with respect to the region where the particles Z are to be vapor-deposited onto the TFT substrate 43 (that is, the region where the EL layer 24 having an island shape is to be formed). Therefore, when the formed angle described above is substantially orthogonal, vapor deposition of the particles Z onto the region Ar is obstructed, and a cross-sectional shape of the EL layer 24 having an island shape readily becomes substantially trapezoidal. Note that the region in the shadow of the side surface described above where vapor deposition is blocked is also referred to as a mask shadow.
As a result of the vapor deposition of the particles Z onto the region Ar being obstructed as described above, the thickness of the EL layer 24 having an island shape differs at a center portion and a peripheral portion in the subpixels corresponding to the openings 1004. Specifically, the peripheral portion of the EL layer 24 having an island shape becomes thinner than the center portion, and the particles Z are not vapor-deposited in the peripheral portion as illustrated in
On the other hand, in the manufacturing method of the mask sheet 300 of the present embodiment, the metal layer 302b provided with the openings 304 formed into tapered shapes (θ>0°) as illustrated in
As a result, the particles Z can also be vapor-deposited in the region Ar, which can become a mask shadow, making it possible to vapor-deposit the particles Z onto the TFT substrate 43 substantially uniformly. Thus, the EL layer 24 can be formed so that the thickness of the EL layer 24 is substantially uniform in the center portion and the peripheral portion. That is, the EL layer 24 can be formed with favorable precision. As a result, the occurrence of defects such as color unevenness described above can be avoided during light emission by the EL layer 24.
The mask sheet 300 is manufactured using a manufacturing method including at least a film formation step and a shaping step. Specifically, the mask sheet 300 includes the metal layer 302b provided with the plurality of openings 304 having tapered shapes.
Furthermore, the manufacturing method of the display device 2 includes a vapor deposition step for vapor-depositing the particles Z onto the TFT substrate 43 using the mask sheet 300 manufactured by the manufacturing method described above (the mask sheet 300 including the metal layer 302b).
Thus, the particles Z can be vapor-deposited onto the TFT substrate 43 with favorable precision by using the mask sheet 300 in the vapor deposition step. As a result, the display device 2 including the EL layer 24 having a substantially uniform thickness can be manufactured. That is, the display device 2 excluding the above-described defects can be manufactured.
Note that, while the steps illustrated in
Furthermore, while the PR plating method is used for the pulse electrolysis in the shaping step illustrated in
A description follows regarding another embodiment of the disclosure, with reference to
In the first embodiment, as illustrated in
In the following, a specific example of the manufacturing method of the mask sheet 300 of the present embodiment will be described using
The steps illustrated in
After formation of the resist layer 305, as illustrated in
The resist layer 305 (the resist layer 305 having an island shape) that remains in the predetermined region after the above-described process functions as a suppression portion that suppresses expansion of the metal layer 302a into the predetermined region in the shaping step, which is the subsequent step. That is, the step illustrated in
In a state when the resist layer 305 having an island shape remains in the openings 304, the metal layer 302a is shaped into the metal layer 302b using pulse electrolysis, similar to the first embodiment, as illustrated in
After the metal layer 302b is formed in the shaping step, the resist layer 305 having an island shape and serving as the suppressing portion is removed as illustrated in
A manufacturing method of a mask according to a first aspect of the disclosure is a manufacturing method of a mask (mask sheet 300) used when particles (Z) are vapor-deposited onto a display device (2) during manufacture, the manufacturing method including a film formation step for forming a metal layer (302a) including a plurality of openings (304) on a mask substrate (301), and a shaping step for shaping the metal layer using pulse electrolysis.
According to the configuration described above, a taper can be formed on each of the openings (the openings can be formed into tapered shapes). Thus, the particles can be vapor-deposited substantially uniformly onto a region where subpixels facing the openings are formed. As a result, a display device including subpixels without color unevenness or the like can be manufactured.
Furthermore, in the manufacturing method of a mask according to a second aspect of the disclosure, in the first aspect, of a first electrode (101) and a second electrode (102) used in the pulse electrolysis, the first electrode may be the metal layer to be shaped in the shaping step and, given a forward current as a current flowing from the second electrode to the first electrode and a reverse current as a current flowing from the first electrode to the second electrode, a current density of the reverse current may be greater than a current density of the forward current.
According to the configuration described above, the openings can be reliably formed into tapered shapes.
Furthermore, in the manufacturing method of a mask according to a third aspect of the disclosure, in the second aspect, given a forward time as a time when the forward current is flowing and a reverse time as a time when the reverse current is flowing, the reverse time may be shorter than the forward time.
According to the configuration described above, the openings can be reliably formed into tapered shapes.
Further, in the manufacturing method of a mask according to a fourth aspect of the disclosure, in any one of the first to third aspects, the manufacturing method may further include a resist layer formation step for forming a resist layer provided with a plurality of space portions on the mask substrate. In the film formation step, the metal layer including the plurality of openings may be formed by removing the resist layer after formation of a metal layer in the plurality of space portions.
According to the configuration described above, the plurality of openings can be formed in the metal layer using the resist layer.
Further, in the manufacturing method of a mask according to a fifth aspect of the disclosure, in the fourth aspect, the film formation step may form the metal layer in the plurality of space portions using direct current electrolysis.
According to the configuration described above, the metal layer can be formed using direct current electrolysis.
Further, in the manufacturing method of a mask according to a sixth aspect of the disclosure, in any one of the first to the fifth aspect, the shaping step may include a suppressing portion formation step for forming a suppressing portion (resist layer 305) configured to suppress expansion of the metal layer to inside a predetermined region of the plurality of openings formed in the film formation step in each of the plurality of openings, and a removal step for removing the suppressing portion formed in the suppressing portion formation step after the shaping step.
According to the configuration described above, it is possible to avoid excessive expansion of the metal layer on the mask substrate and blockage of the openings by the metal layer in the shaping step.
Further, in the manufacturing method of a mask according to a seventh aspect of the disclosure, in the sixth aspect, the suppressing portion formation step may form the suppressing portion in the predetermined region by removing portions of the resist layer other than the predetermined region after formation of the resist layer on the mask substrate and on the metal layer formed in the film formation step.
According to the configuration described above, the suppression portion can be formed in the predetermined region using the resist layer.
The disclosure is not limited to each of the embodiments stated above, and various modifications may be implemented within a range not departing from the scope of the claims. Embodiments obtained by appropriately combining technical approaches stated in each of the different embodiments also fall within the scope of the technology of the disclosure. Moreover, novel technical features may be formed by combining the technical approaches stated in each of the embodiments.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2017/035215 | 9/28/2017 | WO | 00 |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2019/064424 | 4/4/2019 | WO | A |
| Number | Name | Date | Kind |
|---|---|---|---|
| 8329021 | Garza | Dec 2012 | B2 |
| 9365947 | Uzoh | Jun 2016 | B2 |
| 20010014409 | Cohen | Aug 2001 | A1 |
| 20060207888 | Taylor | Sep 2006 | A1 |
| 20160148981 | Matsueda | May 2016 | A1 |
| Number | Date | Country |
|---|---|---|
| 11-222664 | Aug 1999 | JP |
| 2001-355095 | Dec 2001 | JP |
| 2016-100296 | May 2016 | JP |
| WO-2017045122 | Mar 2017 | WO |
| Entry |
|---|
| Official Communication issued in International Patent Application No. PCT/JP2017/035215, dated Dec. 5, 2017. |
| Number | Date | Country | |
|---|---|---|---|
| 20200091432 A1 | Mar 2020 | US |
