Claims
- 1. A matched filter acting in charge domain, comprising:
- an analog shift register using at least one charge transfer device for transferring a charge signal packet;
- a plurality of charge signal generation units, arranged along said analog shift register and provided, respectively, with substantially uniform voltage charge conversion characteristic controlled by a common input signal; and
- a routing mechanism for selectively transferring output charge packets generated by said plurality of charge signal generation units in given directions according to digital bit signal provided separately;
- wherein, at least one of a plurality of output routs from said routing mechanism is connected to any of potential wells formed on said analog shift register, and in these potential wells, the addition of signals generated in said charge signal generation units and charge signals transferred along said analog shift register for transferring in synchronization therewith is executed in charge domain.
- 2. The matched filter acting in charge domain according to claim 1, wherein the number of said analog shift registers are two.
- 3. The matched filter acting in charge domain according to claim 1, wherein said digital bit signal is supplied by a signal latch unit disposed corresponding to said routing mechanism, and said signal latch unit stores the operation mode of said routing mechanism by selectively latching a matching code signal provided externally.
- 4. The matched filter acting in charge domain according to claim 3 for periodically updating digital bit signals stored in said latch and for executing correlation detection while following the temporal change of the matching code.
- 5. The matched filter acting in charge domain according to claim 1 which is composed to specify the function of said routing mechanism to the charge transfer respectively in given directions and to compute exclusively the correlation with fixed matching code.
- 6. A matched filter acting in charge domain, comprising:
- an analog shift register using at least one charge transfer device for transferring a charge signal packet;
- a plurality of charge signal generation units, arranged along said analog shift register and provided, respectively, with substantially uniform optical input signal to charge conversion characteristic controlled by a common optical input signal; and
- a routing mechanism for selectively transferring output charge packets generated by said plurality of charge signal generation units in given directions according to digital bit signal provide separately;
- wherein, at least one of a plurality of output routs from said routing mechanism is connected to any of potential wells formed on said analog shift register, and in these potential wells, the addition of signals generated in said charge signal generation units and charge signals transferred along said analog shift register for transferring in synchronization therewith is executed in charge domain.
- 7. The matched filter acting in charge domain according to claim 6, wherein the number of said analog shift registers are two.
- 8. The matched filter acting in charge domain according to claim 6, wherein said digital bit signal is supplied by a signal latch unit disposed corresponding to said routing mechanism, and said signal latch unit stores the operation mode of said routing mechanism by selectively latching a matching code signal provided externally.
- 9. The matched filter acting in charge domain according to claim 2, wherein said digital bit signal is supplied by a signal latch unit disposed corresponding to said routing mechanism, and said signal latch unit stores the operation mode of said routing mechanism by selectively latching a matching code signal provided externally.
- 10. The matched filter acting in charge domain according to claim 2, which is composed to specify the function of said routing mechanism to the charge transfer respectively in given directions and to compute exclusively the correlation with fixed matching code.
- 11. The matched filter acting in charge domain according to claim 7, wherein said digital bit signal is supplied by a signal latch unit disposed corresponding to said routing mechanism, and said signal latch unit stores the operation mode of said routing mechanism by selectively latching a matching code signal provided externally.
Parent Case Info
This application is a continuation-in-part of application Ser. No. 08/997,848 filed on Dec. 24, 1997, the entire contents of which are hereby incorporated by reference.
US Referenced Citations (6)
Foreign Referenced Citations (1)
Number |
Date |
Country |
A6-164320 |
Jun 1994 |
JPX |
Continuation in Parts (1)
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Number |
Date |
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Parent |
997848 |
Dec 1997 |
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