(1) Field of the Invention
The present invention relates generally to protection of semiconductor integrated circuits from damage by static electricity. More particularly, this invention relates to techniques for improving the ability of semiconductor integrated circuits to withstand electrostatic discharge (ESD).
(2) Description of Prior Art
As is well known in the art, static electric discharge can cause extensive damage to electronic components. Since loses due to ESD can be substantial much effort has been expended to prevent such discharges and also to protect electronic components by utilizing ESD protection devices. Tests are performed to evaluate the extent of protection provided semiconductor integrated circuits from ESD in various environments. The machine model (MM) test evaluates the immunity of semiconductor integrated circuits from machine to circuits. Results of the MM test can be presented in terms of a device MM passing voltage. Higher values of MM passing voltage indicate more robust protection. The generally accepted current industrial specification for device MM passing voltage is 200 volts. With the trend toward smaller devices and smaller current paths the susceptibility for damage due to ESD is increased and greater protection is required. Furthermore, increased protection is always desirable if it could be provided efficiently and economically.
Ker et al., U.S. Pat. No. 5,473,169, disclose a complementary silicon controlled rectifier ESD protection circuit that, when adjacent well spacing is made small, provides increased MM passing voltage. In the present invention increased MM passing voltage is achieved without altering the ESD protection device.
It is a primary objective of the invention to provide a method for increasing device MM passing voltage. It is a further primary objective of the invention to provide a method for increasing device MM passing voltage without alteration of the ESD protection device. It is yet a further primary objective of the invention to provide a method for increasing device MM passing voltage without utilizing chip device area.
These objectives are attained in the invention by forming long conductive lines in series with ESD protection devices and so situated that chip device area is not utilized. Meandering conductive lines are appropriate structures to attain long conductive lines. The resistance of the long conductive line determines the increase in device MM passing voltage, with a larger increase in MM passing voltage for a more resistive line. Device MM passing voltages more than doubling the current industrial specification are readily achievable. It is efficient to place the long conductive line under the I/O pad between the pad and device conductive lines so that no device area is expended for the conductive long lines.
In the accompanying drawing forming a material part of this description, there is shown:
Preferred embodiments of the invention are well described with the aid of
Although it is efficient to place the meander line under the pad, as described above, any available area would do. It is required that one end of the line connects to pins on the pad and the other end connects to lines leading to the protective device and the line resistance needs to be large enough, then an increase in the MM passing voltage is obtained.
The MM passing voltage measured when meander lines of various widths and lengths are used is given in Table 1. Here, the entries of the first row, which is labeled (L/W), provide the length, L, and width, W, of a meander line in micrometers. Thus the entry “5/30” of the first column of the first row indicates that the length of the meander line is 5 micrometers and its width is 30 micrometers. An entry of the second row provides the measured MM passing voltage, in volts, when using a meander line having length and width values given in the same column of the first row.
For the short, wide meander line of the first column there is no perceptible increase in the MM passing voltage, which is about 200 volts when no meander line is used. The resistance of the meander line of the second column is 900 times that of the first column and the MM passing voltage is increased by 50% to 300 volts. Meander lines of the third column have a resistance that is four times that of second column lines and MM voltages of 450 volts, 50% higher than for the second column lines and 225% larger than the 200 volt MM passing voltage when no meander line is used, and which is the current industrial specification. It is apparent that long meander lines in series with ESD protection devices can significantly increase the MM passing voltage. Thus substantial improvement in ESD protection results just by interposing a long meander line between the pad and the ESD protection device. Notably this improvement is achieved without any alteration of the ESD protection device and with no cost in device real estate. Preferably the long meander line is situated under the I/O pad. Then essentially the only alteration required being the introduction of additional metal levels to accommodate the meander line.
The governing property of the interposed line, giving rise to the increased MM passing voltage, is its resistance. Any element having the same resistance that is interposed between the pad and ESD protection device will have the same effect. Thus thin film deposited resistors, such as nichrome, tantalum or cermet thin film resistors will essentially act the same as long polysilicon lines of the same resistance. Also most any conductive material could be used for the meander lines. Thus polysilicon, metals metal silicides and composites of these and other materials are appropriate for the meander lines. It is only necessary that a resistor with resistance efficiently large to achieve the desired increase in the MM passing voltage be inserted in series with the ESD protection device, with one end of the resistor connected to pins on the pad and the other end connected to the ESD protection device.
Techniques for forming conductive lines and thin film resistors are well known in detail by those versed in the art. These techniques include forming, etching and patterning dielectric and conductive layers.
While the invention has been particularly shown and described with reference to the preferred embodiments thereof, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the invention.