This application claims priority to foreign French patent application No. FR 2313796, filed on Dec. 7, 2023, the disclosure of which is incorporated by reference in its entirety.
The invention lies in the field of electronic instrumentation. It relates more particularly to a method and a device for measuring a complex impedance of an electrical element.
The concept of complex impedance generalizes that of resistance for sinusoidal signals at a given frequency f. In the case of an electric dipole, the complex impedance Z is defined by
where U is the phasor (complex number) representing the amplitude and phase of the voltage across the terminals of the dipole and I is the phasor representing the amplitude and phase of the current flowing through it. More generally, in the case of an N-port circuit (the dipole corresponding to the case N=1), it is possible to define an impedance
In other words, the impedance Zij is the (complex) ratio between the phasor representing the voltage across the terminals of the port “i” and the phasor representing the current entering (or exiting, depending on the convention adopted) the port “j” when the current entering all the other ports is zero. The various terms Zij form the impedance matrix of the multiport element. Hereinafter, the term impedance and the symbol “Z” will be used to designate both the impedance of a dipole and a term Zij of the impedance matrix of a multiport.
Being a complex number, the impedance Z may be broken down into a complex part and an imaginary part—Z=R+jX, where “j” here denotes the imaginary unit—or, in terms of modulus and phase: Z=|Z|ejφ, where |Z| is the ratio between the RMS values of voltage and current and φ is their phase offset.
Generally speaking, impedance varies with the frequency of the electrical signals under consideration. To characterize an electrical element, it is therefore necessary to measure its (or their) impedance(s) in a more or less wide frequency band. Z(f), |Z(f)| and φ(f) are therefore written to designate, respectively, a complex impedance, its modulus and its phase as a function of the frequency f.
Many techniques have been developed to measure the phase of an impedance, φ(f), as a function of frequency.
(Angrisani 2001) discloses a measurement method in which a resistor of known value is connected in series to the element to be characterized and an excitation sinusoidal signal is applied to said element through this resistor. The impedance of the element to be characterized is able to be determined based on the measurement of the voltage u(t) of the excitation signal and the voltage v(t) of a node located between the known resistor and the element to be characterized. More particularly, two methods are proposed for determining the phase of said impedance:
Either the zero crossings of the signals u(t) and v(t) are detected, after having filtered these two signals by way of finite impulse response predictive filters in order to limit the impact of noise on zero detection;
Or the phase offset of the two signals is calculated based on their internal product and their mean square value.
(Schröder 2004) also determines the phase of a complex impedance by measuring the phase offset between two voltage signals. This phase offset measurement may be carried out by detecting zero crossings of said signals, or else through analytical calculation based on amplitude and phase parameters of said signals, determined by interpolation.
FR3009086 discloses a method and device for measuring the phase of the complex impedance of an electrical element. According to the teaching in that document, an excitation signal with a known frequency is applied to the electrical element, and then the phase offset between the current flowing through said device and the voltage across its terminals is measured. To measure this phase offset, comparators carry out thresholding of the voltage signals and current signals in order to convert them from a sinusoidal waveform to a square-wave one. A logic operation applied to the converted signals makes it possible to generate square waves the duration of which is proportional to the time offset between voltage and current. These square waves drive a switch that charges a capacitor. After a certain number of cycles, a voltage across the terminals of the capacitor is measured, this voltage being proportional to said offset. One drawback of this approach is its sensitivity to noise: indeed, when the threshold of the switches is close to being crossed, noise may induce multiple switching.
The solutions proposed by (Schröder 2004) and (Angrisani 2001) require carrying out relatively complex calculations and, in the case of (Angrisani 2001), implementing a specific power sensor.
The invention aims to overcome at least some of the aforementioned drawbacks of the prior art. More specifically, it aims to make it possible to measure the phase of the impedance of an electrical element in a particularly simple way, implementing a device of low complexity, which may be based notably on a microcontroller or an FPGA.
One subject of the invention is a method for measuring the phase of the complex impedance of an electrical element, comprising the following steps:
In step e), the thresholding of the first analog signal may generate a first square-wave signal comprising a first rising edge and a first falling edge, and the thresholding of the second analog signal generates a second square-wave signal comprising a second rising edge and a second falling edge, and step f) may comprise a time-to-digital conversion operation carried out on a time offset between the first and the second rising edge, or between the first and the second falling edge.
Step g) comprises:
According to particular embodiments of such a method:
Another subject of the invention is a device for measuring the phase of a complex impedance of an electrical element, comprising:
Said digital circuit comprises:
According to particular embodiments of such a device
The device may also comprise a third digital-to-analog converter for generating a fifth numerical value representative of a threshold voltage common to said first and second Schmitt trigger, said lookup table being configured to determine said phase correction term as a function of the first, the second and the fifth numerical value.
Said digital circuit may also be configured to receive said fifth numerical value at input.
Other features, details and advantages of the invention will become apparent on reading the description given with reference to the appended drawings, which are given by way of example, and in which, respectively:
The device of
The Schmitt triggers convert the input sinusoidal signals uV and uI into two square-wave signals ŪV and ŪI, respectively. A time-to-digital converter (TDC) receives these signals at input and supplies, at its output, a numerical value Δ{circumflex over (T)} that constitutes an estimate of the time offset ΔT between the rising edges (or, equivalently, the falling edges) of these signals. As may be seen in [
One drawback of using Schmitt triggers instead of simple zero comparators is that the instant when the threshold VLH (or VHL if the focus is on falling edges) is crossed does not depend solely on the phase of the input signals, but also on their amplitude. Therefore, a difference in amplitude of the signals uV and uI will distort the measurement of their phase offset. This is illustrated in the case of
The situation does not change if the phase offset q between the two input signals is effectively non-zero: the difference between their amplitudes introduces an error in the estimation Δ{circumflex over (φ)}LH of said phase offset.
The phase estimation error Δ{circumflex over (φ)}LH may be calculated by analysing the signals around the time TLH:
where A and B are the (real) amplitudes of the sinusoidal analog signals uV and uI, and ω is the angular frequency of the signals, ω=2πf.
Removing TLH from the above two equations gives:
The phase error ΔφLH is therefore given by:
Indeed, developing the expression of ΔφLH obtained above into a first-order Taylor series around VLH=0 gives
One idea on which the invention is based is that the error ΔφLH may be calculated beforehand as a function of the amplitudes A and B and of the threshold voltage VLH, quantities that are able to be measured easily using analog-to-digital converters (VLH may also be considered to be known by design of the system). This makes it possible to compensate for said error so as to obtain an improved estimate of the phase offset between the input signals:
In
The device of
The signals uV(t) and uI(t) are also supplied at input to respective Schmitt triggers BS1, BS2, which supply square-wave signals ŪV, ŪI at output. As explained above, with reference to
The digital signals UV, UI, VTH and f, along with the square-wave signals ŪV, ŪI, are supplied at input to a digital circuit CN that uses them to calculate an estimate {circumflex over (φ)}′ of the phase offset between the signals uV(t) and uI(t)—that is to say of the phase of the complex impedance of the electrical element EL.
The digital circuit CN comprises a time-to-digital converter TDC that receives, at input, the square-wave signals ŪV, ŪI and—as explained above with reference to
The digital circuit CN also comprises two logic blocks MX1, MX2 configured to extract, from the digital signals UV and UI, the values A and B representative of the amplitude of the analog signals uV(t) and uI(t). For example, the blocks MX1, MX2 are able to determine local extrema of said signals and average their values, or interpolate them with perfect sinusoidal functions.
The numerical values A, B and VLH (the latter coming from the third analog-to-digital converter ADC3) make it possible to calculate the correction term −Δ{circumflex over (φ)}LH by applying equation (4), its linear approximation (5) or a polynomial approximation. The calculation is typically performed using a three-entry lookup table LUT.
Finally, an adder module MA calculates a corrected estimate {circumflex over (φ)}′ by applying the correction term −Δ{circumflex over (φ)}LH to the first estimate {circumflex over (φ)}.
The invention has been described with reference to one particular embodiment, but variants are possible. For example:
The digital circuit CN may be implemented by way of a microprocessor programmed in a timely manner (in which case the various “blocks” and “modules” of
The lookup table LUT may be implemented by way of a dedicated memory device, or constitute a region of a memory of a microprocessor.
The correction term −Δ{circumflex over (φ)}LH may be determined by an arithmetic circuit (in the case of an FPGA or ASIC implementation) or by a calculation routine (in the case of a software implementation), rather than a lookup table, particularly if the linear approximation of equation (5) is used.
The blocks MX1, MX2 may be omitted if a peak detector is provided upstream of each of the analog-to-digital converters ADC1, ADC2.
Rather than the time offset between the rising edges of the signals UV and UI, it is possible to take into account the falling edges. In this case, it is the threshold VHL that should be used to calculate the correction term.
The value of the threshold VLH (or VHL if the focus is on falling edges) may be predefined and stored in a memory, rather than being acquired and converted to digital format. The use of an analog-to-digital converter ADC3, as in the embodiment of
Similarly, the frequency f may be a predefined value stored in a memory, rather than being supplied by the generator FS. Conversely, it may also be determined based on the analog signals uV(t) and uI(t).
Many embodiments known to those skilled in the art are possible for the time-to-digital converter TDC: a simple high-frequency counter, a counter with a delay line, a dual delay line circuit, etc.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2313796 | Dec 2023 | FR | national |