Memory card having multiple interfaces and reset control method thereof

Abstract

A method and apparatus for resetting a memory card having a plurality of interfaces and a plurality of function blocks, wherein each function block may be associated with a corresponding interface, may include detecting a reset signal for a selected interface of the plurality of interfaces, and interrupting a function block associated with the selected interface. When the selected interface is the only active interface, all function blocks in the memory card may be reset. If interfaces other than the selected interface are active, only the selected interface may be reset.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other features and advantages of the present invention will become more apparent to those of ordinary skill in the art by describing in detail exemplary embodiments thereof with reference to the attached drawings, in which:

FIG. 1 illustrates a schematic block diagram of a card in communication with a host in accordance with an embodiment of the present invention;

FIG. 2 illustrates a schematic block diagram of a reset block in accordance with an embodiment of the present invention; and

FIG. 3 illustrates a flow chart of a method of resetting a card in accordance with an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which exemplary embodiments of the invention are shown. The invention may, however, be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the figures, the dimensions of layers and regions are exaggerated for clarity of illustration. Like reference numerals refer to like elements throughout.

FIG. 1 illustrates a card 100 in communication with a host 110 in accordance with an embodiment of the present invention. As may be seen therein, the host 110 may include a host block 10 including multiple interfaces, e.g., interface111, interface212, and interface313.

The card 100 may include a memory 32, an interface block 50, an interface detector 55, a system bus 60, a power management unit (PMU) 62, a central processing unit (CPU) 64, a controller 70 and a reset block 80. The interface block 50 may include multiple interfaces, e.g., interface151, interface252, and interfaces 53. The controller 70 may include multiple function blocks, respectively corresponding to the multiple interfaces, e.g., function block171, function block272, and function block373. Interfaces in both the host 110 and the card 100 may be any desired interface, e.g., an MMC interface, a USB interface, compact flash, an ISO 7816 interface, etc.

The interface detector 55 may detect which of the interfaces in the interface block 50 are communicating with the host 110, and may supply this information to the reset block 80. The reset block 80 may also receive a reset signal RST from the host 110 via the interface block 50. The reset block 80 may output a signal in accordance with which interface within the interface block 50 the reset signal RST came from and which interfaces are active as detected by the interface detector 55.

For example, if the only active interface is the interface sending the reset signal RST, the reset block 80 may output a reset signal to the PMU 62, which in turn, may reset the entire memory card 100, i.e., all function blocks within the controller 70. If another interface, in addition to the interface sending the reset signal RST, is indicated as being active, the reset block 80 may output an interrupt signal to the CPU 64, which may only reset only a corresponding specific function block, from which the reset signal RST was sent, within the controller 70.

As a particular example, assume the memory card 100 simultaneously communicates with the host 110 via the interface151 and the interface252. If the reset block 80 receives the reset signal RST via the interface252, the reset block 80 may output the interrupt signal to the CPU 64. The CPU 64 may respond the interrupt signal from the reset block 80, and may only reset the function block272, corresponding to the interface252. Now, if the reset block 80 receives the reset signal RST via the interface151, the reset block 80 may output the reset signal to the PMU 62. The PMU 62 may respond the reset signal from the reset block 80, and may reset entire memory card 100, i.e., all function blocks in the controller 70.

FIG. 2 illustrates a detailed schematic block diagram of the reset block 80 in accordance with an embodiment of the present invention. As can be seen therein, the reset block 80 may include a reset manager 81, a power on reset (POR) 82, and a software (SW) reset 83. The reset manager 81 may receive signals from any of the interfaces in the interface block, i.e., the interface151, the interface252, the interface353, from the interface detector 55, from the POR 82, and from the S/W reset 83. In accordance with received signals, the reset manager 81 may output the reset signal to the PMU 62 or the interrupt signal to the CPU 64.

When the memory card is power-on, POR 82 may output the reset signal to the reset manager 81. S/W reset 83 may generate the software reset signal, i.e., the interrupt signal, while the memory card 100 operates normally. When the reset signal is output from the POR 82, the PMU 62 may reset the entire memory card 100. When the interrupt signal is output from the SW reset 83, the CPU may only reset a specific function block within the memory card 100.

A method of resetting the card 100 in accordance with an embodiment of the present invention is illustrated in the flow chart of FIG. 3. Step S110 may determine whether a POR signal has been activated. If so, then the method may proceed to step S160, which, in turn, may send the reset signal to the PMU 62 to reset the entire card 100. Otherwise, the method may proceed to step S120 to detect a reset signal RST. In step S130, it is determined whether a reset signal RST has been detected. If not, the method returns to step S120. If so, then the method may proceed to step S140 to determine whether another interface is active. If not, then the method may proceed to step S160, which, in turn, may send the reset signal to the PMU 62 to reset the entire card 100. If so, then the interrupt signal may be sent to the CPU 64 to reset only the interface that sent the reset signal RST.

Thus, in accordance with embodiments of the present invention, individual function blocks, rather than the entire card, may be reset. Therefore, simultaneous communication between a host and a memory card using multiple interface may be realized.

Exemplary embodiments of the present invention have been disclosed herein, and although specific terms are employed, they are used and are to be interpreted in a generic and descriptive sense only and not for purpose of limitation. For example, the resetting of the memory card of the present invention may be implemented in software, e.g., by an article of manufacture having a machine-accessible medium including data that, when accessed by a machine, cause the machine to reset the memory card in accordance with methods of the present invention. Accordingly, it will be understood by those of ordinary skill in the art that various changes in form and details may be made without departing from the spirit and scope of the present invention as set forth in the following claims.

Claims

1. A method of resetting a memory card having a plurality of interfaces and a plurality of function blocks, each function block being associated with a corresponding interface, the method comprising: detecting a reset signal for a selected interface of the plurality of interfaces; andinterrupting a function block associated with the selected interface.

2. The method as claimed in claim 1, further comprising, when a power state of the memory card is turned on, resetting all of the plurality of function blocks.

3. The method as claimed in claim 1, further comprising, before interrupting, determining a status of interfaces other than the selected interface.

4. The method as claimed in claim 3, wherein, when no interface other than the selected interface is active, resetting all of the plurality of function blocks.

5. The method as claimed in claim 1, wherein detecting the reset signal comprises: receiving the reset signal;detecting the selected interface associated with the reset signal; andoutputting the selected interface to be interrupted.

6. An apparatus for controlling resetting of a memory card having a plurality of interfaces and a plurality of function blocks, each function block being associated with a corresponding interface, the apparatus comprising: an interface detector for detecting an interface of the plurality of interfaces having a reset signal provided thereto;a reset block for receiving a reset signal from the plurality of interfaces and the interface from the interface detector, and for outputting an interrupt signal associated with a selected interface to be interrupted; anda processor for receiving the interrupt signal and for interrupting a function block associated with the selected interface.

7. The apparatus as claimed in claim 6, further comprising a power manager for resetting all of the plurality of function blocks, wherein the reset block outputs a reset signal to the power manager when a power state of the memory card is turned on.

8. The apparatus as claimed in claim 6, wherein the interface detector further detects a status of interfaces other than the selected interface.

9. The apparatus as claimed in claim 8, further comprising a power manager for resetting all of the plurality of function blocks, wherein, when no interface other than the selected interface is active, the reset block outputs a reset signal to the power manager.

10. A memory card, comprising: a plurality of interfaces;a plurality of function blocks, each function block being associated with a corresponding interface;an interface detector detecting an interface of the plurality of interfaces having a reset signal provided thereto;a reset block receiving a reset signal from the plurality of interfaces and the interface from the interface detector, and outputting a selected interface to be interrupted; anda processor interrupting the function block associated with the selected interface.

11. The memory card as claimed in claim 10, wherein the plurality of interfaces and the plurality of function blocks are in separate portions of the memory card, and the plurality of interfaces and the plurality of function blocks are in communication with one another.

12. The memory card as claimed in claim 11, wherein the plurality of function blocks is integrated in a single controller.

13. The memory card as claimed in claim 10, further comprising a power manager for resetting all of the plurality of function blocks, wherein the reset block outputs a reset signal to the power manager when a power state of the memory card is turned on.

14. The memory card as claimed in claim 10, wherein the interface detector further detects a status of interfaces other than the selected interface.

15. The memory card as claimed in claim. 14, further comprising a power manager for resetting all of the plurality of function blocks, wherein, when no interface other than the selected interface is active, the reset block outputs a reset signal to the power manager.

16. An article of manufacture having a machine accessible medium including data that, when accessed by a machine, cause the machine to perform a method of resetting a memory card having a plurality of interfaces and a plurality of function blocks, each function block being associated with a corresponding interface, the method comprising: detecting a reset signal for a selected interface of the plurality of interfaces; andinterrupting a function block associated with the selected interface.

17. The article as claimed in claim 16, further comprising, when a power state of the memory card is turned on, resetting all of the plurality of function blocks.

18. The article as claimed in claim 16, further comprising, before interrupting, determining a status of interfaces other than the selected interface.

19. The article as claimed in claim 18, wherein, when no interface other than the selected interface is active, resetting all of the plurality

20. The article as claimed in claim 16, wherein detecting the reset signal comprises: receiving the reset signal;detecting the selected interface associated with the reset signal; andoutputting the selected interface to be interrupted.

21. A reset control system, comprising: a host;a card;a plurality of interfaces between the host and the card;a plurality of function blocks on the card, each function block being associated with a corresponding interface;an interface detector on the card detecting an interface of the plurality of interfaces having a reset signal provided thereto from the host;a reset block on the card for receiving a reset signal from the plurality of interfaces and the interface from the interface detector, and for outputting a selected interface to be interrupted; anda processor on the card for interrupting the function block associated with the selected interface.