Patent Grant
11800814
This invention relates to hybrid devices involving magnetic and superconducting materials, and particularly, to devices used as memory cells and methods of their control in arrays for high-density memory in an integrated circuit based on Josephson junctions or other superconducting devices that operate at cryogenic temperatures.
Each patent, published application and other reference cited herein is expressly incorporated herein by reference in its entirety.
Superconducting electronic circuits comprise Josephson junctions as the basic constituent elements. In particular, integrated circuits intended for operation in high-performance low-power superconductor-based computers use damped Josephson junctions to produce very fast low-voltage pulses when the junctions switch from the superconductive to the resistive state and back again. These circuits, also known as Single-Flux Quantum (SFQ) circuits, operate at very high speed and consume very low power. The voltage pulses, with pulsewidth of order 1 ps and height of order 1 mV, have integrated pulsewidth corresponding to one flux quantum Φ0=h/2e=2.07 mV×ps, and are known as SFQ pulses. See, for example, U.S. Pat. Nos. 9,520,180; 9,887,000; 10,460,796.
A Josephson junction (JJ) comprises two superconducting (S) layers with a thin insulating (I) or normal-metallic (N) layer between them (SIS or SNS). For example, this may be Nb/Al/AlOx/Nb, where the Al is sufficiently thin to be induced into the superconducting state, for circuits that are designed to operate at ˜5° K or below. It is known in the art that a magnetic field applied in the plane of the JJ will modulate the critical current Ic according to a sinc function dependence: (|sin(x)/x|), where x=πΦ/Φ0 and Φ is the magnetic flux inside the junction.
A Josephson junction is a two-terminal device, which when biased above its critical current Ic, can generate a time-series of SFQ pulses. The Ic of a given JJ is effectively a constant. Although Ic varies with temperature, thermal switching of Ic is generally not useful for fast electronics. In comparison, a switchable magnetic Josephson junction (MJJ) has an Ic that may be tuned over a range of values. Because the barrier of an MJJ contains a ferromagnetic material, which being a permanent magnet material has hysteresis, the stable magnetic flux in the junction may have (at least) two different values. These correspond to two different values of the critical current, Ic, and one may repeatedly switch between them. The non-volatile aspect, namely that magnetization stays on after the stimulation has ceased, makes this switchable MJJ useful as a memory element. The term “ferromagnetic material” is being used in this disclosure in its broadest sense, namely, meaning that a state of magnetization of the material remains even after any external stimulus has been terminated, and the magnetization has a hysteretic behavior. By way of example, without intent of limiting, ferromagnetic materials include Fe, Co, Ni, some rare earth elements, and alloys of all of these between themselves and with non-magnetic materials (such as Al, Nb, Cu, Ag, Pd, etc.).
Operation of superconducting computers requires not only SFQ-based logic circuits, but also requires Random Access Memory (RAM) architectures compatible with these high-performance parameters. The central component of any RAM is a memory cell. Many designs of memory cells for use with SFQ circuits are known in the prior art. Some cells, based on Josephson junctions, store one flux quantum and are called single flux-quantum (SFQ) memory cells. These memory cells, although they dissipate low energy during operation, are built using several JJs and contain a superconducting loop, which requires a large area on a chip, and therefore, such cells are not suitable for high-density memory arrays. Typical examples of SFQ memory cells are disclosed in publication by Kurosawa et al., “Single flux-quantum Josephson memory cell using a new threshold characteristic”, Appl. Phys. Lett., vol. 43, pp. 1067-1069 (1983), and in WO 2013/180946 A1 “Josephson magnetic memory system”.
Non-SFQ cryogenic memory cells are also known in the prior art. In order to realize a high storage density, memory cells involving magnetic memory elements in combination with superconducting elements have been proposed. U.S. Pat. No. 5,039,656 “Superconductor magnetic memory using magnetic films”, provides a memory cell which comprises two magnetic films having different coercive forces, or different uniaxial anisotropies, and a superconducting element either sandwiched between the two magnetic films, or placed outside of the magnetic films in the close proximity to them. The superconducting element has a plurality of Josephson junctions in the area completely covered by magnetic films. The magnetic films serve to store the binary information by acquiring one of two states with opposite magnetization orientations in the two magnetic films, whereas the multiple Josephson junctions serve for reading the state stored in the magnetic films. This readout may be accomplished by either entering the resistive state under influence of the combined action of the stray magnetic field induced by the magnetic films, if both films have the same magnetization direction, or remaining superconductive for opposite magnetization directions of the two magnetic films. Such a memory cell is hard to fabricate in a controllable way in order to have laterally positioned multiple Josephson junctions with reproducible characteristics. Also, such a cell containing multiple Josephson junctions is hard to scale down in size. It is also noted that in this memory cell, only a stray magnetic field component induced from the magnetic films parallel to the films is used, which is rather weak as compared to the fringe field, and therefore, the memory cell operates inefficiently.
The memory cell disclosed in U.S. Pat. No. 5,276,639 “Superconductor magnetic memory cell and method for accessing the same” is similar to that in U.S. Pat. No. 5,039,656 mentioned above, however, only one Josephson junction of sandwich-type geometry is used as a sensor of the state of the magnetic element. Again, similarly to U.S. Pat. No. 5,039,656, the memory cell disclosed in U.S. Pat. No. 5,276,639 operates using the stray magnetic field, induced by the magnetic element in the Josephson junction, whose magnetic lines of force are parallel to the planes of the superconducting films comprising the Josephson junction. It is shown experimentally in the publication “Multiterminal Superconducting-Ferromagnetic Device with Magnetically Tunable Supercurrent for Memory Application”, IEEE Trans. Appl. Supercond., vol. 28, article 1800904 (2018) that such a parallel magnetic field causes a relatively small shift of the Josephson critical current vs. magnetic field (Ic(H)) dependence along the H axis, but does not influence the maximum magnitude of Ic. This is not efficient use of the magnetic field produced by the magnetic element.
In U.S. Pat. No. 5,276,639, a method to access a memory cell is proposed, which requires magnetization reversal of both “soft” and “hard” magnetic layers involved in the cell. This is hard to realize practically, because one of the magnetic layers must have a considerably larger corcive force than the other, but both layers need to be “soft” enough to minimize the field needed for the magnetization reversal. Also, methods to access the cells in the arrays proposed in U.S. Pat. No. 5,276,639 require complicated sequences of control signals during the READ operation, which is hard to realize in practice. The method of memory cell control disclosed in U.S. Pat. No. 5,039,656 suffers from similar drawbacks.
The switching device disclosed in U.S. Pat. No. 5,930,165 has a magnetic element that, in one of its two magnetic states, induces a fringe field in order to depress the superconductivity in an adjacent superconductive stripe to convert at least a portion of the superconductive pathway to the normal state. Formation of the normal region is undesirable because of excessive energy dissipation due to Joule heating.
The magnetic JJ disclosed in the publication Baek et al., “Hybrid superconducting-magnetic memory device using competing order parameters”, Nature Commun., vol. 5, article 3888 (2014), has low Josephson critical current density and low critical voltage because the magnetic materials are constituent parts of the barrier region of the junction. This limits usage of the junctions of this class in some applications, including some memory designs.
A hybrid superconducting-magnetic junction disclosed by Vernik et al., “Magnetic Josephson Junctions With Superconducting Interlayer for Cryogenic Memory”, IEEE Trans. Appl. Supercond., vol. 23, article 1701208 (2013) has an SIS′FS structure, where S′ is a thin superconducting layer, I is an insulator, and F is a dilute magnetic layer which is induced into a weakly superconducting state due to the proximity effect with the superconducting S and S′ electrodes. Switching the magnetization direction of a single F layer leads to a symmetric shift (for two directions of the magnetization) of the Fraunhofer-like pattern of the Josephson SIS' junction. This design requires a bias magnetic field in order to discriminate between the two logic states, and the discrimination will deteriorate upon reducing the junction size.
A memory cell disclosed by Held et al., “Superconducting memory based on ferromagnetism”, Appl. Phys. Lett., vol. 89, article 163509 (2006) has a magnetic element that controls the Josephson current in a JJ sensor. However, this design cannot be scaled down to very small sizes. Similarly, a memory cell disclosed in the US 2009/0244958 includes a magnetoresistive element and at least one superconducting element wired in parallel with the magnetoresistive element, which does not allow for compact memory cell design.
The embodiments of the prior art for hybrid superconducting magnetic memory cells based on JJs are varied, but all such embodiments focus on coupling magnetic flux from the magnetic element into the plane of the Josephson junction. When a non-zero magnetic flux is coupled to the JJ, the critical current Ic is suppressed. However, magnetic elements tend to generate values of magnetic field B, not flux Φ. For this reason, all devices of this type cannot easily be scaled to small dimensions; the flux will be too small to produce a large relative suppression of Ic.
Each reference cited herein is expressly incorporated herein by reference in its entirety. See:
A recent publication that disclosed promising results was I. Nevirkovets and O. Mukhanov, “Memory Cell for High-Density Arrays Based on a Multiterminal Superconducting-Ferromagnetic Device,” Physical Review Applied, vol. 10, art. 034013 (2018). This fabricated and demonstrated a memory cell comprising a magnetic junction on top of a JJ, where a small portion of the JJ was exposed to a fringe field from the magnetic junction. Depending on the state of the magnetic junction, the critical current of the Josephson junction underwent a small change of as much as 10%. While a much larger effect of 20% or more would be desired for practical applications, this report did not disclose how a larger effect could be achieved.
A larger effect of about 40% h change was achieved in another publication by Nevirkovets and Mukhanov, ISEC 2017, 16th International Superconductive Electronics Conference (ISEC): Sorrento (Napoli), Italy, Jun. 12-16, 2017, TU-SDM-06. However this result was obtained on imperfect devices in which the SIS junction displayed non-ideal I-V curve and Fraunhofer-like pattern, and therefore, was non-reproducible on devices fabricated using state-of-the-art techniques.
What is needed is a system for hybrid superconducting and magnetic memory cells, with high access speed, small size, high integration density, low power consumption, and efficient operation, improving substantially on the prior art devices. The disclosed memory cell is intended satisfy the above requirements and to operate in the memory arrays in digital superconducting circuits.
The disclosed memory cell comprises a superconductive Josephson junction and a magnetic junction situated in a close proximity to the Josephson junction, the two junctions being vertically integrated in the preferred embodiment. The Josephson junction comprises two superposed superconductive layers with a non-superconductive layer therebetween. The magnetic junction comprises at least two magnetic layers with different coercive forces and a non-magnetic layer therebetween to form a spin valve or pseudo-spin valve, wherein the magnetization direction of at least one magnetic layer with a lower coercive force can be rotated with respect to the magnetization direction of the magnetic layer(s) having larger coercive force. The rotation can be accomplished either by magnetic fields produced by appropriately configured control lines carrying electric current, or by spin-polarized current through the magnetic junction. The magnetic junction influences the magnitude of the Josephson critical current of the adjacent Josephson junction by producing magnetic fields of different strength and direction when the magnetization orientations of the magnetic layers in the said magnetic junction are different as a result of the controlled magnetization rotation in the magnetic layer with the lower coercive force, respectively leading to the two distinct values of the Josephson critical current which can serve as logic ‘0’ and ‘1’ states. The so obtained memory cell can be integrated into the large arrays containing a plurality of the cells, the arrays configured to enable the selective READ and WRITE operations.
The memory cell proposed in the present invention overcomes the above deficiencies suffered by the prior memory cell proposals. It is an object of this invention to provide a superconductor-ferromagnetic memory cell that has a high access speed, a small size, a high integration density, and a low power consumption. Furthermore, methods of WRITE and READ operations of the memory cells in arrays (referred together as “control”) are also provided by the present invention.
These and other objects of this invention are achieved in the memory cell by including a magnetic element and a superconducting element vertically integrated in close proximity to each other, as shown in
Spin injection works by carrying spin-polarized electrons from one magnetic material through a spacer (for example, a tunnel barrier) to another. In some cases spin injection may provide faster switching with a smaller current than inductive coupling.
The preferred magnetic materials for cryogenic applications are easily switched with a small control current at the temperature of operation. Materials optimized for room temperature are likely to have a value of the coercive field Hc, namely a sufficient applied magnetic field for switching the magnetic state of the junction, that becomes impractically large at cryogenic temperatures ˜4-10° K. Conversely, a ferromagnetic material that is magnetically soft, i.e., it has low Hc at 4° K, may not even be a ferromagnet at room temperature. For example, an alloy of Pd with ˜1% Fe has a Curie temperature only about 20-30° K, but this may be chosen in some embodiments for a 4-10° K device, since its value of Hc is in the range of a few Oe, maybe about 1 Oe (˜100 A/m in SI units).
When the magnetization vectors of the two magnetic layers are oriented anti-parallel, the fringe field couples mostly from one magnetic layer to the other, so that little or no magnetic flux couples into the JJ (see
In contrast, for the parallel orientation of the two magnetization vectors, the fringe field penetrates at least a portion of at least one of the electrodes of the JJ, as shown in
A preferred embodiment also includes a write line, comprising a superconducting line configured to inductively couple magnetic flux into at least one of the magnetic layers, but not into the JJ, as shown in
In a further aspect of the invention, the depression of the critical current of the JJ in the ‘1’ state is at least 15% of that in the ‘0’ state for reliable discrimination between the two states, so that arrays of cells can be designed with large margins for READ and WRITE operations. According to the present invention, this can be achieved in several ways as follows. First, the suppression of Ic at zero external magnetic field, H, strongly depends on the position of the magnetic element on the area of the JJ. It is known that a magnetic vortex penetrating one electrode in the center of a disc-shaped JJ can reduce Ic(H=0) to zero. Therefore, in one of the preferred embodiments schematically shown in
In some aspects of the present invention, these stacked magnetic Josephson memory cells may be integrated together on the same chip with superconducting write and read lines to form different types of arrays, in order to achieve a high-density large-scale memory fully compatible with superconducting logic.
It is therefore an object of the present invention to provide a superconducting memory cell, comprising: a magnetic junction comprising a first magnetic layer indirectly magnetically coupled to a second magnetic layer, the first magnetic layer being separated from the second layer, and having a respective different coercivity and a distinctly controlled magnetization vector with respect to the second magnetic layer; and a Josephson junction comprising a superconducting layer closely magnetically coupled to the magnetic junction and having an electrical property which varies by at least 15% over a range of the state of the net magnetization state of the magnetic junction. The electrical property may vary by at least 20% over the range of the state of the net magnetization state of the magnetic junction. In some cases, depending on noise and precision of measurement, and acceptable error rate, a lower threshold may be applied, for example, 10%, 7.5%, 5%, 4%, or 2.5%. However, 15-20% difference would typically be a good compromise to achieve an acceptable error rate.
It is also an object of the present invention to provide a method of retrieving information from a superconducting memory cell, comprising: a magnetic junction comprising a first magnetic layer indirectly magnetically coupled to a second magnetic layer, the first magnetic layer being separated from the second layer, and having a respective different coercivity and a distinctly controlled magnetization vector with respect to the second magnetic layer, and a Josephson junction comprising a superconducting layer closely magnetically coupled to the magnetic junction and having an electrical property which varies by at least 15% over a range of the state of the net magnetization state of the magnetic junction; and sensing the magnetization state of the magnetic junction using the critical current of the Josephson junction.
It is a further object of the present invention to provide a memory cell based on superconducting and magnetic materials comprising: a magnetic junction comprising at least two magnetic layers, with respectively different coercive forces and distinct magnetization vectors, and a non-magnetic layer situated between the two magnetic layers; a Josephson junction having two superconducting layers and a non-superconducting layer situated between the two superconducting layers, having a critical current, at least one of the two superconducting layers extending over the magnetic junction in close proximity to a surface of the magnetic junction, wherein the magnetic junction and the Josephson junction are magnetically coupled wherein the critical current of the Josephson junction varies in response to a joint magnetization vector of the at least two magnetic layers of the magnetic junction.
The magnetic junction and the Josephson junction may be closely magnetically coupled, and the critical current of the Josephson junction may vary by at least 15% in response to a joint magnetization vector of the magnetic layers of the magnetic junction over a range of the distinct magnetization vectors of each of the two magnetic layers.
The magnetic junction may be in galvanic contact with the Josephson junction, or the magnetic junction may not have galvanic contact with the Josephson junction.
The magnetic and Josephson junctions may be vertically integrated.
The magnetic junction may have a smaller area than the Josephson junction.
At least one edge of the magnetic junction may be situated over an area of the Josephson junction. One edge of the magnetic junction may be situated over the area of the Josephson junction close to its lateral geometric center.
The magnetic junction may have an electrically insulating barrier between the two magnetic layers. The magnetic junction may have a nonmagnetic metal barrier between the two magnetic layers.
A mutual orientation of magnetization vectors of the two magnetic layers may have two reversible states, a parallel state and an antiparallel state. A mutual orientation of magnetization vectors of the two magnetic layers may have two reversible states, a perpendicular state and a non-perpendicular state.
The Josephson junction may have a critical current selectively dependent on a mutual orientation of magnetization vectors of the two magnetic layers. The critical current may change dependent on a change of the mutual orientation of magnetization vectors of the two magnetic layers. The memory cell may further comprise an output port configured to read out a state of the magnetic junction by measurement of a critical current of the Josephson junction.
The memory cell may further comprise an input of the magnetic junction, configured to pass a spin-polarized current through the magnetic junction, to control a mutual magnetization orientation of the two magnetic layers.
The memory cell may further comprise an electrical control configured to control a magnetic field imposed on the two magnetic layers, and to change a mutual orientation of magnetization vectors of the two magnetic layers.
The electrical control may be further configured to control the mutual orientation of magnetization vectors of the two magnetic layers to assume a plurality of discrete states. The Josephson junction may be selectively responsive to each of the plurality of discrete states to produce a distinguishable response when the Josephson junction has an imposed bias. The plurality of discrete states may be, e.g., two states, three states, four states, or an arbitrary number of states. In general, a binary storage paradigm provides the maximum separation between states, but lower storage density than a paradigm which seeks to exploit existence of intermediate states, which may have higher error rates or involve more complex read and write logic.
The memory cell is configured in such a way that the Josephson junction has a critical current which varies by at least 20% responsive to the net magnetization vector of the magnetic junction. Likewise, the minimum critical current variation may be 25%, 30%, 35%, 40%, 45%, 50%, 60%, 75%, or even 100% (i.e., the critical current is fully suppressed).
The Josephson junction may comprise two superconducting layers and a non-superconducting layer situated between the two superconducting layers, at least one of the two superconducting layers extending over the magnetic junction, to thereby closely magnetically couple the magnetic junction and the Josephson junction.
A still further object of the present invention provides a memory array comprising a plurality of memory cells arranged in a regular manner, each memory cell comprising: a magnetic junction comprising two magnetic layers, with respectively different coercive forces and distinctly-controlled magnetization vectors, and a non-magnetic layer situated between the two magnetic layers; a Josephson junction having at least one superconducting layer extending over the magnetic junction in close proximity to a surface of the magnetic junction, the Josephson junction being configured to have a critical current which varies by at least 15% responsive to a net magnetization vector of the magnetic junction; and at least two input ports, configured to address respective memory cells of the regular array of the plurality of memory cells.
Each respective memory cell may be separately addressable by selection operations on each of the at least two input ports.
The plurality of memory cells may be arranged in a rectangular array having rows and columns, and the at least two input ports comprise a row select input and a column select input.
The memory array may be controlled by an automated control configured to generate selection signals for the at least two input ports. The automated control may be further configured to determine a state of the Josephson junction while generating the selection signals for the at least two independent inputs. The automated control may be configured to perform READ and WRITE operations of respective memory cells using superconducting input and output lines.
The distinctly controlled magnetization vectors of the magnetic layers may be switchable between a parallel orientation and an anti-parallel orientation using control lines carrying an electric current or a spin-polarized current through the magnetic junction, wherein the parallel orientation results in net magnetization vector increase and the antiparallel orientation results in net magnetization vector decrease. The distinctly controlled magnetization vectors of the magnetic layers may be switchable between a parallel orientation and a perpendicular orientation using control lines carrying an electric current or a spin-polarized current through the magnetic junction, wherein the parallel orientation results in net magnetization vector disposed along a parallel axis and the perpendicular orientation results in net magnetization vector deviating from the parallel axis. The distinctly controlled magnetization vectors of the magnetic layers may be switchable between a parallel orientation, an antiparallel orientation, a left perpendicular orientation, and a right perpendicular orientation, using control lines carrying an electric current or a spin-polarized current through the magnetic junction, wherein the Josephson junction is selectively responsive to at least four different net magnetization vectors.
Each memory cell may comprise a first magnetic layer and a second magnetic layer, the first and second magnetic layers having independently controlled net magnetization vectors, the Josephson junction being selectively responsive to each of the net magnetization vectors of the first magnetic layer and the second magnetic layer, to provide at least two states responsive to a net magnetization vectors of the first magnetic layer and the second magnetic layer.
The Josephson junction may be proportionally responsive to a magnitude of a net magnetization vector to provide at least two states responsive to the net magnetization vector magnitude.
The Josephson junction may be proportionally responsive to an angle of a net magnetization vector to provide at least two states responsive to the net magnetization vector angle.
The magnetization vectors of the magnetic layers comprising the magnetic junction may be switchable between at least a parallel state, an anti-parallel state, and a mutually perpendicular state using respective control lines carrying an electric current or a spin-polarized current through the magnetic junction.
The regular array may have rows and columns, and a specific memory cell of the plurality of memory cells may be addressable by a diagonal selection operation.
The regular array may have rows and columns, and a specific memory cell of the plurality of memory cells may be addressable by a combination of a row selection, a column selection and a diagonal selection of the at least two input ports.
Each input may comprise a superconductive line.
The control for the memory array may be implemented in traditional logic (with appropriate interface and buffering), or as discussed in U.S. Patent Application Nos. 20200106444, or 20200090738, for example. In general, the controller for the memory array includes circuitry (which may be superconducting logic) that translates a request into a memory array address, address the storage elements storing the desired data, or where the desired data is to be stored, after an appropriate time to read or write the data (my injecting an electrical current or spin current), which may be a single clock cycle, read the data into the control over the output lines. In some cases, it is appropriate to verify a logic write, and as such, the read operation may be part of both read and write operations. In some cases, the write operation takes more than one clock cycle to obtain a reliable rotation of the magnetic field, and in the case of non-binary rotation, the duration of application of the current may determine an amount of rotation of the magnetic field vector. The time may conveniently be measured in clock cycles. A field programmable logic array (FPLA) operating at room temperature may provide and process control signals for the memory array.
Referring to
In a particular embodiments shown in
In the second case, there is no antiferromagnetic layer, but the magnetic layers 4 and 6 have different coercive fields, so that their magnetization vectors can be switched at different values of the magnetic field. The magnetization vectors of the magnetic layers can be oriented either parallel or perpendicular to the planes of the films comprising the cell structure. The barrier material 5 can be either an insulating or a conductive material that provides indirect exchange coupling between the magnetic layers 4 and 6.
An example of such indirect exchange coupling is the Ruderman-Kittel-Kasuya-Yosida (RKKY) interaction in the case of a metallic layer 5 (see P. Bruno, Phys. Rev. B 52, 411 (1995), and references therein), or, in a magnetic tunnel junction (MTJ), an exchange coupling between the ferromagnetic electrodes due to a torque generated by spin currents flowing through the tunnel junction (see J. C. Slonczewski, Phys. Rev. B 39, 6995 (1989)). The barrier 5 can be made from a combination of these insulating and conductive materials.
Furthermore, two superconducting wires 8 and 9, which are electric control lines, are situated in close proximity to the magnetic junction 101, electrically insulated from each other and from the magnetic junction 101. These wires, by feeding currents Ix and Iy, serve to provide an external magnetic field needed to change the magnetization vector direction of the soft magnetic layer (being one of the layers 4 and 6) or both magnetic layers 4 and 6. Electrical contacts are established on the exposed edges of the superconducting layer 3 and the superconducting layer 1, and another electrical contact may be established to the superconducting layer 7 (not shown in
The operational principle of the memory cell in accordance with the present invention is explained by reference to
In the case of
Referring to
Referring to
In a preferred embodiment, the Josephson junction may comprise superconducting thin films of niobium, with a critical temperature of 9.2 K. The barrier of the Josephson junction may comprise a thin layer of insulating aluminum oxide of order 1 nm thick. Alternatively, other superconducting materials can be used for the electrodes of the Josephson junction, for example, films of niobium nitride with a critical temperature of about 16 K, or MgB2 with a critical temperature as high as 39 K.
Preferred magnetic materials may comprise both soft and hard magnetic materials. For example, one may use permalloy, a nickel-iron alloy with about 80% nickel. Other soft magnetic materials for cryogenic temperatures might include dilute alloys of Pd in Fe or copper-nickel alloys. The hard magnetic material may comprise pure nickel, or other materials known in the art.
The memory cell may be very compact, limited only by the size of the Josephson junction. Current Josephson junction fabrication technology enables junctions that are down to 200 nm in transverse dimensions. This is much smaller than prior art cryogenic memory technologies that comprise superconducting loops and multiple junctions, and have scales of several micrometers or more. Switching times for the write operation are limited by the switching time for the magnetic domain in the soft magnetic material, about 1 ns. Read times do not require switching magnetic domains, and can be of order 10 ps using low-power single-flux-quantum electronics.
The memory density of an array can be greater than 1 Mb/mm2.
The array is organized in such a way that a plurality of the Josephson junctions 100 are connected in series, using the wires 200, in the rows along the x axis. The corresponding plurality of the magnetic junctions 101 do not need to have electric contacts in this embodiment; however, such electric contact may be realized in other embodiments in accordance with the disclosed invention. Magnetization reversal of the “soft” magnetic layer (the bottom layer 4 in the magnetic junctions 101 in
The READ operation for the memory array is illustrated in
During the READ operation, a current pulse with the amplitude of Ir is supplied to the desired row of Josephson junctions; simultaneously, a current pulse with the amplitude of I′y is supplied to the respective column in order to select a Josephson junction whose state needs to be read out. The magnitude of I′y is such that it creates a magnetic field that shifts Ic(H) along the H axis but cannot reverse the magnetization in any of the magnetic layers in the magnetic junction 101. The shifted Ic(H) curves are shown as thin dashed line for the AP magnetization orientation in the half-selected cells and thick dashed line for the P magnetization orientation in the selected cell (encircled with the thick dotted line in
As a result of this READ procedure, the Josephson junction 100 in the selected cell undergoes transition into the resistive state if the magnetic junction 101 is in P state, but remains superconductive if the magnetic junction 101 is in AP state. The occurrence or absence of the switching event into the resistive state is registered as the presence or absence of a voltage pulse across the selected row, which determines the state of the selected cell.
Note that without the current I′y that selects the cell for readout operation along the y axis, the read current Ir cannot switch the Josephson junction 100 into the resistive state even if its critical current is depressed by the P state of the magnetic junction 101. Therefore, all the cells with the depressed critical current (if any in the selected column), except for the selected cell, remain superconductive. Thus, the energy dissipation during the READ operation is minimal and is estimated to be ˜1 fJ for an estimated read latency of 0.1 ns. The WRITE operation causes negligible energy dissipation within the array, because the control current flows through the superconducting lines.
In another embodiment in accordance with the present invention, the memory cells and the control lines can be arranged in an array as shown in
In yet another embodiment according to the present invention, the memory cells disclosed in this invention are arranged in an array shown in
Note that, in addition to the embodiments presented in
The present application is a non-provisional of, and claims benefit of priority under 35 U.S.C. § 119(e) from U.S. Provisional Patent Application No. 63/021,056, filed May 6, 2021, the entirety of which is expressly incorporated herein by reference.
| Number | Name | Date | Kind |
|---|---|---|---|
| 11024791 | Murduck | Jun 2021 | B1 |
| 11433233 | Manicka | Sep 2022 | B2 |
| 20150043273 | Naaman | Feb 2015 | A1 |
| Number | Date | Country | |
|---|---|---|---|
| 63021056 | May 2020 | US |
