For an electronic apparatus in which data is transferred between a plurality of processing devices and a memory, a technique is provided which prevents the data transfer from being restricted and allows the processing devices to operate efficiently. The order of priorities of data transfer operations through channels is changed on the basis of a relation between thresholds and the amounts of data remaining respectively in FIFO buffers. This prevents the FIFO buffers from becoming empty of data, or from being filled up with data, which allows the devices to operate efficiently.
Description
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram illustrating the configuration of a digital still camera;
FIG. 2 is a block diagram schematically illustrating the data transfer; and
FIG. 3 is a flowchart showing a procedure of operations performed by the memory interface.
Claims
1. A memory control apparatus that controls data transfer between a plurality of devices and a memory, comprising:
a parameter-recognizable portion having a parameter whose values are externally recognizable, said parameter serving as a basis for determining an order of priorities indicating which of said plurality of devices should be given a right to perform said data transfer; anda priority order setting portion that sets said order of priorities on the basis of the values of said parameter.
2. The memory control apparatus according to claim 1,
wherein said parameter-recognizable portion includes a plurality of buffers that are assigned to said plurality of devices, andsaid parameter is information about the amounts of data remaining respectively in said plurality of buffers.
3. The memory control apparatus according to claim 2, wherein, when receiving a first urgency notice signal that is sent when said amount of data remaining in some one of said buffers is above a predetermined threshold, said priority order setting portion raises the priority of the data transfer performed by the device that is sending the first urgency notice signal.
4. The memory control apparatus according to claim 2, wherein, when receiving a second urgency notice signal that is sent when said amount of data remaining in some one of said buffers is below a predetermined threshold, said priority order setting portion raises the priority of the data transfer performed by the device that is sending the second urgency notice signal.
5. The memory control apparatus according to claim 2, further comprising a threshold setting portion that sets a threshold of said parameter individually for each of said plurality of buffers.
6. The memory control apparatus according to claim 5, wherein said data transfer is performed according to Direct Memory Access.
7. The memory control apparatus according to claim 6,
wherein said priorities are assigned as default values respectively to said plurality of buffers independently of said parameter, andsaid priority order setting portion changes said priorities from said default values on the basis of the values of said parameter.
8. The memory control apparatus according to claim 7,
wherein said plurality of devices are devices that process image data in a digital still camera, anda highest one of said priorities is assigned as the default value to one of said plurality of devices that operates to accept the image data from outside.
9. A memory control method for controlling data transfer between a plurality of devices and a memory, comprising the steps of:
(a) recognizing values of a parameter that serves as a basis for determining an order of priorities indicating which of said plurality of devices should be given a right to perform said data transfer; and(b) setting said order of priorities on the basis of the values of said parameter.
10. The memory control method according to claim 9,
wherein said parameter is information about the amounts of data remaining respectively in a plurality of buffers assigned to said plurality of devices.
11. The memory control method according to claim 10, wherein, in said step (b), upon reception of a first urgency notice signal that is sent when said amount of data remaining in some one of said buffers is above a predetermined threshold, the priority of the data transfer performed by the device that is sending the first urgency notice signal is raised.
12. The memory control method according to claim 10, wherein, in said step (b), upon reception of a second urgency notice signal that is sent when said amount of data remaining in some one of said buffers is below a predetermined threshold, the priority of the data transfer performed by the device that is sending the second urgency notice signal is raised.
13. The memory control method according to claim 10, further comprising the step (c) of setting a threshold of said parameter individually for each of said plurality of buffers.
14. The memory control method according to claim 13, wherein said data transfer is performed according to Direct Memory Access.
15. The memory control method according to claim 14,
wherein said priorities are assigned as default values respectively to said plurality of buffers independently of said parameter, andin said step (b), said priorities are changed from said default values on the basis of the values of said parameter.
16. The memory control method according to claim 15,
wherein said plurality of devices are devices that process image data in a digital still camera, anda highest one of said priorities is assigned as the default value to one of said plurality of devices that operates to accept the image data from outside.
Patent Application
20070171916
