The present application relates to various embodiments of image display systems and image processing methods that utilize a plurality of line buffer memory with a plurality of gamut mapping modules.
In commonly owned United States patents and patent applications: (1) United States Patent Application Publication Number 2002/0015110 entitled “ARRANGEMENT OF COLOR PIXELS FOR FULL COLOR IMAGING DEVICES WITH SIMPLIFIED ADDRESSING,” filed Jul. 25, 2001, and now issued as U.S. Pat. No. 6,903,754; (2) United States Patent Application Publication Number 2004/0046714 (“the '714 application”) (Ser. No. 10/024,326), entitled “IMPROVEMENTS TO COLOR FLAT PANEL DISPLAY SUB-PIXEL ARRANGEMENTS AND LAYOUTS,” filed Dec. 14, 2001; (3) United States Patent Application Publication Number 2003/0128225 (“the '225 application”) (Ser. No. 10/278,353), entitled “IMPROVEMENTS TO COLOR FLAT PANEL DISPLAY SUB-PIXEL ARRANGEMENTS AND LAYOUTS FOR SUB-PIXEL RENDERING WITH INCREASED MODULATION TRANSFER FUNCTION RESPONSE,” filed Oct. 22, 2002; (4) United States Patent Application Publication Number 2003/0128179 (“the '179 application”) (Ser. No. 10/278,352), entitled “IMPROVEMENTS TO COLOR FLAT PANEL DISPLAY SUB-PIXEL ARRANGEMENTS AND LAYOUTS FOR SUB-PIXEL RENDERING WITH SPLIT BLUE SUB-PIXELS,” filed Oct. 22, 2002; (5) United States Patent Application Publication Number 2004/0051724 (“the '724 application”) (Ser. No. 10/243,094), entitled “IMPROVED FOUR COLOR ARRANGEMENTS AND EMITTERS FOR SUB-PIXEL RENDERING,” filed Sep. 13, 2002; (6) United States Patent Application Publication Number 2003/0117423 (“the '423 application”) (Ser. No. 10/278,328), entitled “IMPROVEMENTS TO COLOR FLAT PANEL DISPLAY SUB-PIXEL ARRANGEMENTS AND LAYOUTS WITH REDUCED BLUE LUMINANCE WELL VISIBILITY,” filed Oct. 22, 2002; (7) United States Patent Application Publication Number 2003/0090581 (“the '581 application”) (Ser. No. 10/278,393), entitled “COLOR DISPLAY HAVING HORIZONTAL SUB-PIXEL ARRANGEMENTS AND LAYOUTS,” filed Oct. 22, 2002; (8) United States Patent Application Publication Number 2004/0080479 (“the '479 application”) (Ser. No. 10/347,001), entitled “IMPROVED SUB-PIXEL ARRANGEMENTS FOR STRIPED DISPLAYS AND METHODS AND SYSTEMS FOR SUB-PIXEL RENDERING SAME,” filed Jan. 16, 2003; (9) United States Patent Application Publication Number 2004/0140983 (“the '983 application”) (Ser. No. 10/349,768), entitled “SYSTEMS AND METHODS OF SUBPIXEL RENDERING IMPLEMENTED ON DISPLAY PANELS,” filed Jan. 22, 2003, each of which is herein incorporated by reference in its entirety, novel sub-pixel arrangements are disclosed for improving the cost/performance curves for image display devices.
For certain subpixel repeating groups having an even number of subpixels in a horizontal direction, the following systems and techniques to affect improvements, e.g. proper dot inversion schemes and other improvements, are disclosed and are herein incorporated by reference in their entirety: (1) United States Patent Application Publication Number 2004/0246280 (“the '280 application”) (Ser. No. 10/456,839), entitled “IMAGE DEGRADATION CORRECTION IN NOVEL LIQUID CRYSTAL DISPLAYS,” filed Jun. 6, 2003; (2) United States Patent Application Publication Number 2004/0246213 (“the '213 application”) (Ser. No. 10/455,925), entitled “DISPLAY PANEL HAVING CROSSOVER CONNECTIONS EFFECTING DOT INVERSION,” filed Jun. 6, 2003; (3) United States Patent Application Publication Number 2004/0246381 (“the '381 application”) (Ser. No. 10/455,931), entitled “SYSTEM AND METHOD OF PERFORMING DOT INVERSION WITH STANDARD DRIVERS AND BACKPLANE ON NOVEL DISPLAY PANEL LAYOUTS,” filed Jun. 6, 2003; (4) United States Patent Application Publication Number 2004/0246278 (“the '278 application”) (Ser. No. 10/455,927), entitled “SYSTEM AND METHOD FOR COMPENSATING FOR VISUAL EFFECTS UPON PANELS HAVING FIXED PATTERN NOISE WITH REDUCED QUANTIZATION ERROR,” filed Jun. 6, 2003; (5) United States Patent Application Publication Number 2004/0246279 (“the '279 application”) (Ser. No. 10/456,806), entitled “DOT INVERSION ON NOVEL DISPLAY PANEL LAYOUTS WITH EXTRA DRIVERS,” filed Jun. 6, 2003; (6) United States Patent Application Publication Number 2004/0246404 (“the '404 application”) (Ser. No. 10/456,838), entitled “LIQUID CRYSTAL DISPLAY BACKPLANE LAYOUTS AND ADDRESSING FOR NON-STANDARD SUBPIXEL ARRANGEMENTS,” filed Jun. 6, 2003; (7) United States Patent Application Publication Number 2004/0246393 (“the '393 application”) (Ser. No. 10/456,794), entitled “ALTERNATIVE THIN FILM TRANSISTORS FOR LIQUID CRYSTAL DISPLAYS,” filed Jun. 6, 2003; (8) United States Patent Application Publication Number 2005/0083277 (“the '277 application”) (Ser. No. 10/696,236), entitled “IMAGE DEGRADATION CORRECTION IN NOVEL LIQUID CRYSTAL DISPLAYS WITH SPLIT BLUE SUBPIXELS”, filed Oct. 28, 2003; and (9) United States Patent Application Publication Number 2005/0212741 (“the '741 application”) (Ser. No. 10/807,604), entitled “IMPROVED TRANSISTOR BACKPLANES FOR LIQUID CRYSTAL DISPLAYS COMPRISING DIFFERENT SIZED SUBPIXELS”, filed Mar. 23, 2004.
These improvements are particularly pronounced when coupled with sub-pixel rendering (SPR) systems and methods further disclosed in those applications and in commonly owned United States patents and patent applications: (1) United States Patent Application Publication Number 2003/0034992 (“the '992 application”) (Ser. No. 10/051,612), entitled “CONVERSION OF A SUB-PIXEL FORMAT DATA TO ANOTHER SUB-PIXEL DATA FORMAT,” filed Jan. 16, 2002; (2) United States Patent Application Publication Number 2003/0103058 (“the '058 application”) (Ser. No. 10/150,355), entitled “METHODS AND SYSTEMS FOR SUB-PIXEL RENDERING WITH GAMMA ADJUSTMENT,” filed May 17, 2002; (3) United States Patent Application Publication Number 2003/0085906 (“the '906 application”) (Ser. No. 10/215,843), entitled “METHODS AND SYSTEMS FOR SUB-PIXEL RENDERING WITH ADAPTIVE FILTERING,” filed Aug. 8, 2002; (4) United States Patent Application Publication Number 2004/0196302 (“the '302 application”) (Ser. No. 10/379,767) entitled “SYSTEMS AND METHODS FOR TEMPORAL SUB-PIXEL RENDERING OF IMAGE DATA” filed Mar. 4, 2003; (5) United States Patent Application Publication Number 2004/0174380 (“the '380 application”) (Ser. No. 10/379,765), entitled “SYSTEMS AND METHODS FOR MOTION ADAPTIVE FILTERING,” filed Mar. 4, 2003; (6) United States Patent Application Publication Number 2004/0174375 (“the '375 application”) entitled “SUB-PIXEL RENDERING SYSTEM AND METHOD FOR IMPROVED DISPLAY VIEWING ANGLES” filed Mar. 4, 2003 and now issued as U.S. Pat. No. 6,890,219; and (7) United States Patent Application Publication Number 2004/0196297 (“the '297 application”) (Ser. No. 10/409,413), entitled “IMAGE DATA SET WITH EMBEDDED PRE-SUBPIXEL RENDERED IMAGE” filed Apr. 7, 2003. All of which are all hereby incorporated herein by reference in their entirety.
Improvements in gamut conversion and mapping are disclosed in commonly owned and co-pending United States patents and patent applications: (1) United States Patent Application Publication Number 2005/0083345 entitled “HUE ANGLE CALCULATION SYSTEM AND METHODS”, filed Oct. 21, 2003, now issued as U.S. Pat. No. 6,890,219; (2) United States Patent Application Publication Number 2005/0083341 (“the '341 application”) (Ser. No. 10/691,377), entitled “METHOD AND APPARATUS FOR CONVERTING FROM SOURCE COLOR SPACE TO RGBW TARGET COLOR SPACE”, filed Oct. 21, 2003; (3) United States Patent Application Publication Number 2005/0083352 (“the '352 application.”) (Ser. No. 10/691,396), entitled “METHOD AND APPARATUS FOR CONVERTING FROM A SOURCE COLOR SPACE TO A TARGET COLOR SPACE”, filed Oct. 21, 2003; and (4) United States Patent Application Publication Number 2005/0083344 (“the '344 application”) (Ser. No. 10/690,716), entitled “GAMUT CONVERSION SYSTEM AND METHODS” filed Oct. 21, 2003. All of which are all hereby incorporated herein by reference in their entirety.
Additional advantages have been described in (1) United States Patent Application Publication Number 2005/0099540 (“the '540 application”) (Ser. No. 10/696,235), entitled “DISPLAY SYSTEM HAVING IMPROVED MULTIPLE MODES FOR DISPLAYING IMAGE DATA FROM MULTIPLE INPUT SOURCE FORMATS”, filed Oct. 28, 2003; and (2) United States Patent Application Publication Number 2005/0088385 (“the '385 application”) (Ser. No. 10/696,026), entitled “SYSTEM AND METHOD FOR PERFORMING IMAGE RECONSTRUCTION AND SUBPIXEL RENDERING TO EFFECT SCALING FOR MULTI-MODE DISPLAY” filed Oct. 28, 2003, each of which are all hereby incorporated herein by reference in their entirety.
Additionally, these co-owned and co-pending applications are herein incorporated by reference in their entirety: (1) United States Patent Application Publication Number 2005/0225548 (“the '548 application”) (Ser. No. 10/821,387), entitled “SYSTEM AND METHOD FOR IMPROVING SUB-PIXEL RENDERING OF IMAGE DATA IN NON-STRIPED DISPLAY SYSTEMS” filed Apr. 9, 2004; (2) United States Patent Application Publication Number 2005/0225561 (“the '561 application”) Ser. No. 10/821,386), entitled “SYSTEMS AND METHODS FOR SELECTING A WHITE POINT FOR IMAGE DISPLAYS” filed Apr. 9, 2004; (3) United States Patent Application Publication Number 2005/0225574 (“the '574 application”) and United States Patent Application Publication Number 20050225575 (“the '575 application”) (Ser. Nos. 10/821,353 and 10/961,506) respectively,—both entitled “NOVEL SUBPIXEL LAYOUTS AND ARRANGEMENTS FOR HIGH BRIGHTNESS DISPLAYS” filed Apr. 9, 2004 and Oct. 7, 2004 respectively; (4) United States Patent Application Publication Number 2005/0225562 (“the '562 application”) (Ser. No. 10/821,306), entitled “SYSTEMS AND METHODS FOR IMPROVED GAMUT MAPPING FROM ONE IMAGE DATA SET TO ANOTHER” filed Apr. 9, 2004; (5) United States Patent Application Publication Number 2005/0225563 (“the '563 application”) (Ser. No. 10/821,388), entitled “IMPROVED SUBPIXEL RENDERING FILTERS FOR HIGH BRIGHTNESS SUBPIXEL LAYOUTS” filed Apr. 9, 2004; (6) United States Patent Application Publication Number [2005/0276502] (“the '502 application”) (Ser. No. 10/866,447), entitled “INCREASING GAMMA ACCURACY IN QUANTIZED DISPLAY SYSTEMS” filed Jun. 10, 2004. All of which are all hereby incorporated by reference.
Additional improvements to, and embodiments of, display systems and methods of operation thereof are described in: (1) Patent Cooperation Treaty (PCT) Application No. PCT/US 06/12768, entitled “EFFICIENT MEMORY STRUCTURE FOR DISPLAY SYSTEM WITH NOVEL SUBPIXEL STRUCTURES” filed Apr. 4, 2006, and published in the United States as United States Patent Application Publication 200Y/AAAAAA (“the 'AAA application”); (2) Patent Cooperation Treaty (PCT) Application No. PCT/US 06/12766, entitled “SYSTEMS AND METHODS FOR IMPLEMENTING LOW-COST GAMUT MAPPING ALGORITHMS” filed Apr. 4, 2006, and published in the United States as United States Patent Application Publication 200Y/BBBBBBB (“the 'BBB application”); (3) U.S. patent application Ser. No. 11/278,675, entitled “SYSTEMS AND METHODS FOR IMPLEMENTING IMPROVED GAMUT MAPPING ALGORITHMS” filed Apr. 4, 2006, and published as United States Patent Application Publication 200Y/CCCCCCC (“the 'CCC application”); (4) Patent Cooperation Treaty (PCT) Application No. PCT/US 06/12521, entitled “PRE-SUBPIXEL RENDERED IMAGE PROCESSING IN DISPLAY SYSTEMS” filed Apr. 4, 2006, and published in the United States as United States Patent Application Publication 200Y/DDDDDDD (“the 'DDD application”); and (5) Patent Cooperation Treaty (PCT) Application No. PCT/US 06/NNNNN, entitled “MULTIPRIMARY COLOR SUBPIXEL RENDERING WITH METAMERIC FILTERING” filed on May 19, 2006 and published in the United States as United States Patent Application Publication 200Y/EEEEEEE (“the 'EEE application”). Each of these co-owned applications is also herein incorporated by reference in their entirety.
Technical Effect: The various embodiments of the display systems illustrated and described below have the technical effect of reducing the size of the line buffer memory needed to supply data to a subpixel rendering operation by utilizing a plurality of line buffer memory to provide data to a plurality of gamut mapping modules.
A display system comprises line buffer memory that stores input image data in a first color space, and a plurality of gamut mapping modules that accept the input image data from the line buffer memory and performs a gamut mapping operation to produce image data specified in a second color space. The system also includes a subpixel rendering module that renders the image data specified in the second color space for display on a display panel substantially comprised of a particular subpixel repeating group. The system architecture utilizes a plurality of gamut mapping modules which in turn allows for a reduction in the size of line buffer memory needed for the subpixel rendering operation.
An image processing method renders an image onto a display panel substantially comprising a subpixel repeating group. The method comprises receiving input image data specified in a first color space and indicating a portion of the image, and storing the input image data in a plurality of line buffer memory. The method further comprises performing a gamut mapping operation using the input image data stored in the plurality of line buffer memory to produce mapped image data indicating image data values in a second color space; and performing a subpixel rendering operation using the mapped image data to produce subpixel data values for rendering the portion of the image on the display panel.
The organization and methods of operation of the image processing systems and techniques are best understood from the following description of several exemplary implementations and embodiments when read in connection with the accompanying drawings, wherein the same reference numbers are used throughout the drawings to refer to the same or like parts. The accompanying drawings are incorporated in and constitute a part of this specification.
With continued reference to
In portion 100 of the conventional display system of
The result of the subpixel rendering operation performed by SPR unit 130 is an output image data set delivered via a data path (not shown) to an electronic display panel (not shown) for producing the resulting image thereon. When SPR unit 130 is included in the same device with an electronic display panel, the data path is included in the electronics in the display panel. Other implementations of the portion 100 of the display system of
The resolution of the display panel upon which the image data is displayed may influence the architecture of the display system illustrated in
Note that it will be appreciated that the dimensioning numbers (e.g. 320×50 bit, etc.) in
First Embodiment of a Display System Architecture
In addition, in the architecture illustrated in
In one implementation for example, the 10 bit red data from each GMA block 110 are compared and processed in SPR unit 130 to produce the output red data values for the red subpixels of the display panel. Additionally, data from the other color channels may be used for an image sharpening operation, as discussed, for example, in US 2005/0225563, and in others of the patent application publications herein incorporated by reference. Green, Blue, and White data may be processed in a similar manner.
In the example shown in
Second and Third Embodiment of a Display System Architecture
Input image data is input into a cascade 310 of line buffers 312 and a cascade 320 of GMA units 322. In this embodiment, one line buffer memory 312 is used for each input image data line to be processed. After an input image data line is processed by a GMA unit 322, and depending on the bit depth internal to GMA unit 322, the mapped image data output from each GMA unit 322 proceeds to SPR unit 330 in parallel as shown in
By way of example, display panel 710 is shown as substantially comprising subpixel repeating group 730, which is an eight subpixel repeating group disposed in two rows and having the sequence RWBG in the first row, and BGRW in the second row. Display panel 710 may also substantially comprise a subpixel repeating group having the sequence of RGBW subpixels in a first row, and BWRG subpixels in a second row. The particular subpixel repeating groups shown in
Alternative GMA-to-SPR Architecture
While the above illustrated embodiments have been described in connection with particular functional units, operations or hardware, the description is not intended to limit a particular implementation, and it will be understood by those skilled in the art that these functional units and operations can be implemented using any combination of hardware and/or software. For example, a programmable gate array or like circuitry can be configured to implement such functional blocks. In other examples, a microprocessor operating a program in memory can also implement such functional blocks. Thus, while the techniques and implementations have been described with reference to exemplary embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the appended claims. In addition, many modifications may be made to adapt a particular situation or material to the teachings without departing from the essential scope thereof. Therefore, the particular embodiments, implementations and techniques disclosed herein, some of which indicate the best mode contemplated for carrying out these embodiments, implementations and techniques, are not intended to limit the scope of the appended claims.
This application claims the benefit of U.S. Provisional Application 60/727,079 entitled MEMORY STRUCTURES FOR IMAGE PROCESSING, filed on Oct. 14, 2005, which is hereby incorporated by reference herein in its entirety.
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/US2006/040269 | 10/13/2006 | WO | 00 | 8/5/2009 |
Publishing Document | Publishing Date | Country | Kind |
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WO2007/047534 | 4/26/2007 | WO | A |
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