This disclosure relates generally to data communications, and more particularly to message correction in data communications.
In typical data communication systems (including wired and/or wireless communication systems such as radio frequency (RF) communications, cellular communications, optical communications, power line communications, etc.), a message may be sent from a source (e.g., a sending device) to a destination (e.g., one or more receiving devices). Occasionally, however, a message may not be received fully intact (e.g., one or more message blocks may be missing or corrupted). As an example, some communication networks (e.g., an Advanced Metering Infrastructure (AMI), the Internet of Things (IoT), Distributed Automation (DA), etc.), may use license free bands and their communications are therefore prone to suffer from interference resulting in messages not always being received successfully. Some known ways of overcoming the interference problem include adjusting data rates and modulation, and/or using segmentation to break large messages into smaller packets. Forward error correction (FEC) may also be used, in which a message is encoded in a redundant way using an error-correcting code (e.g., Reed-Solomon or other error-correcting code), which may allow limited errors to be corrected at the receiving device. Given current standards for various communication networks, limited options are available for error correction, however. With or without these solutions to deal with interference, if a message is not received correctly (e.g., a message block is missing or corrupted), the full message may need to be resent, or perhaps even re-routed through an alternate path to be delivered correctly. Furthermore, with interference levels being very dynamic and with much variation (e.g., in amplitude across time), it is difficult for many communication systems to adjust to changes efficiently using the currently known solutions. The methods currently used in an attempt to optimize communications tend to be slow and may also consume significant network capacity. These solutions have difficulty reacting to fast-changing network conditions and thus tend to converge to a sub-optimal state.
Some examples of typical data packets are shown in
In many communication systems, forward error correction (FEC) may be implemented by appending redundancy data to a data packet to detect and/or correct errors in the message block(s) of the payload.
Long message blocks and block codes may lead to very complex computations. Therefore, the length of message blocks and block codes may be limited in that a long message may be broken down into several blocks.
A known practice frequently used to improve forward error correction in multi-block packet communication is interleaving. Interleaving is often effective for burst error correction, where interference may have corrupted, or caused the loss of, sequential message symbols. Interleaving may be implemented in several ways. In one example, the redundancy symbols may be computed and ordered as shown in
Sequence diagrams of
As depicted in
The practices described above that are used to alleviate interference issues in data communications, while useful, do have drawbacks. Transmitting redundancy may slow down the network due to the time required to create, send, and decode the additional symbols. Also, if the redundancy is not enough to repair the packet at the receiving device, an entire data packet will need to be re-sent. Furthermore, while interleaving is generally effective, it may increase delay because an entire interleaved block must be received before the symbols can be decoded.
In the drawings, the leftmost digit(s) of a reference number may identify the drawing in which the reference number first appears.
The description herein discloses message correction techniques that may be used to dynamically optimize data transmissions while avoiding the downsides of the approaches currently used. The technology described herein provides efficient data correction and improved data transmission optimization with minimization of bandwidth usage and processing time, while maintaining the ability to adhere to a communication standard. As described in more detail below, the optimized error-correction techniques may further include dynamically adjusting to changes in the network and communication link conditions.
Embodiments are now described with reference to the figures, where like reference numbers may indicate identical or functionally similar elements. While specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the relevant art will recognize that other configurations and arrangements can be used without departing from the spirit and scope of the description. It will be apparent to a person skilled in the relevant art that the technology disclosed herein can also be employed in a variety of other systems and applications other than what is described herein.
Error Correction Code Selection and Setup
Prior to implementation of a communication system/method as described herein, an error correction code is to be selected and the code parameters/attributes defined. As mentioned above, there are various error correction codes that may be used. One example of an error correction code is the Reed-Solomon code, as would be familiar to those of ordinary skill in the relevant art. In this disclosure, the Reed-Solomon code will be the example code used as needed for description.
One attribute to be defined for a selected error correction code is symbol size. With a Reed-Solomon code, a typical symbol size is 8 bits (or 1 octet) The length of the resulting codeword is tied to the symbol size, such that the codeword length may be equal to 2(Symbol size)−1. Thus, for a symbol size of 8, the codeword length would be equal to 28−1, or 255 bytes. In coding theory, a codeword may include a message followed by its redundancy symbols. A codeword may be shortened if not all symbols are used. For example, if a Reed-Solomon message includes 180 symbols and is followed by 20 redundancy symbols, then there are 55 unused symbols. These unused symbols may be replaced by leading zeros in the codeword during the coding process. These leading zeros do not need to be included with a transmitted data packet, and on the receiving end, the unused symbols may need to be replaced again with zeros for the decoding process. Shortened codes require less computing power, and also increase the error detection capability. (For example, if symbols 1 to 55 are unused, and if the decoder indicates that symbol number 5 is incorrect, it would become apparent that the decoding process failed and that an error remains uncorrected.)
The symbol size attribute, and other attributes (e.g., number of redundancy symbols per codeword, number of symbols per codeword, interleaving pattern (if used), etc.), for a selected error correction code should ideally be chosen after a system analysis. The chosen attributes may depend on such aspects as the probability of losing data packets, the computing power available, the amount of redundancy that can be afforded, etc. Once the error correction code has been selected and its attributes defined, a determination of how to split the redundancy symbols into several parts, with each part to be sent in a different iteration, needs to occur, as discussed in more detail below.
Data Packet Generation
Referring to
The use of redundancy information in a data packet is optional, but beneficial to correct any errors in a message without necessarily having to resort to a resend of the original data packet. To generate the redundancy information, the sending device (e.g., via data packet generator 348) may divide message 462 into blocks or symbols, and for each block/symbol, redundancy symbols may be generated. Redundancy symbols are the result of a polynomial division based on an input message, where the remainder of the division is a sequence of redundancy symbols. (The generation of redundancy symbols is a known process and will not be discussed further in this document.) Once the redundancy symbols are generated, they may be appended to message 462 as error correction code 464 to complete codeword 460. In the example shown, error correction code 464 is made up of a first iteration error correction code 470, a second iteration error correction code 472, and a third iteration error correction code 474. While in this example three iterations are shown, the error correction code may include a different number of iterations. The maximum number of iterations generated/appended may be limited by the chosen codeword length.
In an embodiment, error detection may be used for each individual message block, in addition to or instead of using error detection for the entire message as discussed above with regard to error detection code 468. The error detection method (e.g., the error detection polynomial used) may be part of the system design and known to both sending devices and receiving devices (as would also be the error correction code), as would be understood by those of ordinary skill in the relevant art. Referring to
Once this coding is complete, there may be additional coding and modulation conducted (including, e.g., scrambling, interleaving, spreading, pulse shaping, etc.), as would be understood by those of ordinary skill in the relevant art. Some modulations may use additional error correction coding. Thus, combined, or nested, error correction may be present, allowing for further reinforced error correction.
As stated above, once the parts of a data packet are determined, including its header(s), message, optional error detection code(s), and error correction code symbols for one or more iterations, the error correction code symbols to actually send with the initial message need to be determined, saving the rest for possible future sent iterations, if such iterations are needed. The determination of which error correction codes symbols to send (as well as the determination of other parameters related to the iterative decoding described herein) may be made in various ways. In an embodiment, these determinations may be predetermined, based on a prior system analysis, and the sending device and/or receiving device may be informed through configuration. In another embodiment, these determinations may be made (e.g., by the sending device) for each individual transmission (e.g., based on network condition history, past transmission statistics, etc.), with the sending device informing the receiving device via an additional header placed prior to the redundancy symbols, preferably so as to not interfere with standard header and message information (e.g., placed after the message but prior to redundancy symbols), or as a proprietary information element of the standard message header (which will be ignored by non-intended receiving devices). In a further embodiment, these determinations may be predetermined (e.g., for each individual sending device, or preconfigured as a default for all sending devices in the system), but may be dynamically adjusted based on past performance (e.g., network condition history, past transmission statistics, etc.). The initial data packet generated by a sending device may then include its header(s), message, optional error detection code(s), and the selected error correction code symbols for the first iteration. Any leading zeros and any placeholder zeros completing the codeword after the selected error correction symbols may be left off for the transmission. The data packet may then be transmitted to one or more receiving device(s) via any wired/wireless communications, as would be understood by those of ordinary skill in the relevant art.
Recognition of Included Redundancy
One key feature of this disclosure is the ability of an intended receiving device to recognize that redundancy blocks are included in a message, while other receiving devices remain ignorant of the redundancy information. This feature allows usage in a more general environment with various receiving devices. In such an environment, a transmitted message may be able to comply with a general communication standard while allowing particular devices to receive additional information. As such, an intended receiving device may recognize and read in redundancy blocks appended after the standard packet, whereas non-intended receiving devices will stop listening at the end of the standard packet, oblivious to the existence of the appended redundancy information. There are various ways that recognition of the existence of redundancy information may be accomplished. For example, in an embodiment, indication of the existence of, and/or the number of, redundancy blocks may be provided in additional header information of a transmitted message (again, preferably so as to not interfere with standard header and message information (e.g., placed after the message but prior to redundancy symbols, or in a proprietary information element of the standard message header)). An intended receiving device may be configured to, and/or may have processing logic to, allow the receiving device to recognize and understand the additional header information, while other receiving devices may ignore this additional header information.
In another embodiment, the receiving device may have the ability to recognize the existence of redundancy information in a message with simply the standard information provided in the header of a transmitted message. For example, a receiving device may maintain (e.g., via configuration manager 356) a configuration file, or information base, that may contain a collection of parameters (e.g., instructional parameters, regulatory parameters, etc.) that the receiving device needs to operate. This information base may contain a flag to “listen for redundancy information”. It may also contain a parameter that represents an expected number of redundancy symbols (e.g., in a first iteration, as further described below). Another parameter may be a flag to indicate that there are also error detection symbols present, which may be optionally used to detect whether errors are present after error correction is attempted, as discussed elsewhere herein. Upon implementation of a communication system, the flag for “listen for redundancy information” may be set to true or false. In an embodiment, this flag may be changed later if desired (e.g., depending on whether network conditions warrant use of this error correction capability or not). A receiving device, when receiving a message, may consult this “listen” flag. If the flag is set to “true”, the receiving device may run processing logic to determine (if there is no parameter, or additional header information, that specifically indicates the number of redundancy symbols) the expected number of redundancy symbols based on one or more other parameters provided in the information base and/or in the provided header information (e.g., packet length, symbol size, number of symbols per codeword, number of redundancy symbols per codeword, interleaving pattern (if used), etc.). After demodulating and decoding the message blocks, the receiving device may then continue demodulating and decoding the determined number of symbols for use in error detection and/or correction, as further discussed below.
Receiving a Transmission
An example of a data packet sent by a sending device and received by a receiving device is shown in
For error correction decoding of a multi-block message, the data packet may need to be separated into blocks, and decoder input codewords may need to be formed, including, for each message block, a message (optionally including error detection code) and a corresponding error correction code. For simplicity of description, the message 662A of data packet 600 will be considered a single-block message. For the initial attempt at error correction decoding, a first iteration decoder input codeword may be formed, as shown in
As will be described further below, if error correction is not successful, the receiving device may send a request to the sending device for further redundancy information associated with the earlier received data packet, after which the sending device may send to the receiving device a communication including the previously determined second iteration error correction code. The data packet sent with the second iteration error correction (and any follow-on iteration error correction code) may be recognizable only by intended receiving devices (e.g., via custom header information), whereas standard (not intended) receiving devices may reject these packets. Upon receipt of the second iteration error correction code, the receiving device may form a second iteration decoder input codeword as shown in
If after all available iterations of redundancy are used for decoding but errors are still present, a message may be sent to the sending device indicating that decoding the message was not successful. In an embodiment, a request for a resend of the original data packet may be sent to the sending device. If the error correction decoding appears to be successful, an acknowledgment of successful receipt of the message may be sent to the sending device from the receiving device. Note, however, that it is possible that the error correction decoder may fail to correct all of the errors but may not be aware of it. Error correction decoders may be optimized for error correction, not error detection, though they may have error detection capability. For this reason, it may be beneficial to use an error detection method to confirm successful correction prior to sending an acknowledgment of successful receipt. This may be done with the global error detection code included in the message payload, as discussed earlier. If individual block error detection is implemented, the integrity of each block may be verified with the individual error detection codes that may have been appended at the end of the message payload, as previously described. For the individual block verification, each message block may need to be re-associated with its corresponding error detection code block. When using this individual block verification, it will be known which individual blocks still contain errors.
In an embodiment, the request sent by receiving device 320 to sending device 318 for additional redundancy may include communication condition information from the perspective of receiving device 320. Sending device 318 may use this information to adjust parameters for sending subsequent communications more effectively. For example, receiving device 320 may be able to evaluate the link quality (e.g., receive signal strength, signal-to-noise ratio, noise time profile, etc.) and based on this evaluation may be able to provide useful information to sending device 318 that may be used to optimize future communications. Communication condition information provided by receiving device 320 may include, for example but not limitation, received signal strength, signal-to-noise ratio, noise time profile, modulation information, data rate information, and/or history of previous transmission failures. Parameters that may be adjusted based on the provided condition information may include, for example but not limitation, size of message blocks, size of correction blocks, amount of redundancy, modulation type, modulation rate, and/or data rate. Adjusting these parameters may result in an increase in the number of message blocks that are received correctly and/or that can be corrected without further requests for redundancy (for example, if there are many errors (e.g., above a predetermined threshold), the data rate may be decreased, etc.).
Referring now to
Referring now to
In the example given above with regard to data packet 706, three iterations of redundancy are shown. This is only an example and not intended to be a limitation. Any number of redundancy iterations may be used, up to the number of iterative redundancy blocks generated for a given message block. As described earlier, a maximum number of iterations generated may be limited by the chosen codeword length.
In an embodiment, a maximum number of redundancy iteration requests may be set as a threshold. Once the set maximum number of redundancy iteration requests is reached, or once all of the available iterative redundancy blocks have been sent, if the decoding of the message block at receiving device 320 is still not successful, a message may be sent by receiving device 320 to sending device 318 to inform sending device 318 of non-receipt. In an embodiment, sending device 318 may attempt to resend the data packet at some point in the future (e.g., immediately, after a predetermined time period, upon request from receiving device 320, etc.).
For message blocks that otherwise may be quite long, it may be beneficial to break the message blocks down into several message blocks.
Each message block of either of the example payloads (1004A or 1004B) may be decoded by receiving device 320 as described above (and would be understood by those of ordinary skill in the art). If decoding of all message blocks by receiving device 320 is successful, receiving device 320 may send to sending device 318 an acknowledgement of successful receipt (optionally after using error detection to confirm the errors were indeed corrected). If decoding of any of the message blocks is not successful (e.g., if a message block is missing, corrupted, empty, etc.), receiving device 320 may send a request to sending device 318 for additional redundancy. In an embodiment, the request for redundancy may include condition information from the perspective of receiving device 320 that sending device 318 may use to adjust parameters for sending subsequent communications, as discussed above. In response to receiving a request for redundancy from receiving device 320, sending device 318 may send a redundancy data packet 1000C (
In an embodiment, receiving device 320 may specifically identify one or more message blocks that could not be successfully decoded, and the request for redundancy sent by receiving device 320 to sending device 318 may include an indication of which message blocks were needed. Following the example regarding data packets 1000A or 1000B, if receiving device 320 determines that only the second message block is needed, receiving device 320 may indicate that in its request for redundancy to sending device 318, and sending device 318 may, in response, send redundancy data packet 1000D (
Receiving device 320 may then use the received redundancy block(s) to decode the message blocks of data packet 1000A or 1000B. If decoding of all (or the remaining) message blocks by receiving device 320 is successful, receiving device 320 may send to sending device 318 an acknowledgement of successful receipt (optionally after using error detection to confirm the errors were indeed corrected). If decoding of any of the message blocks is still not successful, receiving device 320 may send another request to sending device 318 for additional redundancy, and so on. In an embodiment, a maximum number of redundancy iterations may be available or set as a threshold, as discussed above.
For the example data packets 1000A/1000B, only two message blocks are shown for simplicity and ease of understanding. This is not meant to be a limitation, as any number of message blocks may be included.
As discussed above, in an embodiment, a receiving device (e.g., 320) may be able to identify which message blocks may need additional redundancy to be repaired via the error correction process described. A receiving device's ability to do so may depend upon the parameters/attributes of the error correction code used, the block length, etc. In some instances, it may be useful to transmit redundancy dedicated to error detection (e.g., using Cyclic Redundancy Check (CRC) or other types of error detection methods) and redundancy dedicated to error correction separately.
If decoding of the message blocks by receiving device 320 is successful, receiving device 320 may send to sending device 318 an acknowledgement of successful receipt, as discussed above. If decoding of any of the message blocks is not successful, receiving device 320 may send a request to sending device 318 for additional redundancy. In an embodiment, the request for redundancy may include condition information from the perspective of receiving device 320 that sending device 318 may use to adjust parameters for sending subsequent communications, as discussed above. In response to receiving a request for redundancy from receiving device 320, sending device 318 may send a redundancy data packet 1100C (
At 1508, receiving device 320/1220 (e.g., via processor(s) 350) may determine that one or more of the message blocks is defective (e.g., corrupted, missing, etc.), which may be done in a manner known or understood by one of ordinary skill in the relevant art. At 1510, one or more of the received redundancy blocks may be used to correct the one or more defective message blocks (e.g. in a manner known or understood by one of ordinary skill in the relevant art). Optionally, at 1512, receiving device 320/1220 may determine whether the error correction is successful (e.g., via a known error detection method). Also optionally, at 1514, a response message may be sent to sending device 318/1218 from receiving device 320/1220. If all of the one or more defective message blocks were successfully corrected, the response message may include an indication to sending device 318/1218 that all of the message blocks of the data packet were received successfully. If one or more of the defective message blocks could not be corrected, the response message may include a request for one or more redundancy blocks to be used to correct the defective message block(s). In an embodiment, the redundancy request may indicate specifically which message blocks were defective and/or which redundancy blocks were needed. According to an embodiment, the response message may include information regarding network conditions that may indicate to sending device 318/1218 that communication parameters may need to be changed for subsequent messages.
Example Environment(s)/Device(s)
In an expanded view, data collection device 1743 (and/or mobile data collection device 1749) may include, among other components, one or more controllers or processors 1751, a memory 1753, one or more communication system and/or interfaces 1755 (e.g., configured for RF communications, cellular communications, and/or another type of communications), and optionally a display 1757. Nodes 1747 may include, among other components, one or more controllers or processors 1759, a memory 1761, one or more communication systems and/or interfaces 1763 (e.g., configured for RF communications, cellular communications, and/or another type of communications), and one or more sensors/devices 1765, which may include, for example, one or more measurement sensors or other devices (e.g., meter(s), actuator(s), light(s), etc.). Data collection device 1743 (and/or mobile data collection device 1749), as well as each node 1747, may be a sending device (318/1218), a receiving device (320/1220), or both.
One or more features disclosed herein may be implemented in hardware, software, firmware, and/or combinations thereof, including discrete and integrated circuit logic, application specific integrated circuit (ASIC) logic, and microcontrollers, and may be implemented as part of a domain-specific integrated circuit package, or a combination of integrated circuit packages. The terms software and firmware, as may be used herein, refer to a computer program product including at least one computer readable medium having computer program logic, such as computer-executable instructions, stored therein to cause a computer system to perform one or more features and/or combinations of features disclosed herein. The computer readable medium may be transitory or non-transitory. An example of a transitory computer readable medium may be a digital signal transmitted over a radio frequency or over an electrical conductor, through a local or wide area network, or through a network such as the Internet. An example of a non-transitory computer readable medium may be a compact disk, a flash memory, SRAM, DRAM, a hard drive, a solid state drive, or other data storage device.
A processing platform of a data collection device (e.g., data collection device 1743 or mobile data collection device 1749 of
Processor(s) 1851 may be implemented by, for example but not limitation, one or more integrated circuits, logic circuits, microprocessors, controllers, etc. Processor(s) 1851 may include a local memory 1871 (e.g., a cache). Memory 1853 may include a volatile and/or a non-volatile memory. Volatile memory may be implemented by, for example but not limitation, Synchronous Dynamic Random Access Memory (SDRAM), Dynamic Random Access Memory (DRAM), and/or any other type of random access memory device. Non-volatile memory may be implemented by flash memory and/or any other desired type of memory device. Access to memory 1853 may be controlled by a memory controller (not shown). Data stored in memory 1853 and/or local memory 1871 may be used by processor(s) 1851 to facilitate data collection functions and/or communications, calculations/computations (e.g., if not done at the node device(s) or elsewhere), etc., according to embodiments of this disclosure.
Input/output port(s)/device(s) 1869 may allow a user or an external device to interface with processor(s) 1851. Input devices may allow a user to enter data and/or commands for processor(s) 1851. Input devices may include, for example, an audio sensor, a microphone, a camera (e.g., still, video, etc.), a keyboard, a button, a mouse, a touchscreen, a track-pad, a trackball, isopoint, a voice recognition system, etc. Output devices may provide or present information to a user. Output devices may include, for example, display devices such as display device 1757. Examples of other display devices may include a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display, a cathode ray tube display (CRT), a touchscreen, a tactile output device, a printer, speakers, etc. The input/output port(s)/device(s) may be connected to processor(s) 1851, for example, with an interface circuit (not shown). The interface circuit may be implemented by any type of interface standard, such as, for example, an Ethernet interface, a universal serial bus (USB), a PCI express interface, etc. For use with an output device, the interface circuit may include a graphics driver card, chip, and/or processor.
Communication interface(s) 1855 may be implemented in hardware or a combination of hardware and software, and may provide wired or wireless network interface(s) to one or more networks, such as network(s) 1745 of
Secondary storage device(s) 1867 may store processing logic 1873 (e.g., software) to be executed by processor(s) 1851, and/or may store data 1875. Processing logic 1873 and data 1875 may be used by processor(s) 1851 to facilitate data collection functions and/or communications between devices, calculations/computations (e.g., if not done at the node device(s) or elsewhere), etc., according to embodiments of this disclosure. Processing logic 1873 may include instructions for executing the methodology described herein for data communications, for example, which may also include data packet generation and/or configuration management. Examples of secondary storage device(s) 1867 may include one or more hard drive disks, compact disk (CD) drives, digital versatile disk (DVD) drives, Blu-ray disk drives, redundant array of independent disks (RAID) systems, floppy disk drives, flash drives, etc. Data and/or processing logic may be stored on a removable tangible computer readable storage medium (e.g., a floppy disk, a CD, a DVD, a Blu-ray disk, etc.) using one or more of the secondary storage device(s) 1867.
Processor(s) 1959 may be implemented by, for example but not limitation, one or more integrated circuits, logic circuits, microprocessors, controllers, etc. Processor(s) 1959 may include a local memory 1983 (e.g., a cache). Memory 1961 may include a volatile and/or a non-volatile memory. Volatile memory may be implemented by, for example but not limitation, Synchronous Dynamic Random Access Memory (SDRAM), Dynamic Random Access Memory (DRAM), and/or any other type of random access memory device. Non-volatile memory may be implemented by flash memory and/or any other desired type of memory device. Access to memory 1961 may be controlled by a memory controller (not shown). Data stored in memory 1961 and/or local memory 1983 may be used by processor(s) 1959 to facilitate data collection functions, calculations/computations, metering functions and/or metering calculations/computations (if embodied in a utility meter), and/or communications, etc., according to embodiments of this disclosure.
Input/output port(s)/device(s) 1979 may allow a user or an external device to interface with processor(s) 1959. Input devices may allow a user to enter data and/or commands for processor(s) 1959. Input devices may include, for example, an audio sensor, a microphone, a camera (e.g., still, video, etc.), a keyboard, a button, a mouse, a touchscreen, a track-pad, a trackball, isopoint, a voice recognition system, etc. Output devices may provide or present information to a user. Output devices may include, for example, display devices (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display, a cathode ray tube display (CRT), a touchscreen, a tactile output device, a printer, speakers, etc.). The input/output port(s)/device(s) 1979 may be connected to processor(s) 1959, for example, with an interface circuit (not shown). The interface circuit may be implemented by any type of interface standard, such as, for example, an Ethernet interface, a universal serial bus (USB), a PCI express interface, etc. For use with an output device, the interface circuit may include a graphics driver card, chip, and/or processor.
Communication interface(s) 1963 may be implemented in hardware or a combination of hardware and software, and may provide wired or wireless network interface(s) to one or more networks, such as network(s) 1745 of
Secondary storage device(s) 1977 may store processing logic 1985 (e.g., software) to be executed by processor(s) 1959, and/or may store data 1987. Processing logic 1985 and data 1987 may be used by processor(s) 1959 to facilitate sensor data collection functions, metering functions and/or metering calculations/computations if embodied in a utility meter, and/or communications between devices, etc., according to embodiments of this disclosure. Processing logic 1985 may include instructions for executing the methodology described herein, which may also include data packet generation and/or configuration management. Examples of secondary storage device(s) 1977 may include one or more hard drive disks, compact disk (CD) drives, digital versatile disk (DVD) drives, Blu-ray disk drives, redundant array of independent disks (RAID) systems, floppy disk drives, flash drives, etc. Data and/or processing logic may be stored on a removable tangible computer readable storage medium (e.g., a floppy disk, a CD, a DVD, a Blu-ray disk, etc.) using one or more of the secondary storage device(s) 1977.
The foregoing description discloses message correction techniques that may be used to dynamically optimize data transmissions while avoiding the downsides of the approaches currently used. The technology described herein provides efficient data correction and improved data transmission optimization with increased network capacity and minimization of processing time (even in the presence of interference), while maintaining adherence to a communication standard. These optimized error-correction techniques are more efficient than current standard-specified methods, and can more effectively deal with interference. Significantly less data is required to be sent for retry (e.g., to correct only the portions that are corrupted). In addition, the provided redundancy information may be reused (e.g., second iteration FEC decoding may use the provided second iteration redundancy symbols as well as the previously provided first iteration redundancy symbols), even if corrupted from failed transmission attempts. The techniques described herein can dynamically adjust to changes in the network and/or communication link conditions (e.g., by adjusting modulation and/or data rates based on feedback from a receiving device) and can handle rapid variations in interference levels.
Further embodiments other than those described herein may include further variation. For example, in many of the embodiments described herein the message block and redundancy block sizes are static. However, in some embodiments, the message block and redundancy block sizes may be dynamically variable (e.g., based on recent history and/or information provided by a receiving device). In other embodiments, the size of each message block and corresponding redundancy block (and other communication parameters, including those mentioned herein) may be set on a per channel setting basis, as interference may be significantly different per channel. As mentioned herein, in some embodiments, the use of redundancy blocks may not be used at all in the initial message, forcing a request for redundancy blocks if errors are detected.
While the embodiments described herein are primarily directed to unicast messaging, the concepts detailed herein may be extended to multicast messaging as well. Receiving devices that receive multicast messages may also respond with a request for redundancy. In this multicast scenario, a larger window of time may be allowed for contention management of multiple destination (receiving) devices that may require further redundancy (e.g., to ensure enough time for the message to reach the receiving devices and to allow the receiving devices to respond). In an embodiment, receiving devices that need to send a request for redundancy may randomize these requests across a portion of that window of time (e.g., to avoid collisions). In a further embodiment, the position of the portion of the window of time to be used may be proportional to the number of message blocks that could not be corrected (e.g., the more corrupted blocks, the earlier the portion in the window). In this manner, the earlier requested redundancy communications that are multicast back out to the receiving devices may reach, and be used by, more receiving devices than just the requester. This may reduce, or even eliminate, the need for receiving devices with less corrupted blocks to request further redundancy.
The particular examples used in this document are for ease of understanding and are not to be limiting. Though at times described for use directed to utility metering (e.g., of gas, water, electricity, etc.), features described herein may be used in many other contexts that may or may not involve utility metering (e.g., various communication systems (including those that involve ISM bands, for example), IoT applications, WSN networks, etc.). As would be understood by one of ordinary skill in the art, the time and resource-saving features discussed herein may be beneficial in many other systems involving communications (e.g., industrial manufacturing, mining, agriculture, transportation, etc.), including in fields yet unknown.
Although certain example methods, apparatus and articles of manufacture have been disclosed herein, the scope of coverage of this patent is not limited thereto. On the contrary, this patent covers all methods, apparatus and articles of manufacture fairly falling within the scope of the claims of this patent.
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