This application claims priority to Korean Patent Application No. 10-2020-0102598, filed on Aug. 14, 2020, and all the benefits accruing therefrom under 35 U.S.C. § 119, the content of which in its entirety is herein incorporated by reference.
Embodiments of the invention herein relate to a metal mask and a display apparatus manufactured by the same, and more particularly, to a metal mask for deposition and a display apparatus manufactured by the same.
In general, a light emitting device is disposed in each of pixels of a light emitting display apparatus. The light emitting device includes a light emitting layer disposed between two electrodes. The light emitting layers disposed in the pixels may be divided into a plurality of groups.
Here, a mask assembly is used to deposit the plurality of groups of light emitting layers onto a working substrate. The mask assembly includes a frame, a support stick, and a mask. Patterned light emitting layers may be provided by disposing the working substrate on the mask and then depositing a light emitting material onto the working substrate.
Embodiments of the invention provide a metal mask defining two kinds of openings and having improved durability.
Embodiments of the invention also provide a display apparatus including a plurality of areas including light emitting patterns having different planar areas.
An embodiment of the invention provides a metal mask including a first area in which a plurality of main openings spaced apart from each other is defined, and a second area in which a plurality of sub-openings spaced apart from each other and having planar areas different from the main openings is defined. Here, a gap between a main opening of the plurality of main openings and a sub-opening of the plurality of sub-openings, the main opening and the sub-opening being adjacent to each other in a first direction, is equal to or greater than about 0.5 times and equal to or less than about 5.0 times of a gap between the main openings, which are adjacent to each other in the first direction, of the plurality of main openings.
In an embodiment, the sub-opening may have a planar area greater than a planar area of the main opening.
In an embodiment, a number of the plurality of main openings per unit area in the first area may be greater than a number of the plurality of sub-openings per unit area in the second area.
In an embodiment, a gap between the sub-openings, which are adjacent to each other in the first direction, of the plurality of sub-openings may be greater than the gap between the main openings.
In an embodiment, a gap between a main opening of the plurality of main openings and a sub-opening of the plurality of sub-openings, main opening and the sub-opening being adjacent to each other in a second direction tilted from the first direction, of the main openings and the sub-openings may be equal to or greater than about 0.5 times and equal to or less than about 5.0 times of a gap between the main openings, which are adjacent to each other in the second direction, of the plurality of main openings.
In an embodiment, the second area may be provided in plural, and second areas may be spaced apart from each other in the first direction with the first area therebetween.
In an embodiment, the second area may be surrounded by the first area.
In an embodiment, the second area may be provided in plural, and second areas may be adjacent to corners of the first area, respectively.
In an embodiment of the invention, a display apparatus includes a base substrate, and a plurality of light emitting devices disposed on the base substrate and each including a light emitting pattern. Here, the plurality of light emitting devices includes a plurality of main light emitting devices disposed on a first area and each including a plurality of main light emitting patterns having a first planar area, and a plurality of sub-light emitting devices disposed on a second planar area different from the first planar area and each including a sub-light emitting pattern having a second planar area different from the first planar area, the plurality of main light emitting devices and the plurality of sub-light emitting devices emit light having the same color as each other, and a gap between the main light emitting pattern and the sub-light emitting pattern, which are adjacent to each other in the first direction, is equal to or greater than about 0.5 times and equal to or less than about 5.0 times of a gap between main light emitting patterns, which are adjacent to each other along the first direction, of the plurality of main light emitting patterns.
In an embodiment, the display apparatus may further include a driving circuit disposed on the second area, and at least a portion of the plurality of sub-light emitting devices may overlap the driving circuit in a plan view.
In an embodiment, the display apparatus may further include an electronic module disposed in overlap with the second area, and the second area may have a transmittance less than a transmittance of the first area.
In an embodiment, a number of the main light emitting patterns per unit area in the first area may be greater than a number of the sub-light emitting patterns per unit area in the second area.
In an embodiment, the second planar area may be greater than the first planar area.
In an embodiment, the main light emitting pattern and the sub-light emitting pattern, which are adjacent to each other, may be arranged along a reference axis extending in the first direction.
In an embodiment, the plurality of light emitting devices may emit light having a green color.
In an embodiment, a gap between the main light emitting pattern and the sub-light emitting pattern, which are adjacent to each other in a second direction tilted from the first direction, may be equal to or greater than about 0.5 times and equal to or less than about 5.0 times of a gap between the main light emitting patterns, which are adjacent to each other in the second direction, of the plurality of the main light emitting patterns.
In an embodiment, the plurality of light emitting devices may emit red or blue light.
In an embodiment, the second area may be provided in plural, and second areas may be adjacent to corners of the first area, respectively.
In an embodiment, the display apparatus may further include additional main light emitting patterns disposed on the first area to emit light having a color different from a color of the main light emitting patterns, and at least a portion of the additional main light emitting patterns and the main light emitting patterns may overlap each other in a plan view.
In an embodiment, the display apparatus may further include additional sub-light emitting patterns disposed on the second area to emit light having a same color as a color of the additional main light emitting patterns, and the additional sub-light emitting patterns and the sub-light emitting patterns may be spaced apart from each other in a plan view.
The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments of the invention and, together with the description, serve to explain principles of the invention. In the drawings:
It will be understood that when an element such as a region, layer, or portion is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present.
Like reference numerals refer to like elements throughout. Also, in the drawing figures, the thickness, ratio, and dimensions of components are exaggerated for clarity of illustration. As used herein, the term and/or includes any and all combinations of one or more of the associated listed items.
It will be understood that although the terms such as ‘first’ and ‘second’ are used herein to describe various elements, these elements should not be limited by these terms. The terms are only used to distinguish one component from other components. For example, a first element referred to as a first element in one embodiment can be referred to as a second element in another embodiment without departing from the scope of the appended claims. The terms of a singular form may include plural forms unless referred to the contrary.
Also, spatially relative terms, such as “below”, “lower”, “above”, and “upper”, may be used herein for ease of description to describe an element and/or a feature's relationship to another element(s) and/or feature(s) as illustrated in the drawings. The terms may be a relative concept and described based on directions expressed in the drawings.
The meaning of ‘include’ or ‘comprise’ specifies a property, a region, a fixed number, a step, a process, an element and/or a component but does not exclude other properties, regions, fixed numbers, steps, processes, elements and/or components.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms, including “at least one,” unless the content clearly indicates otherwise. “Or” means “and/or.” As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items. It will be further understood that the terms “comprises” and/or “comprising,” or “includes” and/or “including” when used in this specification, specify the presence of stated features, regions, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, regions, integers, steps, operations, elements, components, and/or groups thereof.
Furthermore, relative terms, such as “lower” or “bottom” and “upper” or “top,” may be used herein to describe one element's relationship to another element as illustrated in the Figures. It will be understood that relative terms are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures. In an embodiment, when the device in one of the figures is turned over, elements described as being on the “lower” side of other elements would then be oriented on “upper” sides of the other elements. The exemplary term “lower,” can therefore, encompasses both an orientation of “lower” and “upper,” depending on the particular orientation of the figure. Similarly, when the device in one of the figures is turned over, elements described as “below” or “beneath” other elements would then be oriented “above” the other elements. The exemplary terms “below” or “beneath” can, therefore, encompass both an orientation of above and below.
“About” or “approximately” as used herein is inclusive of the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, considering the measurement in question and the error associated with measurement of the particular quantity (i.e., the limitations of the measurement system). For example, “about” can mean within one or more standard deviations, or within +30%, 20%, 10%, 5% of the stated value.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as generally understood by those skilled in the art. Terms as defined in a commonly used dictionary should be construed as having the same meaning as in an associated technical context, and unless defined apparently in the description, the terms are not ideally or excessively construed as having formal meaning.
Hereinafter, embodiments of the invention will be described with reference to the accompanying drawings.
In the embodiment, the display panel DP is described as an organic light emitting display panel. However, this is merely illustrative. The display panel DP of the invention may include various embodiments, for example.
The timing control unit TC receives input image signals (not shown) and converts a data format of the input image signals to be matched with specifications of an interface with the scan driving circuit SDC, thereby generating the image data D-RGB. The timing control unit TC outputs the image data D-RGB and all sorts of control signals DCS and SCS.
The scan driving circuit SDC receives a scan control signal SCS from the timing control unit TC. The scan control signal SCS may include a vertical start signal that starts an operation of the scan driving circuit SDC and a clock signal that determines an output time of signals.
The scan driving circuit SDC generates a plurality of scan signals and sequentially outputs the scan signals to a plurality of scan lines SL1 to SLn where n is a natural number. Also, the scan driving circuit SDC generates a plurality of light emitting control signals in response to the scan control signal SCS and outputs the light emitting control signals to a plurality of light emitting lines ELi to ELn.
Although the scan signals and the light emitting control signals are outputted from one scan driving circuit SDC in
The data driving circuit DDC receives a data control signal DCS and image data D-RGB from the timing control unit TC. The data driving circuit DDC converts the image data D-RGB into data signals and outputs the data signals to the data lines DL1 to DLm where m is a natural number. The data signals are analog voltages corresponding to gray values of the image data D-RGB.
The display panel DP includes scan lines SL1 to SLn, light emitting lines ELi to ELn, data lines DL1 to DLm, and pixels PX. The scan lines SL1 to SLn may each extend in the first direction DR1 and be arranged in a second direction DR2 crossing the first direction DR1.
Each of the plurality of light emitting lines ELi to ELn may be arranged in parallel to the corresponding scan line of the scan lines SL1 to SLn. The data lines DL1 to DLm cross the scan lines SL1 to SLn in an insulating manner.
Each of the pixels PX is connected to the corresponding scan line of the scan lines SL1 to SLn, the corresponding light emitting line of the light emitting lines ELi to ELn, and the corresponding data line of the data lines DL1 to DLm.
Each of the pixels PX receives a power voltage ELVSS (hereinafter, also referred to as a first voltage) a second voltage ELVDD having a level greater than that of the power voltage ELVSS. Each of the pixels PX is connected to a power line PL to which the second voltage ELVDD is applied. Each of the pixels PX is connected to an initialization line RL receiving an initialization voltage Vint.
Each of the pixels PX may be electrically connected to three scan lines. As illustrated in
Also, the display panel DP may further include a plurality of dummy scan lines. The display panel DP may further include a dummy scan line connected to the pixels PX in a first pixel row and a dummy scan line connected to the pixels PX in an n-th pixel row. Also, the pixels (hereinafter, also referred to as pixels in a pixel row) connected to one data line of the data lines DL1 to DLm may be connected to each other. Two neighboring pixels of the pixels in the pixel row may be electrically connected to each other. However, this is merely illustrative, and the invention is not limited thereto. In another embodiment, the connection relationship between the pixels PX in an embodiment of the invention may be variously designed, for example.
Each of the pixels PX includes an organic light emitting diode (not shown) and a pixel driving circuit (not shown) controlling light emission of the organic light emitting diode. The pixel driving circuit may include a thin-film transistor (“TFT”) and a capacitor.
In this embodiment, at least one of the scan driving circuit SDC and the data driving circuit DDC may include TFTs provided through the same process as that of the pixel driving circuit. In an embodiment, all of the scan driving circuit SDC and the data driving circuit DDC may be disposed (e.g., mounted) on the display panel DP, for example. In an alternative embodiment, one of the scan driving circuit SDC and the data driving circuit DDC may be disposed (e.g., mounted) to the display panel DP, and the other may be provided as a separate circuit board that is independent from the display panel DP and then connected to the display panel DP.
Referring to
Each of the first scan driving circuit SDC1 and the second scan driving circuit SDC2 may generate a plurality of scan signals and a plurality of light emission control signals and output the generated signals to the corresponding pixels. In an embodiment, the first scan driving circuit SDC1 may generate a plurality of scan signals, and the second scan driving circuit SDC2 may generate a plurality of light emission control signals, for example. In an alternative embodiment, the first scan driving circuit SDC1 and the second scan driving circuit SDC2 may generate the scan signal and the light emission control signal, respectively, with respect to pixel rows that are alternate to each other.
Also, the display panel DP may include a single scan driving circuit. Although the scan driving circuit in an embodiment of the invention may have various types, the invention is not limited thereto.
The display panel DP includes a display area DA and a peripheral area (also referred to as a non-display area) NDA. The peripheral area NDA may surround an edge of the display area DA. However, this is merely illustrative, and the invention is not limited thereto. In an embodiment of the display panel according to the invention, the peripheral area NDA may be defined at one side of the edge of the display area DA or omitted, for example.
The display area DA may include a main area MA, a first sub-area SAL, and a second sub-area SA2. The first sub-area SA1 and the second sub-area SA2 are spaced apart from each other with the main area MA therebetween in the first direction DR1.
The main area MA may be spaced apart from each of the first scan driving circuit SDC1 and the second scan driving circuit SDC2. The main area MA may be an area on which a portion of the pixels PX is disposed.
The first sub-area SA1 overlaps the first scan driving circuit SDC1. The first sub-area SA1 may be an area on which another portion of the pixels PX is disposed. At least a portion of the pixels PX disposed on the first sub-area SA1 overlaps the first scan driving circuit SDCL. An image displayed on the first sub-area SA1 may be the same as or related to that displayed on the main area MA or an independent separate image. However, the invention is not limited thereto.
The second sub-area SA2 overlaps the second scan driving circuit SDC2. The second sub-area SA2 may be an area on which a portion of the pixels PX is disposed. At least a portion of the pixels PX disposed on the second sub-area SA2 overlaps the second scan driving circuit SDC2. An image displayed on the second sub-area SA2 may be the same as or related to that displayed on the main area MA or an independent separate image. However, the invention is not limited thereto.
According to the embodiment, at least a portion of the pixels PX may be disposed on the first and second sub-areas SA1 and SA2 and overlap the first and second scan driving circuits SDC1 and SDC2 in a plan view. Thus, a planar area of the display area DA provided by the display panel DP may be expanded to an area overlapping the first and second scan driving circuits SDC1 and SDC2, and a planar area of the peripheral area NDA may be reduced. Thus, the display panel DP may easily realize the display apparatus having a reduced bezel area.
As illustrated in
In this embodiment, each of the first unit areas UAT may include one first light emitting area L-R1, two second light emitting areas L-G1, and one third light emitting area L-B1. Here, one of the two second light emitting areas L-G1 may be defined as a fourth light emitting area that is distinguished from the second light emitting area L-GT. In an embodiment, the fourth light emitting area may have a planar shape different from that of the second light emitting area L-GT, for example. In an alternative embodiment, the fourth light emitting area may have a color different from that of the second light emitting area L-GT. However, this is merely illustrative, and the embodiment of the invention is not limited to the number or kind of the light emitting areas constituting each of the first unit areas UAT.
The sub-area SA1 may include a plurality of second unit areas UA2. The second unit areas UA1 include first to third light emitting areas L-R2, L-G2, and L-B2 having the same arrangement of the light emitting areas. That is, arrangements of the first to third light emitting areas L-R2, L-G2, and L-B2 in each of the second unit areas UA2 may be the same as each other.
In this embodiment, each of the second unit areas UA2 may include the first to third light emitting areas L-R2, L-G2, and L-B2 having arrangement corresponding to each of the first unit areas UA1. The arrangement relationship between the first to third light emitting areas L-R2, L-G2, and L-B2 in each of the second unit areas UA2 may correspond to that between the first to third light emitting areas L-R1, L-G1, and L-B1 in each of the first unit areas UA1.
Here, the second unit area UA2 may have a planar area greater than that of the first unit area UAT. Also, each of the first to third light emitting areas L-R2, L-G2, and L-B2 constituting the second unit areas UA2 may have a planar area greater than that of each of the first to third light emitting areas L-RT, L-GT, and L-B1 constituting the first unit areas UAT.
When light emitting areas of corresponding light emitting devices are different, and the same driving voltage is applied to the corresponding light emitting devices, a ratio of luminance of the corresponding light emitting devices is proportional to a ratio of the light emitting areas. In this embodiment, since the number of light emitting areas per unit area is less in the sub-area SAT than the main area MA, when the same driving voltage is supplied to the same light emitting area, the sub-area SAT may have luminance per unit area less than that of the main area MA.
In an embodiment of the invention, each of the first to third light emitting areas L-R2, L-G2, and L-B2 of the first area SEAT of the sub-area SA1 has a planar area greater than that of each of the corresponding first to third light emitting areas L-R1, L-G1, and L-B1 of the main area MA to compensate the luminance difference between the sub-area SA1 and the main area MA. Thus, although the sub-area SAT has the number of light emitting areas per unit area less than the main area MA, the sub-area SA1 and the main area MA may have the same luminance per unit area by designing light emitting area to have an increased area.
Also, the sub-area SA1 may be divided into a first area SEAT and a second area SEA2. The first area SEAT is an area spaced apart from the first scan driving circuit SDC1 in the sub-area SA1 and disposed between the second area SEA2 and the main area MA. The second area SEA2 may be an area overlapping the first scan driving circuit SDC1 in a plan view in the sub-area SA1. In an embodiment, first to third light emitting areas L-R, L-G, and L-B of the second area SEA2 of the sub-area SA1 may be identical to the first to third light emitting areas L-R2, L-G2, and L-B2 of the first area SEA1 of the sub-area SA1, respectively, but the invention is not limited thereto.
A portion of the second unit areas UA2 disposed on the second area SEA2 overlap the first scan driving circuit SDC1 in a plan view.
As illustrated in
The base layer BL may include a synthetic resin layer. A synthetic resin layer is provided on a support substrate that is used when the display panel DP is manufactured. Thereafter, a conductive layer, an insulation layer, and the like are provided on the synthetic resin layer. When the support substrate is removed, the synthetic resin layer corresponds to the base layer BL.
The circuit device layer DP-CL includes at least one insulation layer and a circuit device. The circuit device includes a signal line, a driving circuit of the pixel, etc. The circuit device layer DP-CL may be provided through a process of providing an insulation layer, a semiconductor layer, and a conductive layer by coating or deposition and a process of patterning the insulation layer, the semiconductor layer, and the conductive layer by a photolithography process.
In this embodiment, the circuit device layer DP-CL includes a buffer layer BFL, a barrier layer BRL, and first to seventh insulation layers 10, 20, 30, 40, 50, 60, and 70. Each of the buffer layer BFL, the barrier layer BRL, and the first to seventh insulation layers 10 to 70 may include one of an inorganic layer and an organic layer. Each of the buffer layer BFL and the barrier layer BRL may include an inorganic layer. At least one of the fifth to seventh insulation layers 50, 60, and 70 may include an organic layer.
The circuit device layer DP-CL may include a first pixel transistor T1, a second pixel transistor T2, a first driving transistor T1_D, and a second driving transistor T2_D. The first and second pixel transistors T1 and T2 are disposed on the main area MA. The first and second pixel transistors T1 and T2 may constitute the pixel PX in conjunction with the light emitting device OLED disposed thereabove.
In an embodiment of the invention, the first channel A1 and the second channel A2 may include the same semiconductor material as each other. Here, a laminated structure of the circuit device layer DP-CL may be further simplified. Also, the circuit device layer DP-CL may further include an upper electrode UE. The upper electrode UE may overlap the first gate G1. The upper electrode UE may provide a gate electrode of the first pixel transistor T1 in conjunction with the first gate G1 or provide a capacitor in conjunction with the first gate G1. However, this is merely illustrative. In an embodiment, the upper electrode UE may be omitted from the display panel DP according to the invention, for example.
The first and second driving transistors T1_D and T2_D are disposed on the second area SEA2 of the sub-area SA1. The first and second driving transistors T1_D and T2_D are included in the scan driving circuit SDC1. The first and second driving transistors T1_D and T2_D may have the same structure and be provided in the same process as that of the first and second pixel transistors T1 and T2. However, this is merely illustrative, and the invention is not limited thereto. In an embodiment, the scan driving circuit SDC1 may include only one kind of the first and second driving transistors T1_D and T2_D, for example.
The display apparatus layer DP-OLED includes a pixel defining layer PDL and a light emitting device OLED. The light emitting device OLED may be an organic light emitting diode or a quantum dot light emitting diode. An anode AE is disposed on the seventh insulation layer 70. An opening OP of the pixel defining layer PDL exposes at least a portion of the anode AE. The opening OP of the pixel defining layer PDL may define light emitting areas PXA_M and PXA_S. A non-light emitting area NPXA may surround the light emitting areas PXA_M and PXA_S.
A hole control layer HCL and an electron control layer ECL may be disposed on the light emitting area PXA and the non-light emitting area NPXA in common. A light emitting layer EML may have a pattern shape corresponding to the opening OP. The light emitting layer may be deposited in a different method in comparison with the film-type hole control layer HCL and the film-type electron control layer ECL. A mask assembly may be used to provide the light emitting layer EML having a predetermined shape.
The hole control layer HCL and the electron control layer ECL may be provided in the plurality of pixels in common by an open mask. The light emitting layer EML may be provided differently according to the pixels by a mask referred to as fine metal mask (“FMM”).
The upper insulation layer TFL is disposed. The upper insulation layer TFL may include a plurality of thin-films. The plurality of thin-films may include an inorganic layer and an organic layer. The upper insulation layer TFL may include an insulation layer for encapsulating the display apparatus layer DP-OLED and an insulation layer for improving a light emission efficiency.
As described above, the light emitting areas PXA_M and PXA_S are provided on the first and second driving transistors T1_D and T2_D as well as the first and second pixel transistors T1 and T2. The display panel DP may display an image even on the sub-area SA1 on which the scan driving circuit SDC1 is disposed by including the light emitting device OLED overlapping the first and second driving transistors T1_D and T2_D. Thus, the display panel DP, in which the display area is expanded, and the bezel is reduced, may be provided.
The deposition chamber CB may set a deposition condition as vacuum. The deposition chamber CB may include a bottom surface, a ceiling surface, and sidewalls. The bottom surface of the deposition chamber CB may be parallel to a surface defined by the first directional axis DR1 and the second directional axis DR2. A normal direction of the bottom surface of the deposition chamber CB indicates a third directional axis DR3. Hereinafter, first to third directions may be directions indicated by the first to third directional axes DR1, DR2, and DR3, respectively, and designated by the same reference numerals, respectively. Hereinafter, an expression “in a plan view” represents a surface parallel to the surface defined by the first directional axis DR1 and the second directional axis DR2.
The fixing member CM is disposed inside the deposition chamber CB and disposed above the deposition source DS to fix the mask assembly MSA. The fixing member CM may be installed on the ceiling surface of the deposition chamber CB. The fixing member CM may include a jig or a robot arm holding the mask assembly MSA.
The fixing member CM includes a body part BD and magnetic bodies MM coupled to the body part BD. The body part BD may include a plate as a base structure for fixing the mask assembly MSA. However, the invention is not limited thereto. The magnetic bodies MM may be disposed inside or outside the body part BD. The magnetic bodies MM may fix the mask assembly MSA by a magnetic force.
The deposition source DS may evaporate a deposition material, e.g., a light emitting material, to be ejected as deposition vapor. The deposition vapor passes through the mask assembly MSA and is deposited on a working substrate WS with a predetermined pattern.
The mask assembly MSA is disposed inside the deposition chamber CB and disposed above the deposition source DS to support the working substrate WS. The working substrate WS may include a glass substrate or a plastic substrate. The working substrate WS may include a polymer layer disposed on the base substrate. The base substrate may be removed in the latter half of the process for manufacturing the display panel, and the polymer layer may correspond to the base layer BL in
As illustrated in
An opening OP-F is defined in the frame FM. The frame FM may have a quadrangular (e.g., rectangular) shape in a plan view. The frame FM may include a metal material. In an embodiment, the frame FM may include, e.g., nickel (Ni), a nickel-cobalt alloy, a nickel-iron alloy or a combination thereof, etc., for example. The frame FM may include four portions. The frame FM may include a first extension portion FM-1 and a second extension portion FM-2, which face each other in the first direction DR1. The FM may include a third extension portion FM-3 and a fourth extension portion FM-4, which face each other in the second direction DR2 and each of which connects the first extension portion FM-1 and the second extension portion FM-2. The first to fourth extension portion FM-1 to FM-4 may be coupled by welding or integrated with each other.
The sticks ST include first to third sticks ST1, ST2, and ST3. The first to third sticks ST1, ST2, and ST3 may be coupled to the frame FM to overlap the first opening OP-F. The first to third sticks ST1, ST2, and ST3 may be coupled to coupling grooves defined in each of the first extension portion FM-1 and the second extension portion FM-2. However, the embodiment of the invention is not limited to the number of the sticks ST. In an embodiment, the sticks ST may be integrated with the frame FM, for example. In an embodiment, each of the first to third sticks ST1, ST2, and ST3 may include first and second edges ED1 and ED2 opposite to each other.
The masks MSK may be disposed on the frame FM and the sticks ST and arranged in the first direction DR1 while extending in the second direction DR2. The masks MSK may include a material such as an invar having a thermal expansion coefficient less than that of the frame FM. In an embodiment, the masks MSK may include, e.g., nickel (Ni), a nickel-cobalt alloy, a nickel-iron alloy, or a combination thereof, etc., for example.
A plurality of openings OP-M (hereinafter, also referred to as mask openings) is defined in each of the masks MSK. Each of the masks MSK may include an opening area A-OP in which the mask openings OP-M are defined and a non-opening area A-NOP disposed adjacent to the opening area A-OP. In this embodiment, each of the masks MSK may include the single opening area A-OP that is consecutively defined along the second direction DR2. The mask openings OP-M are arranged with a predetermined rule (or uniformly) in the opening area A-OP. The light emitting layer EML may have a planar shape corresponding to that of the mask openings OP-M.
The masks MSK may be coupled to the frame MSK by welding. In a process of manufacturing the mask assembly MSA, the masks MSK are welded to the frame FM in a state in which each of the masks MSK is tensioned in the second direction DR2. The mask assembly MSA includes a plurality of divided masks MSK. A deflection phenomenon may be generated less in the masks MSK than one large-sized mask corresponding to the frame FM.
A working substrate WS in
Referring to
The first sub-area SA1 and the second sub-area SA2 of the display area DA are disposed at left and right sides of the main area MA and shaded to be distinguished. In an embodiment of the invention, the thin-film pattern may be simultaneously defined in the main area MA, the first sub-area SA1, and the second sub-area SA2 through one mask.
Referring to
First to third masks MSK1 to MSK3 in
The green light emitting layers may be provided on the hole control layer HCL by the mask assembly MSA (refer to
A second opening OP-MG of the first mask MSKT in
The area illustrated in
Each of the first to third sub-light emitting openings OP-R21, OP-G21, and OP-B21 may have a planar area different from that of the corresponding light emitting opening of the first to third main light emitting openings OP-R11, OP-G11, and OP-B11. In an embodiment, each of the first to third sub-light emitting openings OP-R21, OP-G21, and OP-B21 may have a planar area greater than that of the corresponding light emitting opening of the first to third main light emitting openings OP-R11, OP-G11, and OP-B11, for example. The first to third sub-light emitting openings OP-R21, OP-G21, and OP-B21 may correspond to the first to third light emitting areas L-R2, L-G2, and L-B2 (refer to
As illustrated in
In the first mask MSKT, the main openings OP_MRT may be spaced apart from each other by a first horizontal gap DT10, and the openings, which are adjacent to each other in a horizontal direction, of the main openings OP_MRT and the sub-openings OP_MR2 may be spaced apart from each other by a second horizontal gap DT11. In this embodiment, the horizontal gap may be defined as a spaced distance in the horizontal direction and may be a spaced distance in a direction perpendicular to the boundary between the main area MA and the sub-area SA. The horizontal gap in
The main openings OP_MRT may be spaced apart from each other by a first diagonal gap DT12, and the openings, which are adjacent to each other in a diagonal direction, of the main openings OP_MR1 and the sub-openings OP_MR2 may be spaced apart from each other by a second diagonal gap DT13. Also, the light emitting openings, which are adjacent to each other in the horizontal direction, of the main light emitting openings and the sub-light emitting openings may be spaced apart from each other by a light emitting gap DT14.
In this embodiment, the first horizontal gap DT10 may give an effect on determining the second horizontal gap DT11. Specifically, the second horizontal gap DT11 may be designed to be equal to or greater than about 0.5 times and equal to or less than about 5.0 times of the first horizontal gap DT10.
When the second horizontal gap DT11 is less than about 0.5 times of the first horizontal gap DT10, strength of the first mask MSK1 may be reduced. When the metal mask is processed by laser, higher precision may be provided, and thus the second horizontal gap DT11 may be narrowly designed. However, when the second horizontal gap DT11 is less than about 0.5 times of the first horizontal gap DT10, durability of the metal mask may be degraded. Thus, the metal mask may be easily damaged as the deposition processes are repeated, and a lifespan of the metal mask may be reduced.
Also, when the second horizontal gap DT11 is greater than about 5 times of the first horizontal gap DT10, visibility of the boundary between the main area MA and the sub-area SA may increase. As a difference between the second horizontal gap DT11 and the first horizontal gap DT10 increases, the boundary between the main area MA and the sub-area SA may be clearly distinguished. In an embodiment of the invention, as the second horizontal gap DT11 is set to be equal to or less than about 5 times of the first horizontal gap DT10, the boundary visibility defect may be resolved, and the display panel on which an image is uniformly displayed over the entire display area may be provided. Likewise, as illustrated in
The main openings OP_MG1 may be spaced apart from each other by a first diagonal gap DT23, and the openings, which are adjacent to each other in the diagonal direction, of the main openings OP_MG1 and the sub-openings OP_MG2 may be spaced apart from each other by a second diagonal gap DT24. In this embodiment, the diagonal gap may be defined as a spaced distance in the diagonal direction and may be a spaced distance in a direction diagonal to the boundary between the main area MA and the sub-area SA. The diagonal gap in
In this embodiment, each of a second horizontal gap DT21 and a third horizontal gap DT22 may be designed to be equal to or greater than about 0.5 times and equal to or less than about 5.0 times of the first horizontal gap DT20. As the gap between the openings of the second mask MSK2 is designed to be equal to or greater than about 0.5 times and equal to or less than about 5.0 times of the first horizontal gap DT20, thin-film patterns capable of improving strength of the second mask MSK2 and reducing the visibility of the boundary between the main area MA and the sub-area SA may be provided.
Likewise, as illustrated in
The main openings OP_MB1 may be spaced apart from each other by a first diagonal gap DT32, and the openings, which are adjacent to each other in the diagonal direction, of the main openings OP_MB1 and the sub-openings OP_MB2 may be spaced apart from each other by a second diagonal gap DT33. Also, the light emitting openings, which are adjacent to each other in the horizontal direction, of the main light emitting openings and the sub-light emitting openings may be spaced apart from each other by a light emitting gap DT34.
In this embodiment, the second horizontal gap DT31 may be designed to be equal to or greater than about 0.5 times and equal to or less than about 5.0 times of the first horizontal gap DT30. As the gap between the openings of the third mask MSK3 is designed to be equal to or greater than about 0.5 times and equal to or less than about 5.0 times of the first horizontal gap DT30, thin-film patterns capable of improving strength of the third mask MSK3 and reducing the visibility of the boundary between the main area MA and the sub-area SA may be provided.
As illustrated in
The green color among the primary three colors of red, green, and blue has visibility greater than that of other colors. Thus, masks MSK1a, MSK2a, and MSK3a may be designed such that a horizontal distance between the green light emitting opening OP-G11a of the main area MA and the green light emitting opening OP-G21a of the sub-area SA, which are adjacent to each other with the boundary between the main area MA and the sub-area SA therebetween, is designed to a distance preventing visibility degradation with respect to the green light emitting openings OP-G11a and OP-G21a having the mostly recognized green color. Based on this, a distance between the openings may be designed to secure durability of each of the masks MSK1a, MSK2a, and MSK3a.
As illustrated in
As illustrated in
As illustrated in
In an embodiment of the invention, the display panel having a uniform color distribution instead of being biased to one of the red color or the blue color may be provided by designing the arrangement of the openings of the masks MSK1a, MSK2a, and MSK3a with respect to the horizontal arrangement of the light emitting pattern having the green color having high visibility. Also, the masks MSK1a, MSK2a, and MSK3a having improved durability and defining the openings having different planar areas in the main area MA and the sub-area SA may be designed.
As illustrated in
As illustrated in
In an embodiment of the invention, a thin-film pattern may be simultaneously provided to the main area MA_U and the sub-area SA_U having the different planar areas by one mask. Thus, the process may be simplified, and process costs may be saved. Also, as described above, as a distance between openings of the main area MA_U and the sub-area SA_U is designed to be equal to or greater than about 0.5 times and equal to or less than about 5.0 times of a distance between the openings defined in the main area MA_U, a thin-film pattern preventing visibility degradation of the main area MA_U and the sub-area SA_U may be provided, and the mask having improved durability may be provided.
As illustrated in
As illustrated in
The first main area MA_C1 is disposed at a central portion of the display area DA_C. The first main area MA_C1 may correspond to a front surface of the display apparatus DD. The second main area MA_C2 may be adjacent to each of sides of the first main area MA_C1. The second main area MA_C2 may correspond to side surfaces of the display apparatus DD.
The sub-areas SA_C1, SA_C2, SA_C3, and SA_C4 may include first to fourth sub-areas SA_C1, SA_C2, SA_C3, and SA_C4. The first to fourth sub-areas SA_C1, SA_C2, SA_C3, and SA_C4 may correspond to corners of the display apparatus DD.
In an embodiment of the invention, the main areas MA_C1 and MA_C2 and the sub-areas SA_C1, SA_C2, SA_C3, and SA_C4 may include light emitting patterns having different planar areas. Also, the first main area MA_C1 and the second main area MA_C2 may include light emitting patterns having different planar areas.
In an embodiment of the invention, the light emitting patterns disposed on the main areas MA_C1 and MA_C2 and the sub-areas SA_C1, SA_C2, SA_C3, and SA_C4 may be deposited at once by one mask defining openings having different planar areas. Thus, the process may be simplified, and process costs may be saved. Also, in an embodiment of the invention, the mask having improved durability may be provided by controlling a distance between the openings at a boundary area although the openings having different planar areas are defined.
Thus, the embodiment of the invention may provide the mask that is designed to prevent durability degradation of the metal mask including the different openings. Also, the embodiment of the invention may provide the light emitting patterns having different planar areas by one mask to simplify the process of the display apparatus and save the process costs.
Although the embodiments of the invention have been described, it is understood that the invention should not be limited to these embodiments but various changes and modifications may be made by one ordinary skilled in the art within the spirit and scope of the invention.
Number | Date | Country | Kind |
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10-2020-0102598 | Aug 2020 | KR | national |