Embodiments of the invention relate to electronic circuitry commonly employed to protect and regulate the charging and discharging of electronic battery cells such as Lithium-Ion or Lithium-Polymer cells. Such circuitry falls under the broad category of power management electronics.
Many implementations for the regulated charging/discharging and protection of battery cells exist in the prior art. Most common among these is a circuit configuration employing a gating device, a monitor/controller IC and a few external components. The gating device is typically a series combination of two MOSFET devices inserted into the battery-cell current path. The external components are typically a precision resistor employed for current measurement and capacitor elements for supply decoupling, referencing and delay programming. The Monitor/Controller IC (MCIC) controls the gate inputs of the switch device to connect or disconnect the battery to the load, and tropically monitors conditions such as Over-Voltage (OV), Over Current (OC), Under Voltage (UV) and serves to protect the battery cell from damage. The battery cell and the circuit configuration that protects it are in combination referred to as a battery pack.
The gating switch of a battery pack typically consists of two MOSFET devices in series in the prior art. This is because of the inherent body-diode within these devices that presents low impedance to current flow in one direction. In order to ensure high impedance for the switch when it is turned ‘OFF’ by a control signal from the MCIC, two MOSFET devices are connected in series such that their body diodes are back to back. This quadruples the required semiconductor area for a given ‘ON’ resistance specification. A device with no body diode, constructed as a JFET has been proposed recently by Lovoltech Inc. of San Jose, Calif. freference 7]. These JFET devices are fabricated such that there is no body diode, and are of two types—a depletion-mode device (Normally-ON) and an enhancement-mode device (Normally OFF) as described in published data sheets currently presented at a web page www.lovoltech.com. The benefit of a reduction in the required silicon area through the use of a depletion mode JFET as the gating switch in a battery pack application has been claimed. The depletion mode device also resembles a MOSFET device in its electrical nature, presenting high static impedance to the driving circuitry under all conditions of this application.
While the depletion mode device functions well as a switch under normal conditions of circuit operation, it requires the supply of a negative voltage with respect the ground node of the battery circuit in the event of a short circuit at the output of the battery pack in order to effectively turn the device ‘OFF’. This places additional requirements such as negative voltage generation and drive circuitry within the MCIC as well as an internal or external capacitor to store this negative voltage to be supplied to the switch device in the event of a short circuit. Alternate embodiments also proposed in the art may employ external resistors and capacitors with a drive circuit that provides pulses into these components to produce an effective negative voltage at the gate of the switch device. In addition to the complexity and cost of such implementations, the reliability of the turn-off action by the MCIC in the event of a short circuit may also be dependent upon the external components used for the negative voltage capability. The added complexity of and dependence upon external components is not a desirable solution for battery packs.
The invention specifies control/drive circuitry within the MCIC enabling the use of enhancement JFET devices as gating switches and minimizing the number of external components required.
The invention is a novel circuit configuration for battery cell management within battery packs, employing sense and control circuitry that enables the use of enhancement-mode devices with PN junctions as the control gate and minimizes external components required.
Prior art implementations also include either an external precision resistor (for load current sense, a critical function of battery packs) or an internal, trimmed resistance for the same purpose, both of which add another pin to the MCIC, integrated circuit area within the MCIC and cost. The invention does not require this external or internal resistor because it is capable of reasonably accurate load current measurements through the switch S by means of the availability of the voltages at the three terminals of the switch device as well as information about the control input current to the PN junction gate of the switch device. Again, the use of an enhancement-mode device with a PN junction control input as the gating switch in the system leads to this advantage.
A key concept within the architecture of the invention is the use of a single external (potentially integrated monolithically) capacitor for two important functions. The capacitor C in
As seen in
In the event of a short-circuit or a sustained over-current condition at the output of the battery pack, the capacitor C is discharged rapidly, assisted by the fault condition as well as a discharge transistor integrated into the MCIC, and is then recharged by a slow LEAK charge provided by a LEAK circuit within the MCIC. As long as the short-circuit remains in effect, the LEAK current flow combined with any reverse current flow (through the diode junction from the control gate to the terminal of the switch device connected to the battery cell) is designed to be insufficient to charge the control gate node. This ensures that the switch device remains in it's OFF state, since a voltage differential greater than the typical diode drop (in silicon substrates, ˜0.7V, or seven-tenths of a volt) is required to turn the switch device ON. When the short-circuit at the output of the battery-pack is removed, the control gate node begins charging up since there is no discharge path for the LEAK current driven into the control gate node. The time duration is dependent upon the value of the LEAK current and the value of the capacitor C as well as the voltage level it needs to charge to in order to restore nominal operation for the battery-pack. Thus device C functions as a delay element that, in conjunction with the circuits within the MCIC and the voltage of the battery cell, determines the time duration between the removal of a fault and the restoration of nominal operating conditions.
Detection & Management of Operational/Fault Conditions
All the terminals of the switch device of the battery-pack are accessible to the MCIC as shown in
The temperature-dependent variation of the voltage across PN junctions with a forward current flow through them is well known in the art and is exceptionally well exploited in silicon-bandgap based voltage references. This variation is a few mV/° C., and is current density dependent, and knowledge about this characteristic of the switch device gives an added dimension of information about the operational condition of the device. In other words, this circuit architecture that feeds a forward current into a PN junction gate of the switch device allows for the estimation of the temperature of the switch device while in operation. With appropriate packaging of the battery-pack, such as with a shared heat-conducting metal plate between the battery cell and the switch device, the MCIC can monitor the temperature of critical elements in the battery-pack employing the switch device in the additional role of a temperature sensor. The information on the switch device temperature available in the architecture of the invention greatly improves the accuracy of current measurement made using voltage information at the terminals of the switch device.
Over-Current (OC): A key fault is over-current that must be detected in both the charge and discharge modes of operation of the battery-pack. This is easily implemented in the invention using the voltage differential across the Source/Drain terminals. One possible algorithm for OC detection in the invention is detailed below.
The MCIC determines the primary operational mode of the battery-pack (BP) by detecting the value of the voltages and the polarity of the voltage differential between terminals VB and VL of the circuit shown in
A distinguishing feature of the invention architecture is that it provides additional information in the form of a forward voltage across the gate PN junction that may be gainfully employed in an accurate determination of an over-current condition. Assuming that the resistance increase of the switch device with temperature is roughly linear, as illustrated in
An exception to this capability is when the battery-pack transitions from the standby mode into the full-discharge or OC mode. In this situation, the forward junction current is an indeterminate value, dependent upon the current pulled from the storage capacitor C into the junction, reducing the usefulness of the value of the forward voltage across the control gate junction diode. The test for over-current in this situation is done after the full control gate forward current is restored, which in the invention architecture, may amount to a few cycles of activity of the HOSE PUMP that is designed to deliver the control gate current for the full-on operational state of the switch.
Incorrect registration of over-current conditions, due to temperature-induced switch resistance increases or state-transitions that result in transient reductions of the load voltage is avoided in the invention without the use of a precision external or internal resistor employed in prior art.
Under-Voltage (UV) and Over-Voltage (OV): These fault conditions are detected with techniques akin to methods used in the prior art. The battery voltage at terminal VB is scaled appropriately and compared with an internal voltage reference developed based on the silicon bandgap. When a UV condition is detected, the discharge operational mode of the battery-pack is disallowed. Conversely, when an OV condition is detected, the charge mode is disallowed.
Over-Temperature (OT): The invention architecture allows the detection of the temperature of the switch device control gate junction through prior knowledge of the expected voltage value across the control gate junction for the various input forward currents that determine the operational modes of the switch device. The MCIC can therefore monitor the control gate junction voltage and determine if it has fallen below the minimum value expected, and register an OT condition. In an OT event, an embodiment of the invention may transition the battery-pack into the shutdown mode (that is entered into in the event of a critical fault), and then transition back to the nominal operating modes through the slow ramp-up of charge on the control gate capacitor C. This ensures that the switch device is protected from damage due to overheating during charging of the battery cell or when the system containing the battery pack is operated at high temperatures.
As explained in a previous section, with carefully designed packaging of the battery-pack it may be feasible to sense the temperature of the battery cell as well through the sharing of a conductive heat-spreading plate between the cell and the switch. This modification in combination with the OT sensing capability of the invention could potentially eliminate the thermo-mechanical circuit breaker often integrated into the battery cell.
Drive Circuits Architecture
Key aspects of the circuits that drive the control gate of the switch device S (
Variable-Current Drive:
Alternate embodiments of the invention may have only one, or more than two of the drive pumps, providing for a lesser or greater range for the variable current drive. The charge outputs from the pumps may also be designed to be such as to provide an overlap between the operating ranges of the pumps, wherein a smaller pump operating at the maximum frequency may pump more charge per unit time, or provide more current than the next larger pump operating at the lower end of the pump clock frequency range.
An advantage of the variable current drive architecture is the ability to optimize the energy expenditure in the battery pack based on load current requirements. Together with the Dual-function Capacitor, it also provides an elegant timing solution for recovery from fault states.
Single-chip integration: Enhancement-mode JFET structures are quite easily created in standard CMOS process flows. Consider, for example, an N-Well CMOS process flow that creates P-type MOSFET devices within an n-well, this process uses a strongly p-doped silicon substrate. Planar JFET structures on such substrates have been shown to be feasible in reference [6], an application note published by Moxtek®. It will be apparent to those skilled in the art of fabricating electronic devices and integrated circuits that the integration of a JFET switch device with a planar CMOS process is feasible. While depletion JFET devices may be created with relative ease in such a process, enhancement devices may be created by positioning control gate ‘p+’ tubs close enough to each other such that the junction depletion regions overlap, blocking conduction in the channel between the gate tubs, when no external bias is provided across the gate PN junctions, and recede back toward the junctions as a forward external bias is applied, thus opening a conducting channel for the flow of current. This application of the prior art knowledge of the presence of intrinsic depletion regions in PN junctions as well as the properties of such regions is obvious.
The architecture of the invention that provides a controlled, small-value leak charge flow into the capacitor of the control gate allows for the value of the capacitor to be small for reasonable ‘auto-reset’ time durations. This enables the integration of the capacitor into a monolithic component.
Although specific embodiments have been illustrated and described herein, any circuit arrangement configured to achieve the same purposes and advantages may be substituted in place of the specific embodiments disclosed. This disclosure by the inventor is intended to cover any and all adaptations or variations of the embodiments of the invention provided herein. All the descriptions provided in the specification have been made in an illustrative sense and should in no manner be interpreted in any restrictive sense. The scope, of various embodiments of the invention whether described or not, includes any other applications in which the structures, concepts and methods of the invention may be applied. The scope of the various embodiments of the invention should therefore be determined with reference to the appended claims, along with the full range of equivalents to which such claims are entitled. Similarly, the Abstract of this disclosure, provided in compliance with 37 CFR §1.72(b), is submitted with the understanding that it will not be interpreted to be limiting the scope or meaning of the claims made herein. While various concepts and methods of the invention are grouped together into a single ‘best-mode’ implementation in the detailed description, it should be appreciated that inventive subject matter lies in less than all features of any disclosed embodiment, and as the claims incorporated herein indicate, each claim is to viewed as standing on it's own as a preferred embodiment of the invention.
Number | Date | Country | |
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60495835 | Aug 2003 | US |