Patent Application
20180350878
The present invention pertains to transmission gates. More particularly, the present invention relates to a Method and Apparatus for a Transmission Gate for Multi-GB/s Application.
Transmission gates are used as switches widely in both analog and digital circuit design, however with increasing operating speed the inherent bandwidth limitation of a transmission gate limits its application from high speed communication. To make the transmission gate on-resistance small, the sizes of transistors used in the transmission gate need to be large, but this will increase the capacitive load, which will reduce the bandwidth. This presents a technical problem which needs a technical solution.
In multi-Giga BPS (bit per second) applications, like for example, but not limited to, a multiplexer for PCIe (Peripheral Component Interconnect Express) and for DisplayPort, an active switch is often used, like a CML (Common Mode Logic) circuit, which has good bandwidth but consumes a lot of power compared to a passive transmission gate type switch. This presents a technical problem which needs a technical solution.
Thus there is a need for a technical solution to this technical problem. What is needed is a transmission gate which has reduced load capacitance and can be used in multi-Giga BPS while being power efficient. An ideal solution would also reduce the on resistance of the transmission gate.
The invention is illustrated by way of example and not limitation in the figures of the accompanying drawings in which:
In one embodiment of the invention, using the disclosed techniques a transmission gate is modified to reduce the load capacitance, and therefore it can be used in multi-Giga BPS communication, thereby allowing the switching of the high speed signals to be much simpler and power efficient.
In one embodiment of the invention the approach to improve the bandwidth of a transmission gate is to reduce on resistance and load capacitance simultaneously. An efficient solution is achieved in the present invention.
In one embodiment of the invention a unique approach is used to create different paths for the transmission gate at ON and OFF state. For example, in one embodiment, at ON state the gate capacitance will be connected in series with a “high” impedance component so that the load capacitance due to the gate capacitance will be reduced dramatically.
In one embodiment of the invention, at ON state the body of a transistor is connected to the source through a high impedance so the effective load to signal path by the channel to body capacitance will change to a series of channel to body capacitance and body to N-well-to-p-sub capacitance for an NFET (n-type field effect transistor).
In one embodiment of the invention, at ON state the body of a transistor is connected to the source through a high impedance so the effective load to signal path by the channel to body capacitance will change to a series of channel to body capacitance and p-body to deep N-well capacitance for a PFET (p-type field effect transistor).
In one embodiment of the invention, the body of a transistor is connected to the source through a high impedance so the effective load to signal path by the channel to body capacitance will change to a series of channel to body capacitance and body to N-well-to-p-sub capacitance for an NFET (n-type field effect transistor) at ON state, and p-body to deep N-well capacitance for a PFET (p-type field effect transistor) at ON state.
In one embodiment of the invention the transmission gate is built with a standard NWELL CMOS (n-type well complementary metal-oxide-semiconductor) process with a deep N-well option.
In the OFF state, the transmission gate has high resistance (ideally infinite) between source and drain, and load capacitance at the source/drain side is a combination of source/drain gate overlap capacitance and source/drain junction capacitance. The gate and the body terminal (body) are both biased by low impedance to AC (alternating current) ground, so the voltage at these nodes will not change with a signal at either input or output, this helps to keep the transmission gate in a strong OFF state and keep good isolation between input and output.
VDD denotes a supply voltage not at a ground potential. MP denotes a p-type FET (PFET), VBP denotes a body voltage bias for PFET. MN denotes an n-type FET (NFET), VBN denotes a body voltage bias for NFET. GND denotes ground. IN denotes input. OUT denotes output. Rg denotes a resistance to a gate. Rb denotes a resistance to a body.
We will now analyze the ON state of the NFET as shown in
For an ON resistance of a MOSFET (metal oxide semiconductor field effect transistor), the deterministic parameter is overdrive voltage besides device parameters. The overdrive voltage is a voltage difference between the gate to source voltage and the threshold voltage. A larger W/L (width/length) of the device gives lower ON resistance, and larger overdrive also reduces the ON resistance. Maximum gate to source voltage is limited by a power supply voltage and the maximum voltage a device allows, which is generally dependent on the semiconductor process a designer uses. The change of the gate to source voltage changes the ON resistance.
The ON resistance changes with a continuous signal level and will cause distortion, so keeping the ON resistance a fixed value is very important for a transmission gate to be used to pass a continuous signal. In this invention, in one embodiment, as shown in
Body effect is another factor to determine the overdrive voltage, this invention, in one embodiment of the invention, biases the body of the MOSFET at the same level as the signal common-mode. Rb provides a DC path from the input to body connection, so no DC difference exists between the body and the source, which removes the ON resistance changes due to signal common-mode level.
Thus a method and apparatus for a transmission gate for multi-gb/s application have been described.
Referring back to
Referring back to
For purposes of discussing and understanding the invention, it is to be understood that various terms are used by those knowledgeable in the art to describe techniques and approaches. Furthermore, in the description, for purposes of explanation, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be evident, however, to one of ordinary skill in the art that the present invention may be practiced without these specific details. In some instances, well-known structures and devices are shown in block diagram form, rather than in detail, in order to avoid obscuring the present invention. These embodiments are described in sufficient detail to enable those of ordinary skill in the art to practice the invention, and it is to be understood that other embodiments may be utilized and that logical, mechanical, electrical, and other changes may be made without departing from the scope of the present invention.
Some portions of the description may be presented in terms of algorithms and symbolic representations of operations on, for example, data bits within a computer memory. These algorithmic descriptions and representations are the means used by those of ordinary skill in the data processing arts to most effectively convey the substance of their work to others of ordinary skill in the art. An algorithm is here, and generally, conceived to be a self-consistent sequence of acts leading to a desired result. The acts are those requiring physical manipulations of physical quantities. Usually, though not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated. It has proven convenient at times, principally for reasons of common usage, to refer to these signals as bits, values, elements, symbols, characters, terms, numbers, or the like.
It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the discussion, it is appreciated that throughout the description, discussions utilizing terms such as “processing” or “computing” or “calculating” or “determining” or “displaying” or the like, can refer to the action and processes of a computer system, or similar electronic computing device, that manipulates and transforms data represented as physical (electronic) quantities within the computer system's registers and memories into other data similarly represented as physical quantities within the computer system memories or registers or other such information storage, transmission, or display devices.
An apparatus for performing the operations herein can implement the present invention. This apparatus may be specially constructed for the required purposes, or it may comprise a general-purpose computer, selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer readable storage medium, such as, but not limited to, any type of disk including floppy disks, hard disks, optical disks, compact disk- read only memories (CD-ROMs), and magnetic-optical disks, read-only memories (ROMs), random access memories (RAMs), electrically programmable read-only memories (EPROM)s, electrically erasable programmable read-only memories (EEPROMs), FLASH memories, magnetic or optical cards, etc., or any type of media suitable for storing electronic instructions either local to the computer or remote to the computer.
The algorithms and displays presented herein are not inherently related to any particular computer or other apparatus. Various general-purpose systems may be used with programs in accordance with the teachings herein, or it may prove convenient to construct more specialized apparatus to perform the required method. For example, any of the methods according to the present invention can be implemented in hard-wired circuitry, by programming a general-purpose processor, or by any combination of hardware and software. One of ordinary skill in the art will immediately appreciate that the invention can be practiced with computer system configurations other than those described, including hand-held devices, multiprocessor systems, microprocessor-based or programmable consumer electronics, digital signal processing (DSP) devices, set top boxes, network PCs, minicomputers, mainframe computers, and the like. The invention can also be practiced in distributed computing environments where tasks are performed by remote processing devices that are linked through a communications network.
The methods of the invention may be implemented using computer software. If written in a programming language conforming to a recognized standard, sequences of instructions designed to implement the methods can be compiled for execution on a variety of hardware platforms and for interface to a variety of operating systems. In addition, the present invention is not described with reference to any particular programming language. It will be appreciated that a variety of programming languages may be used to implement the teachings of the invention as described herein. Furthermore, it is common in the art to speak of software, in one form or another (e.g., program, procedure, application, driver, . . . ), as taking an action or causing a result. Such expressions are merely a shorthand way of saying that execution of the software by a computer causes the processor of the computer to perform an action or produce a result.
It is to be understood that various terms and techniques are used by those knowledgeable in the art to describe communications, protocols, applications, implementations, mechanisms, etc. One such technique is the description of an implementation of a technique in terms of an algorithm or mathematical expression. That is, while the technique may be, for example, implemented as executing code on a computer, the expression of that technique may be more aptly and succinctly conveyed and communicated as a formula, algorithm, or mathematical expression. Thus, one of ordinary skill in the art would recognize a block denoting A+B=C as an additive function whose implementation in hardware and/or software would take two inputs (A and B) and produce a summation output (C). Thus, the use of formula, algorithm, or mathematical expression as descriptions is to be understood as having a physical embodiment in at least hardware and/or software (such as a computer system in which the techniques of the present invention may be practiced as well as implemented as an embodiment).
A machine-readable medium is understood to include any non-transitory mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer). For example, a machine-readable medium includes read only memory (ROM); random access memory (RAM); magnetic disk storage media; optical storage media; flash memory devices; mechanical, electrical, optical, acoustical or other forms of non-transitory signals.
As used in this description, “one embodiment” or “an embodiment” or similar phrases means that the feature(s) being described are included in at least one embodiment of the invention. References to “one embodiment” in this description do not necessarily refer to the same embodiment; however, neither are such embodiments mutually exclusive. Nor does “one embodiment” imply that there is but a single embodiment of the invention. For example, a feature, structure, act, etc. described in “one embodiment” may also be included in other embodiments. Thus, the invention may include a variety of combinations and/or integrations of the embodiments described herein.
As used in this description, “substantially” or “substantially equal” or similar phrases are used to indicate that the items are very close or similar. Since two physical entities can never be exactly equal, a phrase such as “substantially equal” is used to indicate that they are for all practical purposes equal.
As used in this description “low power” or “lower power” or similar language refers to a comparison with the industry standard at the time of this invention.
As used in this description, “line code specification”, “line code” or similar language is understood by one of skill in the art to refer to the modulation method (code) for a signal for transmission on a particular type of transmission medium (line).
As used in this description “datastream” or “data stream” are considered to refer to a stream of data.
It is to be understood that in any one or more embodiments of the invention where alternative approaches or techniques are discussed that any and all such combinations as might be possible are hereby disclosed. For example, if there are five techniques discussed that are all possible, then denoting each technique as follows: A, B, C, D, E, each technique may be either present or not present with every other technique, thus yielding 2̂5 or 32 combinations, in binary order ranging from not A and not B and not C and not D and not E to A and B and C and D and E. Applicant(s) hereby claims all such possible combinations. Applicant(s) hereby submit that the foregoing combinations comply with applicable EP (European Patent) standards. No preference is given any combination.
Thus a method and apparatus for reduction of communications media energy consumption circuit have been described.
