Claims
- 1. An apparatus, comprising:
an acquisition unit for acquiring a data signal for a predetermined time; a memory for storing said data signal; a controller, including a memory for storing a software phase locked loop program, a processor for executing said software phase locked loop program, and recovering a clock signal from said stored data signal.
- 2. The apparatus of claim 1, wherein said processor further slices said stored data signal into a plurality of data segments of a predetermined length in accordance with said recovered clock signal, and overlays said plurality of data segments in a display memory for display in a time synchronized manner.
- 3. The apparatus of claim 1, wherein said processor further slices said stored data signal into a plurality of bit sequences of a predetermined length in accordance with said recovered clock signal, and overlays said plurality of data segments in a display memory for display in a time synchronized manner.
- 4. The apparatus of claim 1, wherein said processor further slices said stored data signal into a plurality of data segments of a predetermined length in accordance with a time interval error determination in order to generate said recovered clock signal.
- 5. The apparatus of claim 1, wherein said apparatus is included within an oscilloscope.
- 6. The apparatus of claim 1, wherein said data signal in accordance with said recovered clock are displayed on a display as one of an eye diagram and a mask function.
- 7. An oscilloscope comprising:
an analog to digital converter for acquiring a data signal; an acquisition unit for acquiring a data signal for a predetermined time; a phase locked loop for recovering a clock signal from said stored data signal; and a display for displaying said data signal in accordance with said clock signal.
- 8. The oscilloscope of claim 8, wherein said phase locked loop comprises a software phase locked loop.
- 9. A method, comprising the steps of:
acquiring a data signal by an acquisition unit of a test instrument for a predetermined time; storing said data signal in a memory of said test instrument; recovering a clock signal from said stored data signal by adjusting the phase of said recovered clock signal in accordance with a determined error between a frequency of said acquired data signal and a frequency of said recovered clock signal; slicing said stored data signal into a plurality of data segments of a predetermined length in accordance with said recovered clock signal; and displaying at least one of an eye diagram and a mask diagram in accordance with said plurality of data segments.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application claims the benefit of U.S. Provisional Patent Application Serial No. 60/415,236, filed Sep. 30, 2002, the entire contents of which is incorporated herein by reference.
Provisional Applications (1)
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Number |
Date |
Country |
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60415236 |
Sep 2002 |
US |