This application claims priority under 35 U.S.C. §119(a) to an application filed in the Korean Intellectual Property Office on Sep. 27, 2010, and assigned Serial No. 10-2010-0093327, the content of which is incorporated herein by reference.
1. Field of the Invention
The present invention relates generally to a method and apparatus for compiling and executing an application with virtualization in a heterogeneous system integrating Central Processing Unit (CPU) and Graphic Processing Unit (GPU), and more particularly, to a method and apparatus for compiling and executing the application by compiling a GPU source code of the application into a GPU virtual instruction in a source code compiling process and translating the compiled GPU virtual instruction into a GPU machine code in a file execution process.
2. Description of the Related Art
Advances in GPU technology are bringing a number of changes to computing environments. More specifically, conventionally a GPU is a device designed for graphics processing and it has been dealt with as an auxiliary part for mitigating overload of the CPU, as the main part of a computer, when there is little use of graphic content. However, with the widespread popularization of High Definition (HD) video and games, and now even 3-Dimensional (3D) content, the role of the GPU is increasing. That is, the GPU has recently been spotlighted as a unit responsible for processing large volume of operations in place of CPU as well as graphics processing. Accordingly, as the role of GPU is expanded, there is a growing need to improve the utilization efficiency of the GPU.
Accordingly, the present invention is provided to address the above-mentioned problems and/or disadvantages and to offer at least the advantages described below.
An aspect of the present invention is to provide a method and apparatus for compiling and executing an application using virtualization in a heterogeneous system integrating CPU and GPU.
Another aspect of the present invention to provide a method and apparatus that compiles GPU source code into a GPU virtual instruction when compiling the source codes included in the application and translates the compiled virtual GPU command to a GPU machine code directly, resulting in enhanced CPU and GPU utilization efficiency.
In accordance with an aspect of the present invention, a method for compiling and executing an application in a system including a Central Processing Unit (CPU) and a Graphic Processing Unit (GPU) is provided. The method includes receiving a request for compiling the application, the application including CPU source code and GPU source code; generating an execution file in response to the request for compiling by compiling the GPU source code into a GPU virtual instruction; receiving a request for executing the execution file; and executing the execution file by translating the GPU virtual instruction into GPU machine code, in response to the request for executing the execution file.
In accordance with another aspect of the present invention, an apparatus for compiling and executing an application including Central Processing Unit (CPU) source code and Graphic Processing Unit (GPU) source code is provided. The apparatus includes a hardware device including a CPU and a GPU; a compiler that compiles the GPU source code into a GPU virtual instruction; and a hybrid virtualization block that executes an execution file by translating the GPU virtual instruction into GPU machine code.
In accordance with another aspect of the present invention, an apparatus for compiling and executing an application including Central Processing Unit (CPU) source code and Graphic Processing Unit (GPU) source code is provided. The apparatus includes a hardware device including a CPU and a GPU; a compiler that compiles the GPU source code into a GPU virtual instruction; and an Operating System (OS) for executing an execution file by translating the GPU virtual instruction into GPU machine code.
The above and other aspects, advantages, and salient features of certain embodiments of the present invention will become apparent to those skilled in the art from the following detailed description, when taken in conjunction with the accompanying drawings, in which:
Various embodiments of the present invention are described in detail below with reference to the accompanying drawings. In the following description, the matters defined in the description are provided to assist a comprehensive understanding of the present invention, and it is obvious to those of ordinary skill in the art that predetermined modifications or changes of the matters described herein can be made without departing from the scope of the invention. The same reference numbers are used throughout the drawings to refer to the same or like parts. Further, detailed descriptions of well-known functions and structures incorporated herein may be omitted to avoid obscuring the subject matter of the present invention.
In the following description, the term “application” means an application program of original code or source code before being compiled. For example, the source code can be CPU source code for executing a CPU operation or GPU source code for executing a GPU operation. Additionally, the term “execution file” means a file generated by a compiler when compiling an application.
Basically, a GPU can be used by an application (or application program) in two ways. The first way is for a system program, such as an OS, to provide a library for the application to use. The second way is to include a code to be used by GPU in the application in order for the GPU to directly execute the code in a program runtime.
As illustrated in
Open Graphics Library (OpenGL®) is a representative graphics standard for use in a system configuration as illustrated in
For example, for implementing face recognition operations using a GPU, a standard face recognition API should be designated and implemented in a corresponding system in the form of a library. However, if the library for the face recognition operations is not provided, there is no way for the program developer to implement the operations.
Similar to
Referring to
In step S310, a CPU machine code of the execution file is executed. If the GPU is to be used while running the execution file, the code for the GPU is compiled at the source code level. In step S320, a GPU machine code created as a compiling result is executed. After the completion of the GPU machine code execution, the CPU machine code is executed again in step S325.
The GPU source code compiling process in step S315, is illustrated in more detail in steps S330-S365, on right part of
Specifically, once the GPU source code compile is initiated in step S330, the GPU machine code is generated via lexical-syntax analysis in step S335, preprocessing in step S340, syntax analysis in step S345, other analysis in step S350, optimization in step S355, code generation in step S360, and GPU machine code creation in step S365. This method is advantageous in that the corresponding GPU source code can be executed by the GPU, regardless of the GPU type (manufacturer). In this case, the common GPU source code is distributed to be compiled in the runtime and operate in the format of a certain GPU machine code.
Referring to
The code illustrated in
Referring to
As described above, as the role of the GPU is becoming more significant, there is a need for a method for expanding the use of the GPU more freely to overcome the restriction described above, wherein only the standardized API can be used. Accordingly, an aspect of the present invention is to provide an improved method for efficient GPU application use.
More specifically, a conventional technique, such as OpenCL®, has a drawback in that execution speed decreases significantly because a GPU source code is compiled in a program runtime. The compiling operation includes a plurality of intermediate steps and is complex, thereby causing significant problems in an embedded system lacking in computing power.
Further, there is a tradeoff in that the simplification of a process for compiling GPU machine code makes it difficult to generate an optimized GPU machine code, and the optimization of the GPU machine code increases the compiling operation complexity. Also, in a conventional method, such as OpenCL®, the GPU source code 510 is inserted into the data region of the execution file or exists in the form of an external script file, e.g., GPU source code 520, as illustrated in
Accordingly, as aspect of the present invention is to provide a method and apparatus for efficiently utilizing a CPU and a GPU and to address the aforementioned problems of the prior art. That is, it is an aspect of the present invention to minimize a time delay caused by complex GPU compiling, to prevent the GPU source code from being exposed, and to provide GPU machine code that can be compiled, regardless of the type of GPU.
For this purpose, the present invention uses a code for GPU operation, which is compiled at an instruction level (or machine code level) rather than at a source code level. In the following description, the GPU source code compiled at instruction level is referred to as a GPU virtual instruction. The GPU virtual instruction is the virtual instruction, other than the machine code executed on the actual GPU hardware. The GPU virtual instruction is binary-translated to a GPU machine code in runtime to be executed. The GPU virtual instruction also can be executed on all the types of GPU hardware.
Because it is compiled into a virtual instruction, the GPU virtual instruction according to an embodiment of the present invention improves the execution speed in runtime and is robust in security.
As described above, in OpenGL® GPU source code is excluded when compiling the application. During a runtime of the binary image, the source code is compiled via lexical analysis, preprocessing, syntax analysis, and optimization; and GPU machine code, which is a result of the compiling, is then executed.
In accordance with an embodiment of the present invention, however, the GPU source code is compiled into a GPU virtual instruction at an instruction level. The GPU virtual instruction is then translated into a GPU machine code to be executed during a runtime of the execution file.
Unlike the conventional method in which the compiling process is performed from the GPU source code at the time when the GPU source code is executed, a method according to an embodiment of the present invention simplifies the procedure by translating the GPU virtual command, which has been already compiled and translated into a GPU machine code.
Referring to
The compiler 720 compiles the CPU source code and GPU source code included in the application 710 into a machine code. Here, the compiler 720 compiles the CPU source code into a CPU machine code and compiles the GPU source code into a GPU virtual instruction. Accordingly, the compiler 720 generates an execution file including the CPU machine instruction and GPU virtual instruction. In the following description, the execution file generated as above is referred to as “a hybrid binary image”. A hybrid execution file is described in more detail below with reference to
The hybrid virtualization block 730 is interposed between the application layer and the hardware layer to detect a GPU virtual command during the runtime and translate, when the GPU virtual command is detected, the GPU virtual instruction into GPU machine code. Further, the hybrid virtualization block 730 coordinates the application execution process.
The system illustrated in
Referring to
The virtual section header 820 includes a watermark for identifying the virtual section and execution information such as CPU and GPU execution times.
The CPU machine code section 830 includes the CPU machine codes to be executed when the CPU is to execute, e.g., because the system has no GPU or the GPU is busy processing another task.
The GPU virtual instruction region 840 includes instructions to be executed by the GPU. The GPU virtual instruction region 840 includes a virtual instruction header 850 and virtual instruction code 860. The virtual instruction header 850 includes information on addresses of a memory for input and output of the to execute a GPU operation and a number of recommended Processing Elements (PEs). The GPU virtual instruction code includes the virtualized information to be executed by the GPU. That is, the GPU virtual instruction code is the code to be translated into a GPU machine code in the runtime.
Referring to
More specifically, when a CPU source code is detected, the compiler 720 compiles the CPU source code in step S920 and generates a CPU machine code that is executable by the CPU in step S930. Further, when a GPU code is detected, the compiler 720 compiles the GPU code in step S940 and generates a GPU virtual instruction that is executable by a virtual GPU in step S950. For example, the GPU virtual instruction is structured as illustrated in
The compiler 720 links the created CPU machine code to the GPU virtual instruction in step S960 and generates a hybrid execution file (binary image) in step S970.
As described above, the hybrid execution file includes CPU machine codes and a virtual section. When the hybrid execution file is executed, the CPU section and the GPU section are executed separately according to the coordination of the virtualization layer, as will be described below with reference to
When the system is organized hierarchically,
Referring to
The hybrid virtualization block 730 checks a watermark of the virtual section to identify the virtual section in step S1030. If no virtual section is identified, the hybrid virtualization block 730 performs a conventional exception handling in step S1050 and hands over the system control to the OS in step S1055.
However, if a virtual section is identified in step S1030, the hybrid virtualization block 730 translates the GPU virtual instruction to a GPU machine code in step S1035. In step S1040, the hybrid virtualization block 730 inserts the translated GPU machine code into the memory (or file) execution region, as illustrated in
If no exception occurs in step S1020, the OS determines whether a GPU branch is detected in step S1060. If a GPU branch is detected, the OS executes the GPU machine code in step S1070 and, otherwise, the OS executes a CPU machine code in step S1065. Here, the GPU machine code executed through steps S1060 and S1070 is the GPU machine code translated in step S1035 and existing in the memory (or file) that can be executed without an additional translation step.
Hereinabove, a description has been provided wherein the hybrid virtualization block 703 of the virtualization layer runs the hybrid execution file. Hereinbelow, a description will be made when an OS runs the hybrid execution file, without introduction of additional virtualization layer, with reference to
Once the hybrid execution file is executed in step S1205, the OS determines if an exception occurs in the CPU in step S1210. If the exception occurs, the OS checks the watermark in the virtual section to identify the virtual section in step S1215. If no virtual section is identified, the OS performs the conventional exception handling in step S1235 and executes the CPU machine code in step S1240).
If a virtual section is identified in step S1215, the OS translates the GPU virtual instruction to a GPU machine code in step S1220, and inserts the translated GPU machine code into the memory (or file) execution region in step S1225, as illustrated in
In step S1230, the OS executes the corresponding machine code using the GPU.
It no exception occurs in step S1210, the OS determines whether a GPU branch is detected in step S1245. If a GPU branch is detected, the OS executes the GPU machine code in step S1230 and, otherwise, the OS executes the CPU machine code in step S1240. Here, the GPU machine code executed through steps S1245 and S1230 is the GPU machine code translated in step S1220 and existing in the memory (or file) that can be executed without an additional translation step.
As described above, in accordance with an embodiment of the present invention, a GPU translates the GPU virtual instruction into the GPU machine code using a hybrid virtualization block located on a virtualization layer.
Referring to
As described above, according to another embodiment of the present invention, an OS translates a GPU virtual instruction into GPU machine code during a runtime.
Referring to
As described above, an application execution method and apparatus in accordance with the embodiments of the present invention is capable of efficiently utilizing a CPU and a GPU simultaneously and improving GPU execution efficiency by solving problems of a conventional real time compiling method with a GPU.
The application execution method and apparatus of the present invention compiles GPU source code included in a source code of an application in a GPU virtual instruction and translates the compiled GPU virtual instruction to a GPU machine code, whereby it is possible to improve the utilization efficiency of the CPU and the GPU simultaneously and the GPU running efficiency by compensating for the problem of the real time compiling method for use of GPU.
Also, the application execution method and apparatus of the present invention is capable of preventing the GPU source code from exposure to the outside, resulting in improved security. Further, the application execution method and apparatus of the present invention introduces GPU virtual instructions, which are transparent to hardware, i.e., to be implemented independently without consideration of the GPU hardware manufacturer.
Although certain embodiments of the present invention have been described in detail hereinabove, it should be clearly understood that many variations and/or modifications of the basic inventive concepts herein taught which may appear to those skilled in the present art will still fall within the spirit and scope of the present invention, as defined in the appended claims and any equivalents thereof.
Number | Date | Country | Kind |
---|---|---|---|
10-2010-0093327 | Sep 2010 | KR | national |
Number | Name | Date | Kind |
---|---|---|---|
5794062 | Baxter | Aug 1998 | A |
7430670 | Horning et al. | Sep 2008 | B1 |
20020133810 | Giles et al. | Sep 2002 | A1 |
20050044301 | Vasilevsky et al. | Feb 2005 | A1 |
20080184211 | Nickolls et al. | Jul 2008 | A1 |
20090064095 | Wallach et al. | Mar 2009 | A1 |
20090070553 | Wallach et al. | Mar 2009 | A1 |
20090300645 | Devine et al. | Dec 2009 | A1 |
Number | Date | Country |
---|---|---|
101231585 | Jul 2008 | CN |
101599009 | Dec 2009 | CN |
10-320214 | Dec 1998 | JP |
2008-276740 | Nov 2008 | JP |
WO 2009029698 | Mar 2009 | WO |
Entry |
---|
Bakhoda, Ali, et al. “Analyzing CUDA workloads using a detailed GPU simulator.” Performance Analysis of Systems and Software, 2009. ISPASS 2009. IEEE International Symposium on. IEEE, 2009. |
Ryoo, Shane, et al. “Program optimization space pruning for a multithreaded gpu.” Proceedings of the 6th annual IEEE/ACM international symposium on Code generation and optimization. ACM, 2008. |
Mark et al., “CG: A System for Programming Graphics Hardware in a C-like Language”, Proceedings of ACM SIGGRAPH 2003, vol. 22, No. 3, Jul. 3, 2003. |
Rolles, “Unpacking Virtualization Obfuscators”, Proceedings of the 3rd USENIX Workshop on Offensive Technologies, 2009. |
Chafi et al., “Language Virtualization for Heterogeneous Parallel Computing”, Proceedings of the ACM International Conference on Object Oriented Programming Systems Languages and Applications, vol. 45, No. 10, Oct. 2010. |
Chinese Office Action dated Nov. 4, 2014 issued in counterpart application No. 201180046553.5. |
The CUDA Compiler Driver NVCC, NVIDIA Corporation, Apr. 24, 2008, 31 pages. |
Kenji Okada, “Introduction to CUDA High-Speed GPU Programming”, 1st Edition, Mar. 25, 2010, 9 pages. |
John. R. Levine, “Linkers & Loaders”, 1st Edition, Sep. 25, 2001, 24 pages. |
Japanese Office Action dated Dec. 7, 2015 issued in counterpart application No. 2013-531479, 8 pages. |
Ali Bakhoda et al., “Analyzing CUDA Workloads Using a Detailed GPU Simulator”, Performance Analysis of Systems and Software, IEEE International Symposium, 2009, 12 pages. |
Korean Office Action dated Jul. 18, 2016 issued in counterpart application No. 10-2010-00933327, 14 pages. |
Number | Date | Country | |
---|---|---|---|
20120075316 A1 | Mar 2012 | US |