Claims
- 1. A pager for use with a paging system, the paging system being configured to transmit pages according to a plurality of protocols over a plurality of channels, the paging system being further configured to transmit pages in a plurality of page segments, the plurality of segments each having an address block and a data block separate from the address block, each address block capable of having a plurality of addresses and each data block having a plurality of data portions corresponding to the plurality of addresses in the address block, the paging system being still further configured to transmit a header synchronization (HS) segment and a system information (SI) segment, the segments being part of a frame, the pager comprising:
- means for receiving an address block of a segment of a frame;
- means for determining whether an address assigned to the pager is included in the address block after the address block is entirely received;
- means for receiving a data block corresponding to the received address block when the address of the pager is included in the address block and for not receiving the corresponding data block when the address of the pager is not included in the received address block.
- 2. The pager of claim 1 wherein the HS segment includes a signal that appears to be substantially invariant with respect to frequency offset in the pager and Doppler shift in the channel, each protocol of the plurality of protocols having a unique HS segment, the pager being configured to detect whether a transmission is according to the pager's protocol by detecting whether the HS segment corresponds to the pager's protocol.
- 3. The pager of claim 1 wherein the paging system is configured to broadcast a frame with a predetermined number of page segments numbered 1 through N, N being an integer that can be represented in binary form with M bits, all of the addresses in the address block of each page segment being a binary number having more than M bits, all of the addresses in the address block of each page segment having the same value for M preselected bits, the M bits corresponding to the number of the page segment, the M bits being omitted from all of the addresses in the address block of each page segment.
- 4. The pager of claim 3 wherein the M bits are preselected to be the M lower order bits of the address and wherein N is equivalent to 2.sup.M.
- 5. The pager of claim 3 wherein the means for receiving an address block is configured to not receive segments having a segment number different from the M lowest order bits of the pager's address.
- 6. The pager of claim 1 wherein the paging system is further configured to transmit a page segment with the plurality of addresses of its address block being arranged in numerical order, and wherein the means for determining is configured to compare each address of the plurality of addresses in order with the address of the pager until the address matches the pager's address or is out of numerical order relative to the pager's address.
- 7. The pager of claim 1 wherein the paging system is further configured to transmit a page segment with information indicative of the range of addresses the address block, and wherein the means for determining is further configured to determine whether the pager's address is within the range of addresses and to cause the pager to enter a low-power mode for the remainder of the frame when the pager's address is not included in the range of addresses.
- 8. The pager of claim 1 wherein the paging system is further configured to transmit a page segment with the number of addresses in the address block, the means for determining being still further configured to:
- cause the pager to enter the low-power mode when the number of addresses is zero;
- cause the pager to receive the address or addresses of the address block when the number of addresses is less than three; and
- cause the pager to receive the range of addresses when the number of address is equal to or greater than three.
- 9. The pager of claim 1 wherein the means for determining is still further configured to perform a binary search of the addresses in the address block.
CROSS-REFERENCED TO RELATED APPLICATONS
This application is a divisional of U.S. Application Ser. No. 09/185,286, filed Nov. 3, 1998, which claims the benefit of U.S. Provisional Application Ser. No. 60/067,465 filed Dec. 4, 1997 and is a divisional of U.S. patent application Ser. No. 09/185,286, filed on Nov. 3, 1998.
US Referenced Citations (3)
Number |
Name |
Date |
Kind |
5089813 |
DeLuca et al. |
Feb 1992 |
|
5423057 |
Kuznicki et al. |
Jun 1995 |
|
5440299 |
Schwendeman |
Aug 1995 |
|
Divisions (1)
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Number |
Date |
Country |
Parent |
185286 |
Nov 1998 |
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