1. Field of the Invention
Embodiments of the invention relate generally to methods and apparatuses for controlling the timing used to sample signals produced in relation to data stored in a data storage medium such as a magnetic disk of a hard disk drive. More particularly, embodiments of the invention relate to methods and apparatuses for controlling the timing used to sample signals produced in relation to stored data based on a phase error calculated as a difference between an equalized signal and an estimated data signal, both generated in relation to the stored data.
2. Description of Related Art
A hard disk drive is an electronic device comprising a storage medium used to store information. As an example, a typical hard disk drive comprises a magnetic disk having concentric tracks capable of storing data. The magnetic disk is placed on a spin motor so that the disk can be rotated, and data stored on the disk is accessed by a head mounted on an actuator driven by a voice coil motor (VCM). The VCM rotates the actuator with a VCM driving current, and as a result, the head moves across the disk to access data.
The head reads information recorded on the surface of the disk by sensing changes in a magnetic field apparent on the surface of the disk, and the head stores information on the surface of the disk by generating a magnetic field in response to a write current supplied to the head. The magnetic field generated by the head causes the disk surface to be magnetized so that data is recorded or stored on the disk.
When the head reads information recorded on the surface of the disk, the magnetic field apparent on the surface of the disk produces a signal through the head. The signal is sampled through a sampling process and then converted into output data through a Viterbi decoding process.
Unfortunately, the accuracy of the output data tends to be very sensitive to the timing of the sampling process. As a result, variation in the timing of the sampling process tends to cause errors in the output data.
The timing of the sampling process is generally controlled by a sampling clock signal output by a voltage controlled oscillator (VCO), where the frequency of the sampling clock signal is derived from an oscillation frequency of the VCO. To stabilize the timing of the sampling process, the VCO relies on timing information recovered from the analog signal produced through the head to control its oscillation frequency.
In order to stably control the timing of the sampling process using conventional techniques, the tracking time required to compensate a timing offset (e.g., phase and/or frequency offsets) must be small, and the range of the timing offset that can be compensated, i.e., a pull-in range, must be wide.
Unfortunately, however, as the density of the recording medium increases, the signal-to-noise ratio of signals produced by the head of the hard disk drive tends to increase, and therefore it becomes increasingly difficult for conventional techniques to recover data encoded in those signals.
According to one embodiment of the invention, a method of calculating a current phase error between an equalized signal and an estimated data signal is provided. The current phase error is used to control the timing of a sampling process in a system adapted to reproduce a signal transmitted through a communication channel by sampling, equalizing, and Viterbi decoding the signal. The method comprises recursively applying a previous phase error to a calculation of the current phase error to eliminate effects of noise from the current phase error.
According to another embodiment of the invention, a signal reproducing apparatus is provided. The apparatus comprises an analog-to-digital converter (ADC) adapted to sample a signal transmitted through a communication channel to produce a sampled signal, an equalizer adapted to equalize the sampled signal to produce an equalized signal, a data estimator adapted to estimate a value of the signal transmitted through the communication channel based on the equalized signal to produce and estimated signal, a phase estimator adapted to calculate a current phase error between the equalized signal and the estimated signal, and a loop filter adapted to control an oscillation frequency of an oscillator adapted to generate a sampling clock for the ADC based on the current phase error calculated by the phase estimator. The phase estimator calculates the current phase error based on a previous phase error.
According to still another embodiment of the invention, a method of reproducing a signal transmitted through a communication channel is provided. The method comprises sampling the transmitted signal to produce a sampled signal, equalizing the sampled signal to produce an equalized signal, and Viterbi decoding the equalized signal to produce an estimated data signal. The Viterbi decoding comprises calculating branch metrics based on estimated phase errors of the equalized signal. The method further comprises calculating additional estimated phase errors based on the calculated branch metrics, calculating an estimated phase error used in a loop filter based on a phase estimate value corresponding to a survival path selected during the Viterbi decoding, and controlling a sampling time used to sample the transmitted signal based on the estimated phase error used in the loop filter.
According to yet another embodiment of the invention, ae signal reproducing apparatus comprises an analog-to-digital converter (ADC) adapted to sample a signal transmitted through a communication channel to produce a sampled signal, an equalizer adapted to equalize the sampled signal to produce an equalized signal, a branch metric calculator & phase compensator (BMC) adapted to calculate branch metrics based on the equalized signal and corresponding estimated phase errors and to output the branch metrics and corresponding estimated phase values, an add compare selection & path memory (ACS & PM) adapted to compute path metrics based on the branch metrics and estimated phase values output by the BMC and to output an estimated data signal and a previous estimated phase error based on a survival path derived from the path metrics, a phase estimator adapted to calculate a current estimated phase error to be applied to the BMC based on the previous estimated phase error output by the ACS & PM, and a loop filter adapted to control an oscillation frequency of an oscillator used to control the timing of the sampling performed by the ADC. The loop filter controls the oscillation frequency based on the previous estimated phase error output by the ACS & PM.
The invention is described below in relation to several embodiments illustrated in the accompanying drawings. Throughout the drawings like reference numbers indicate like exemplary elements, components, or steps. In the drawings:
Exemplary embodiments of the invention are described below with reference to the corresponding drawings. These embodiments are presented as teaching examples. The actual scope of the invention is defined by the claims that follow.
Referring to
ADC 102 receives and samples an analog input signal generated in relation to data stored in a data storage medium such as a magnetic disk in a hard disk drive. The input signal is typically produced by the operation of a head of the hard disk drive and transferred to ADC 102 through the head. By sampling the input signal, ADC 102 produces a sampled input signal. Equalizer 104 receives and reshapes the sampled input signal and outputs a resulting equalized signal.
Data estimator 106 performs a Viterbi decoding operation on the equalized signal to produce an estimated data signal based on the data stored in the hard disk drive. In general, the Viterbi decoding operation is performed by computing branch metrics for a sequence of data inputs and then accumulating the branch metrics to form path metrics. In data estimator 106, BMC 106a computes the branch metrics for the Viterbi decoding operation and ACS & PM 106b computes the path metrics.
Although data estimator 106 uses a Viterbi decoding operation in selected embodiments of the invention, variations of the Viterbi algorithm and other similar operations can be used to decode data received by data estimator 106.
Delay unit 108 delays the equalized signal output by equalizer 104 and outputs a delayed signal to phase estimator 110. Phase estimator 110 calculates an estimated phase error by comparing the delayed signal output by delay unit 108 with the estimated data signal produced by data estimator 106.
Loop filter 112 generates a control signal corresponding to the estimated phase error output from phase estimator 110. DAC 114 converts the control signal generated by loop filter 112 into an analog control signal, and the analog control signal is used to control the oscillation frequency of VCO 116. Based on the oscillation frequency, VCO 116 generates a clock signal for controlling the sampling operation performed by ADC 102.
ADC 102 performs the sampling operation in synchronization with the clock signal generated by VCO 116. Accordingly, the timing of the sampling operation can be adjusted to compensate for phase error by controlling the oscillation frequency of VCO 116 based on the estimated phase error output by phase estimator 110.
Referring to
Binary data yk is generated by convolution of binary data kk with the impulse response of the effective communication channel and binary data εk is generated by convolution of binary data xk with the impulse response of the derivative communication channel. Since binary data yk is generated by a convolution operation that does not take into account noise and delay in the communication channel, the term yk may also be referred to as an “ideal candidate signal”.
Branch metrics used in the Viterbi decoding operation can be calculated in BMC 106a as a squared Euclidean distance λk expressed by the following equation (1):
λk=(yk−ck)2. (1)
Each branch metric corresponds to a potential state transition of decoded data during the k-th clock cycle. More particularly, each branch metric is a squared Euclidean distance at each branch of a Viterbi trellis. Each branch metric represents a distance between the data ck and a particular candidate yk. The ideal candidate signal yk changes according to different branches in the Viterbi trellis. Where the input signal ck is similar to a particular candidate yk, the Euclidean distance in equation (1) will be small.
In
The impulse response fk of the effective communication channel depends on properties of a recording and/or reproducing system used to generate signals from the stored binary data input to the communication channel. The impulse response gk of the derivative communication channel is obtained by differentiating the impulse response fk of the effective communication channel.
The term {circumflex over (x)}k denotes Viterbi decoded data produced by the communication channel in the k-th clock cycle, and the term {circumflex over (Δ)}k denotes an estimated phase error of output data ck in the k-th clock cycle. The term {circumflex over (Δ)}k is an estimate of phase error Δ and the term {circumflex over (x)}k is an estimate of binary data xk. In one implementation, binary output data εk from the derivative communication channel is computed from Viterbi decoded data {circumflex over (x)}k. Alternatively, binary output data εk may comprise a value derived from a branch metric corresponding to a state transition in BMC 106a.
As an example, εk can generally be computed using binary data xk and impulse response gk of the derivative communication channel. Impulse response gk is typically known but data xk is not known. There are various approaches for computing binary data xk. For example, a first approach is to use Viterbi decoded data {circumflex over (x)}k in place of binary data xk. A second approach is to use transition information ãk in a Viterbi trellis such as that illustrated in
According to selected embodiments of the invention, a previous phase error and a current phase estimate value are used in combination to reduce the effects of noise in the communication channel.
For example, in phase estimator 110, estimated phase error {circumflex over (Δ)}k in the k-th clock cycle can be expressed by the following equation (2):
{circumflex over (Δ)}k={circumflex over (Δ)}k−1+γ(ekεk−ek−Mεk−M). (2)
In equation (2), the term {circumflex over (Δ)}k−1 denotes an estimated phase error in the (k−1)-th clock cycle, ek denotes an error signal, γ is a constant that depends on the impulse response gk of the derivative communication channel, and M denotes a number of clock cycles previous to the k-th clock cycle. Error signal ek can be computed by the equation ek=ck−yk, binary data yk output from the effective communication channel can be computed as yk=Σfi×xk−i, derivative channel output data εk can be computed as
and γ can be computed as
A typical hard disk drive has a channel length of 4. In other words, where there is inter-symbol interference (ISI) in the channel, a signal response spreads to multiple sampling positions. In particular, a length-4 “1+2D+2D2+D3n” partial response (PR) channel produces response ‘1’ at time k, ‘2’ at time k+1, ‘2’ at time k+2, and ‘1’ at k+3. A final signal output from the channel will be a sum of the partial responses generated at different times.
The derivative channel is the derivative of the continuous-time representation of the PR channel, and therefore it typically has a greater length than the PR channel length. For explanation purposes, it will be assumed that the derivative channel has a length of 6. Accordingly, it will be assumed that binary data yk has a length of 4, and that binary data εk has a length of 6. However, the channel length of the hard disk drive may increase as the recoding density of the hard disk drive increases. The respective values of binary data yk and εk tend to increase as the recording density of the hard disk drive increases.
In equation (2), previous estimated phase error {circumflex over (Δ)}k−1, is used to compute current estimated phase error {circumflex over (Δ)}k. In other words, estimated phase error {circumflex over (Δ)}k is computed in a recursive manner. The recursive structure of equation (2) tends to reduce the effect of noise on the estimated phase error calculation, and can also reduce the associated computational complexity. To illustrate how the recursive structure of equation (2) reduces the effect of noise, the recursive structure is equivalent to averaging data from time index ‘k−M+1’ to ‘k’, i.e. from ek+M+1εk−M+1 to ekεk. The averaging function lessens the effect of random noise with mean zero.
In addition, the recursive structure of equation (2) is similar to that of a branch metric calculation or a path metric calculation, and therefore techniques similar to those used in Viterbi decoding can be applied to phase estimator 110.
The term γ(ekεk−ek−Mεk−M) in equation (2) expresses a difference between a current phase estimation value ek εk and a previous phase estimation value ek−Mεk−M, multiplied by the constant γ. The use of the previous phase estimation value tends to reduce the effects of noise in the phase error computation. Equation (2) computes a value of estimated phase error {circumflex over (Δ)}k that minimizes a squared error between ei=ci−yi and {circumflex over (Δ)}k εk over an observation window of M samples.
Tracking performance can be adjusted by adjusting the size of M in based on variation of the estimated phase error. For example, by monitoring changes in the estimated phase error, the tracking performance can be adjusted by causing the value of M to automatically adjust in relation to variation in the estimated phase error. It is also possible to adjust the value of M in relation to tradeoffs between a desired noise tolerance level and desired system performance. Such adjustments to the value of M can be determined, for example, through simulation.
The value of γ is typically determined in relation to the value of M and the output of the derivative channel. Appropriate adjustments to the value of γ can serve to reduce the effects of noise on the calculation of the estimated phase error.
Hardware for implementing equation (2) typically requires a structure for storing M previous phase error estimates. As a result, the complexity of the hardware increases as the value of M increases. However, the complexity of the hardware can be reduced by modifying equation (2) to obtain the following equation (3):
Δk=μΔk−1+γekεk (3)
Referring to
ADC 302 receives and samples an input signal generated in relation to a data storage medium such as a magnetic disk of a hard disk drive. Typically, the input signal is produced through a head of the hard disk drive. The input signal is sampled by ADC 302 to produce a sampled input signal, and the sampled input signal is then shaped by equalizer 304 to produce a signal ck.
BMC 306 calculates branch metrics for the signal ck by applying corresponding estimated phase error values to each branch of a Viterbi trellis or other similar data structure. An example of a branch metric that could be used by BMC 306 is a Euclidean distance. An example of a Euclidean distance is provided by the following equation (4):
λk=(yk−ck−εk{circumflex over (Δ)}k)2. (4)
In equation (4), {circumflex over (Δ)}k is an estimated phase error value obtained using equation (2) or (3). By using estimated phase error value {circumflex over (Δ)}k to obtain λk, the reliability of a Viterbi decoding operation using λk for a branch metric tends to increase relative to Viterbi decoding operations that do not incorporate estimated phase error {circumflex over (Δ)}k into the branch metric computation.
In
The term yk(j) represents an ideal channel output at time “k” to state “j” in
The term εk(i,j) represents the output of the derivative channel at time “k” relative to a branch from “i” to “j” in
The term {tilde over (Δ)}k(i,j) represents an estimated phase at time “k” at branch from “i” to “j” in
To compute the branch metric λk for a branch of a Viterbi trellis, equation (4) can be expressed as λk(i, j)=(yk(j)−ck(j)−εk(i, j){circumflex over (Δ)}k)2 .
ACS & PM 308 calculates estimated phase error values {circumflex over (Δ)}k from the output of BMC 306. ACS & PM 308 also determines survival paths in a Viterbi decoding operation. Once a survival path is determined, a corresponding estimated previous phase error is provided to phase estimator 310 based on the survival path. Phase estimator 310 typically calculates new estimated phase error values using corresponding previous estimated phase error values according to equation (2) or (3).
ACS & PM 308 includes phase path memory 308c for storing all of the estimated phase error values {circumflex over (Δ)}k used in the Viterbi decoding operation. ACS & PM 308 stores estimated phase error values {circumflex over (Δ)}k in phase path memory 308c and outputs only an optimum estimated phase error corresponding to a survival path to loop filter 312.
The operation of ACS & PM 308 is described in further detail below.
Phase estimator 310 calculates yk(i), εk(i,j) and {tilde over (Δ)}k(i, j) based on the Viterbi trellis illustrated in
The Viterbi trellis of
The terms yk(i), εk(i,j), and {tilde over (Δ)}k(i, j) are functions of “i” and “j” and they correspond to branches of the Viterbi trellis. The term yk(i) can be computed by the following equation (5):
The term εk(i,j) can be computed by the following equation (6):
{tilde over (Δ)}k(i, j)={circumflex over (Δ)}k−1(i)+γ[ek(i)εk(i, j)−ek−M(i)εk−M(i, j)] (7)
{tilde over (Δ)}k(i, j)=μ{circumflex over (Δ)}k−1(i)+γek(i)εk(i, j). (8)
e
k(i, j)=ck−yk(i). (9)
BMC 306 calculates λk(i,j) using yk(i), εk(i,j), and {tilde over (Δ)}66k(i, j), which are output by phase estimator 310, based on an equation (10) below and the Viterbi trellis shown in
BMC 306 then sends λk(i,j) to ACS&PM 308 with {tilde over (Δ)}k(i, j). Like equations (7) through (9), the branch metric λk(i,j) is a function of ‘i’ and ‘j’ and is calculated for every branch of the Viterbi trellis. Branch metric λk(i,j) can be computed by the following equation (10):
λk(i, j)=[ck−yk(i)−εk(i, j){tilde over (Δ)}k(i, j)]2 (10)
ACS 308a calculates âk(j), {circumflex over (Δ)}k(j), ĵk using λk(i,j) and {tilde over (Δ)}k(i, j), which are output by BMC 306, and sends âk(j) and ĵk to data path memory 308b, and sends {circumflex over (Δ)}k(j) and ĵk to phase path memory 308c. Here, both of âk(j) and {circumflex over (Δ)}k(j) are functions of ‘j’ and have a plurality of values which are calculated for every state of the Viterbi trellis. The terms âk(j), {circumflex over (Δ)}k(j), ĵk are computed using the following equations (11) through (15):
î
k(j)=arg mini[smk−1(i)+λk(i j)] (11)
sm
k(j)=smk−1(îk(j))+λk(îk(j),j) (12)
â
k(j)=ãk(j) (13)
{circumflex over (Δ)}k(j)={tilde over (Δ)}k(îk(j),j) (14)
ĵ
k=arg minjsmk(j) (15)
Data path memory 308b updates path memory values âk−x−1(j) with length L for data estimation by âk(j), {circumflex over (Δ)}k(j), ĵk, which are sent from ACS 308a, based on equations (16) and (17) below and the Viterbi trellis shown in
In the meantime, phase path memory 308c updates path memory values {circumflex over (Δ)}k−x−1(j) with length P for phase estimation by âk(j), {circumflex over (Δ)}k(j), ĵk, which are sent from the ACS 308a, based on equations (18) and (19) and the Viterbi trellis shown in
Here, ‘L’ and ‘P’ are optimized for data estimation and phase estimation, respectively.
â
k−x−1(j)=âk−x(îk(j)), ∀×∈{0,1, . . . , L−1} (16)
â
k
=â
k−L+1(ĵk) (17)
{circumflex over (Δ)}k−x−1(j)={circumflex over (Δ)}k−x(îk(j)), ∀×∈{0,1, . . . , P−1} (18)
{circumflex over (Δ)}k={circumflex over (Δ)}k−P+1(ĵk) (19)
Further, ACS&PM 308 delays {circumflex over (Δ)}k(j), which was an input to phase memory 308c at the previous cycle, by a cycle, and sends delayed {circumflex over (Δ)}k(j) to phase estimator 310 as {circumflex over (Δ)}k−1(j). Here, {circumflex over (Δ)}k−1(j) is a function of ‘j’ and is not a single value but a plurality of values which are calculated for every state of the Viterbi trellis.
Equations (2) and (14), which both compute estimated phase error, are similar in that they both have a recursive structure. Further, since the phase estimation is performed in similar manner for the data estimation, a plurality of smk(j) and {tilde over (Δ)}k(i, j) are calculated based on the Viterbi trellis shown in
Data path memory 308b, shown in
In the mean time, phase path memory 308c, shown in
An optimum value {circumflex over (Δ)}k={circumflex over (Δ)}k−P+1(phase_spk) among {circumflex over (Δ)}k−P+1(j), which are shown as dashed line boxes in the right side of
In selected embodiments of the invention, equations with a recursive structure are used to calculate phase error {circumflex over (Δ)}k, similar to path metric calculation equations of a Viterbi decoder. Accordingly, a phase error {circumflex over (Δ)}k can be calculated in a manner similar to conventional path metric calculations.
Finally, determination of one phase error {circumflex over (Δ)}k is also performed using the path memory in a similar manner to data detection performed by a Viterbi decoder.
Channel characteristic fk is typically determined in accordance with a system, and derivative channel characteristic gk is obtained by differentiating channel characteristic fk . Accordingly, where channel characteristic fk is known, derivative channel characteristic gk can be readily obtained.
Generally, where impulse response fk is differentiated, a characteristic value to express the impulse response increases. For instance, in one example, the length of a channel in a hard disk drive is 4, but the length of a channel obtained through differentiation of the length 4 channel is 6. The number of states in a Viterbi decoder is determined by the length of a channel, and the number of states for a channel whose length is 4 is 24=16, and the number of states for a derivative channel whose length is 6 is 26=64. Where the number of states is determined on the basis of a derivative channel whose length is longer, the states of channels whose length is shorter is all considered naturally.
However, in other cases, such as where the number of states is determined on the basis of a channel whose length is shorter, all the states of derivative channels whose length is longer cannot be considered.
Accordingly, the number of states considered for Viterbi decoding should be determined on the basis of a channel whose impulse response length is longer among the channels or derivative channels. Thus, all possible cases can be considered.
Phase estimator 310 calculates a phase estimate value by referring to a data estimate value of ACS & PM 308, and provides the phase estimate value to BMC 306.
Here, the final phase estimate value and the data estimate value are determined by a survival path value determined based on the branch metric value calculated in BMC 306 and a previously calculated state metric value. By doing so, estimation reliability is enhanced.
Meanwhile, the final phase estimate value of ACS & PM 308 is provided to loop filter 312.
Loop filter 112 generates a control signal corresponding to the phase estimate value provided by the ACS & PM 308. The control signal is converted into an analog control signal by DAC 314 and the analog control signal changes the oscillation frequency of VCO 316.
Since ADC 302 performs a sampling operation in synchronization with the clock signal generated in VCO 316, timing errors can be compensated by controlling the oscillation frequency of VCO 316.
Where a phase error is determined, the apparatus of
Also, even in phase estimation, the apparatus of
In both
Referring to
By using apparatuses such as those described in relation to
The foregoing preferred embodiments are teaching examples. Those of ordinary skill in the art will understand that various changes in form and details may be made to the exemplary embodiments without departing from the scope of the present invention as defined by the following claims.