Method and apparatus for data frame synchronization of 5G base station

Abstract

The method of synchronizing data frames between 5G baseband processing stations by a global position system (GPS)-integrated local oscillator block control, including the following steps: step 1: synchronize the baseband processor's local oscillator block with the GPS's 1 pps (pulse per second) pulse and generate a 10 ms (millisecond) pulse from the local oscillator; step 2: use the 10 ms synchronous pulse sync monitor block to get the sync offset between this pulse and the GPS 1 pps pulse; step 3: use the control algorithm to reconfigure the local oscillator so that the 10 ms synchronous pulse can follow the 1 pps GPS pulse.

Description

FIELD OF THE DISCLOSURE

The present disclosure relates to systems and methods for data frame synchronization between 5G base stations. Particularly, the mentioned method is to synchronize uplink and downlink slots for base stations in order to eliminate interference.

DESCRIPTION OF THE RELATED ART

In 5G mobile network, Time Division Duplex (TDD) technique is used to improve flexibility and spectral efficiency. TDD refers to duplex communication links where uplink is separated from downlink by the allocation of different time slots in the same frequency band.

However, the advantages of time division duplex are counter-balanced by the precise timing and synchronization required to prevent intra-cell or inter-cell interference. More specifically, when two baseband processing stations use adjacent channels, transmission of the uplink at the edge of one channel may interfere with the transmission of the downlink at the edge of another channel if these two transmissions occur at the same time. The interference phenomenon will reduce the quality of 5G baseband processing stations by distorting the transmission signal. The solution to this challenge is to synchronize the data frame between 5G baseband processing stations, in other words to ensure that the TDD time slot between baseband processing stations is always the same for transmission of the uplink occurs only at one time and transmission of downlink occurs only at another time.

Currently, no method has been proposed and implemented to solve the above problem.

SUMMARY OF THE DISCLOSURE

In this disclosure, 5G baseband processing stations use pulses with a period of 10 ms to determine the data frame times of the uplink and downlink. Thus, the purpose of the present disclosure is to ensure the phase and frequency synchronization of the 10 ms pulses of 5G baseband processing stations at all times, according to which the local oscillator block control method uses GPS (Global Positioning System) is applied. When applying this method, 5G baseband processing stations will have synchronized data frames, thereby solving the problem of interference between transmission of the uplink and downlink, helping to improve the quality of the 5G transceiver system.

To achieve the above purpose, the method is to control the local oscillator block using GPS, including the following steps:

Step 1: Synchronize the baseband processor's local oscillator block with the GPS's 1 pps pulse and generate 10 ms pulse from the local oscillator.

Step 2: Use the 10 ms synchronous pulse sync monitor block to get the sync offset between this pulse and the GPS 1 pps pulse.

Step 3: Use the control algorithm to reconfigure the local oscillator so that the 10 ms synchronous pulse can follow the 1 pps GPS pulse.

With this method, the 10 ms synchronization pulses of the baseband processing stations will be generated and synchronized with the 1 pps pulses—the pulses have been synchronized with the GPS's 1 pps pulses. From there all 10 ms synchronization pulses on baseband processing stations will be synchronized with each other.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates the functional blocks of the 5G baseband processing station in the method of controlling the local oscillator block using GPS.

FIG. 2 illustrates the 10 ms pulse synchronization process on 5G baseband processing stations.

FIG. 3 illustrates the FPGA coordination system, software and hardware applied to the data transmission circuit block (Transfer Card) in the 5 G baseband processing station system.

FIG. 4 illustrates the evaluation of synchronization capabilities based on a data transmission circuit placed in a laboratory environment.

FIG. 5 illustrates the evaluation of synchronization capability based on a data transmission circuit placed in an environment of rapidly changing fan speed.

FIG. 6 illustrates the evaluation of synchronization capability based on a data transmission circuit placed in an environment of rapidly changing fan speed.

FIG. 7 illustrates the evaluation of the synchronization ability of two 10 ms pulses on two data transmission circuits on an oscilloscope.

DETAIL DESCRIPTION

To solve the problem of 10 ms pulse synchronization on 5G baseband processing stations, the present disclosure uses GPS technology. GPS technology provides 1 pps pulse as a reference signal to the local oscillator block in baseband processing stations for synchronization. In which, 1 pps (one pulse per second) is a signal pulse with a width of less than one second and rising with a period of one second. The local oscillator block in 5G baseband processing stations is the chip that generates and provides oscillator pulses to other components in the station. Local oscillator blocks are usually provided with a standard reference pulse so that the local oscillator pulse can be generated stably and accurately. Thus, the 1 pps GPS pulse will be provided as a reference pulse for the local oscillator blocks so that the local oscillator frequencies are synchronized with each other. The rising edge of the 1 pps pulse from the GPS block will be used by a 10 ms counter to start generating the 10 ms pulse. The 10 ms counter relies on the frequency of the baseband processor's local oscillator to generate the next 10 ms pulses. Theoretically, since the station's 10 ms pulse is generated from the local oscillator block which is already synchronized with the GPS's 1 pps pulse, the 10 ms pulses of the stations should be synchronized with each other. However, the local oscillator frequency of the baseband processing stations providing the 10 ms pulse generator block may be biased (due to reasons such as ambient temperature, . . . ) leading to a situation where the 10 ms pulse timing error for GPS 1 pps pulse is accumulated, 10 ms pulses at stations will be out of phase when running for a long time. Therefore, in addition to using the GPS pulse 1 pps to initiate a 10 ms pulse at the stations, the present disclosure uses an oscillator controller to control the frequency of the local oscillator so that the 10 ms pulse at the stations is frequency synchronous with one another.

Thus, the data frame synchronization method in the 5G base processing station using the GPS-based local oscillator block control method has the blocks and tuples shown in FIG. 1, including:

• • Block GPS antenna: get GPS signal from GPS satellite.
  • GPS block: receive GPS signal from GPS antenna and provide 1 pps pulse to the station's local oscillator block.
  • Local oscillator: uses 1 pps pulse from GPS block as reference pulse to generate local oscillator pulse, local oscillator pulse is supplied to 10 ms counter. In addition, the local oscillator must be configurable, which means that it can be operated (by parameter configuration) to adjust the local oscillator frequency.

10 ms counter: this receives local oscillator pulses from the local oscillator to generate a 10 ms pulse.

10 ms synchronous pulse monitor: monitors the 10 ms synchronous pulse from the 10 ms counter and calculates the error between 100 of 10 ms pulses and 1 pps pulses, providing this error to the local oscillator.

• • Local oscillator controller: use the error provided from the 10 ms synchronous pulse monitor to calculate configuration parameters, these configuration parameters will be used to adjust the local oscillator.
  • TDD data frame block: This block uses 10 ms synchronous pulse to perform transmission of uplink and downlink.

The 10 ms pulse synchronization process on the stations is shown in FIG. 2, the steps are as follows:

Step 1: Synchronize the baseband processor's local oscillator block with the GPS's 1 pps pulse and generate a 10 ms pulse from the local oscillator.

The objective of this step is to use the 1 pps GPS pulses as the reference input for the local oscillator block. Based on the 1 pps GPS reference pulses, the local oscillator will generate local oscillator pulses to provide other components of the GPS station, including a 10 ms counter block to generate a 10 ms pulse. After the 10 ms counter is given frequency, the counter starts to pulse from the GPS 1 pps pulse rising edge. At the rising edge of the 1 pps pulse, the counter starts counting from one and counting according to the frequency of the local oscillator. The 10 ms counter generates the next pulses from the local oscillator. Suppose with a local oscillator with frequency x Hz, where X is the local oscillator's frequency, when the counter reaches the value x/100 (due to 10 ms= 1/100 s), generate a 10 ms pulse and reset the count value to one. Thus, after step 1, a 10 ms pulse was generated based on the local oscillator block of the baseband processing station.

Step 2: use the 10 ms synchronous pulse sync monitor block to get the sync offset between this pulse and the GPS 1 pps pulse; The input to this step is the 10 ms counter variable value and the GPS 1 pps pulse generated from step 1. At this step, the GPS 1 pps pulse rising edge triggers the monitor to calculate the error of the 10 ms pulse. The error is calculated as the difference between the desired value of x/100 and the counter value at the time of the 1 pps pulse rising edge. This error value is the cumulative deviation of 100 of 10 ms pulses compared to 1 second of 1 pps GPS pulses, which is also the output value of step 2. The error value will be put into a memory area for use as input for step 3.

Step 3: Use the control algorithm to reconfigure the local oscillator so that the 10 ms synchronous pulse can follow the 1 pps GPS pulse.

The input of this step is the error value calculated in step 2. At this step, each time the error value is calculated and put into the memory area, the local oscillator controller relies on this error to adjust frequency of the local oscillator pulses such that the error values of the subsequent times converge to 0. To achieve this, the local oscillator controller will apply some control algorithm (for example, the control algorithm), on-off control or PID proportional integral control algorithm) to calculate and adjust the local oscillator frequency, finally, the 10 ms pulse was synchronized with the GPS 1 pps pulse. After adjusting the local oscillator frequency, the oscillator continues to wait for the next error value.

The method of synchronizing data frames between 5G baseband processing stations by GPS-integrated local oscillator block control with the mentioned components is implemented into an apparatus, which is called Transfer Card. This apparatus is a combination of FPGA (Field-programmable gate array) programmable logic circuit, software and hardware and is described as FIG. 3. Specifically as follows:

• • Hardware includes:
    • GPS antenna, GPS module has the ability to synchronize with GPS system and generate 1 pps pulses.
    • The local oscillator LMK05028 with DCO (Digitally Controlled Oscillator) feature allows the output frequency to be adjusted as desired.
  • FPGAs include:
    • 10 ms counter using FPGA. The local oscillator LMK05028 provides 245.76 MHz frequency with 10 ms counter. The counter will generate 2457600 pulses every 10 ms.
    • The 10 ms synchronous clock monitor is an FPGA comparator, the calculated value is stored in the FIFO (FPGA's first-in-first-out memory).
  • The software performs the DCO configuration parameter calculation function to control the LMK05028 based on the PID algorithm, running on the ARM processor core.

The control object of the PID algorithm is the parameter G to configure the DCO for the LMK05028 oscillator, with the control equation: G=KP*e+KI*Σe+KD*Δe.

In which:

e: is the error read out from the FIFO calculated and pushed in by the 10 ms synchronous clock monitor.

Σe: is the accumulated error in the past of the current e and e.

Δe: is the error between the current e and the previous e a point in time.

Choosing a suitable set of parameters KP, KI, KD will help the 10 ms pulse synchronize with the GPS 1 pps pulse faster and more stable.

The system using the previous data frame synchronously will be measured and tested in two ways as follows:

• • The first evaluation: evaluates the synchronization ability based on a data transmission circuit, including the instantaneous difference between 10 ms and 1 pps pulses. This deviation represents the synchronization of the 10 ms pulse to the 1 pps GPS pulse.
  • The second evaluation method: evaluate the synchronization ability of two 10 ms pulses on two data transmission circuits. The difference between these two pulses will be measured directly on the oscilloscope.

The first way to evaluate: evaluate the synchronization capability based on a data transmission circuit.

For the evaluation system placed in a laboratory environment, the system ran for 13 hours continuously, 4096 valuable samples were collected every 10 s. The graph illustrating the phase difference compensation control response of up to nine pulses when the system is stable, corresponding to 36 ns, is shown in FIG. 4.

For the evaluation system placed in an environment of rapidly changing fan speed, the system ran for 19 hours continuously, 7139 value samples were collected every 10 s. The graph illustrating the phase difference compensation control response up to twenty pulses when the system is stable, corresponding to 80 ns, is shown in FIG. 5.

For the evaluation system placed in an environment of slow change of cooling fan speed, the system ran for 5 hours continuously, 1742 value samples were collected every 10 s. The graph illustrating the phase difference compensation control response of up to eight pulses when the system is stable, corresponding to 32 ns, is shown in FIG. 6.

The second evaluation method: evaluate the synchronization ability of two 10 ms pulses on two data transmission circuits.

The system of two data transmission circuits is set up running 10 ms pulse synchronization algorithm, the 10 ms and 1 Hz signals of each data transmission circuit are connected to the measuring heads of the oscilloscope. FIG. 7 illustrates the measurement results on an oscilloscope for 6 hours. The pair of pulses [1] and [3] corresponds to a pair of 1 pps and 10 ms pulses on the first data transmission circuit. The pair of pulses [2] and [4] corresponds to a pair of 1 pps and 10 ms pulses on the second data transmission circuit.

The results show:

• • Each data transmission circuit has good tracking of GPS 1 pps respectively on each data transmission circuit with phase difference not exceeding 80 ns.
  • The algorithm ensures that the system runs for a long time and the system remains stable.

The method of local oscillator block control using GPS synchronized data frames in 5G baseband processing stations is provided, thereby solving the problem of interference between the transmission of the uplink and the downlink of the algorithm. time division duplex multiplexing, which improves the quality of the 5G transceiver system. In addition, the 5G baseband processing station system using this method has achieved good synchronization results and ensures long-term stability.

While preferred embodiments of the present invention have been shown and described, it will be apparent to those skilled in the art that many changes and modifications may be made without departing from the invention in its broader aspects. The appended claims are therefore intended to cover all such changes and modifications as fall within the true spirit and scope of the invention.

Claims

1. A data frame synchronization method in a 5G baseband processing station, using a global position system (GPS)-integrated local oscillator block controller, the method comprising the steps of: receiving a GPS signal via a block of GPS antenna from a GPS satellite;receiving the GPS signal, in a GPS block, from the GPS antenna and provide a 1 pps (pulse per second) pulse from a station's local oscillator block;using the 1 pps pulse from the GPS block as reference pulse, generate a local oscillator pulse,wherein the local oscillator pulse is supplied to a 10 ms (millisecond) counter;wherein the local oscillator is configurable, whereby it can be operated by a parameter configuration to adjust a local oscillator frequency;receiving, using a 10 ms counter, the local oscillator pulses from the local oscillator to generate 10 ms pulses;monitoring, using a 10 ms synchronous plus counter, a 10 ms synchronous pulse from the 10 ms counter to calculate an error between 100 of the 10 ms pulses and 1 pps pulses, to provide the error to the local oscillator;calculating, by a local oscillator controller, configuration parameters using the error provided from the 10 ms synchronous pulse monitor, wherein the configuration parameters are used to adjust the local oscillator block;carry out transmission of uplink and downlink, using a TDD data frame block; wherein the block uses 10 ms synchronous pulse;wherein the above steps are performed in the blocks above as follows:Step 1: synchronize the baseband processor's local oscillator block with the GPS's 1 pps pulse and generate a 10 ms pulse from the local oscillator;using the GPS 1 pps pulse as the reference input for the local oscillator block; based on the 1 pps GPS reference pulse, the local oscillator block generates an local oscillator pulse to provide other components of the 5G baseband processing station, including the 10 ms counter to generate the 10 ms pulse; after the 10 ms counter is given frequency, the counter starts to pulse from the GPS 1 pps pulse rising edge; at the rising edge of the 1 pps pulse, the counter starts counting from one and counting according to the frequency of the local oscillator; the 10 ms counter generates the next pulses from the local oscillator; when the counter reaches the value (local oscillator frequency)/100 (due to 10 ms= 1/100 s), generate a 10 ms pulse and reset the count value to one; so, after step 1, a 10 ms pulse was generated based on the local oscillator block of the baseband processing station;Step 2: use the 10 ms synchronous pulse sync monitor block to get the synchronous offset between this pulse and the GPS 1 pps pulse;Input of this step is the counter variable value of 10 ms counter and 1 pps GPS pulse generated from step 1; at this step, the GPS pulse 1 pps rising edge triggers the monitor to calculate the error of the 10 ms pulse; the error is calculated as the difference between the desired value of (local oscillator frequency)/100 and the counter value at the time of the 1 pps pulse rising edge; this error value is the cumulative deviation of 100 of 10 ms pulses compared to 1 second of 1 pps GPS pulses, which is also the output value of step 2; the error value will be put into a memory to be used as input for step 3;Step 3: use a control algorithm to reconfigure the local oscillator so that the 10 ms synchronous pulse can follow the 1 pps GPS pulse;The input to this step is the error value calculated in step 2; At this step, each time the error value is calculated and entered into the memory, the local oscillator controller relies on this error to adjust the frequency of the local oscillator pulse so that the error values of the successive times according to convergence to 0; To achieve this, the local oscillator will apply the control algorithm (which may be chosen from an on-off control algorithm or a PID proportional integral control algorithm) to calculate and adjust the frequency of the local oscillator, finally, the 10 ms pulse was synchronized to the GPS's 1 pps pulse; After adjusting the local oscillator frequency, the oscillator continues to wait for the next error value.