This application is based on and claims priority under 35 U.S.C. 119 to Korean Patent Application No. 10-2021-0158854, filed on Nov. 17, 2021, in the Korean Intellectual Property Office, the disclosure of which is herein incorporated by reference in its entirety.
The present disclosure relates to a method and apparatus for detecting distributed denial-of-service (DDoS) attack and, more particularly, to a method and apparatus for detecting unknown DDoS attack patterns provided in similar forms on the Internet network, and controlling packet transmission or reception.
A DDoS attack that a hacker uses on an Internet network may include various types of attacks including the massive amount of traffic, an amplification attack that disrupts a service, and the like. According to a conventional packet control scheme for a DDoS attack, a pattern is verified via sequential comparison in stages and thus, the conventional method may show inflexible performance in network equipment that is required to quickly process the massive amount of traffic.
For example, a conventional sequential verification method with respect to a DDoS attack packet may detect an attack by performing sequential comparison between a received packet and N prepared patterns in stages. According to the method, if the received packet includes patterns up to an N-1th pattern and excludes an Nth pattern, this is not regarded as an attack packet, and thus, a large amount of search resources for detecting an attack may be wasted. Therefore, the method may be used for a packet in which similar patterns are repetitive but not continuous, but efficiency and quickness of attack detection with respect to a large amount of packets may deteriorate.
In addition, for example, a conventional regular expression verification method with respect to a DDoS attack packet may be a method of processing a received packet using a regular expression in order to inspect a complex pattern at once. This method expresses a complex pattern using a regular expression, and repeatedly inspect whether patterns included in the regular expression are included in the received packet and thus, a system load is high. In addition, in the case of detection of a header or the like, if a regular expression includes repetitive inspection with respect to a small packet, the number of operations associated with repetitive operation increases and a system load increases, which is a drawback. In addition, when the complexity of the regular expression increases, the amount of time spent in analyzing the packet increases, which is a drawback.
The present disclosure has been made in order to solve the above-mentioned problems in the prior art, and an aspect of the present disclosure is to provide a DDoS attack detection method and apparatus which are to efficiently and effectively defend against a DDoS attack having a complex pattern, and which determine whether a feature pattern is included in a received packet, given that a received packet has an identical or similar feature pattern at a predetermined index (location) in many cases, so as to detect unknown DDoS attack patterns in similar forms and to control packet transmission or reception.
In accordance with an aspect of the present disclosure, there is provided a DDoS attack detection method by a DDoS attack detection apparatus, the method including an operation of storing a predetermined pattern and a predetermined mask associated with each block of an object for which detection is to be performed, and producing an offset bitmask and a matching mode that correspond to the mask for each block; and an operation of determining whether the pattern matches each sequential block associated with a received packet, wherein the operation of determining whether the pattern and the block match may include an operation of determining whether a result of comparison between the block of the received packet and the pattern is identical to the offset bitmask in a byte matching mode among matching modes; and an operation of determining whether a result of comparison between the pattern and a result of an operation performed on the mask and block of the received packet is identical to the offset bitmask in a bit matching mode among the matching modes.
The size of the block may be dynamically determined for each block of the received packet.
The byte matching mode or the bit matching mode may be dynamically determined for each block of the received packet.
The operation of producing may include an operation of producing the offset bitmask by using a value of 0 when a byte value of the mask is a hexadecimal number of 00, and using a value compressed into 1 for other byte values.
The operation of producing may include an operation of determining the byte matching mode as the matching mode if all byte values of the mask correspond to a hexadecimal number of 00 or FF, and an operation of determining the bit matching mode as the matching mode for other cases.
In the bit matching mode, it is preferable that the operation performed on the mask and the block is a vector AND operation between byte values.
In the byte matching mode and the bit matching mode, the result of comparison with the pattern may be a comparison result (vector CMP result) association with whether byte values of the pattern match.
In the operation of determining whether the pattern and the block match, the byte matching mode or the bit matching mode may be performed on each sequential block of the received packet according to the matching mode at each of indices corresponding to an index length of the offset bitmask, and it is determined that an attack pattern is detected if the pattern and the block of the received packet match at all indices corresponding to the index length.
In accordance with an aspect of the present disclosure, there is provided a DDoS attack detection apparatus on a network, the apparatus including a policy managing unit configured to store a predetermined pattern and a predetermined mask associated with each block of an object for which detection is to be performed, and to produce an offset bitmask and a matching mode that correspond to the mask associated with each block; and a packet processing unit configured to determine whether the pattern and each sequential block of a received packet match, and according to the matching mode, to perform a byte matching mode for determining whether a result of comparison between the block of the received packet and the pattern is identical to the offset bitmask, and to perform a bit matching mode for determining whether a result of comparison between the pattern and a result of an operation performed on the mask and the block of the received packet is identical to the offset bitmask.
According to a DDoS attack detection method and apparatus according to the present disclosure, a DDoS attack having an unknown complex pattern in a similar form may be efficiently and effectively detected and prevented by determining whether a received packet has a feature pattern at a predetermined index (location), and thus, it is guaranteed that packet transmission or reception may smoothly flow in a system such as a server or the like on the Internet network. That is, when traffic is provided, most various DDoS traffic on a general-purpose network where network traffic may rapidly increase may have a feature pattern in which the value of a predetermined index (location) is repeated similarly as shown in
In addition, according to a DDoS attack control detection method and apparatus according to the present disclosure, repetitive short packet communication on network communication may be controlled (repetitive inspection on a small packet in the case of detection of a header or the like), and even when a complex pattern is included in data having a high payload, a feature pattern may be detected in high speed and a DDoS attack may be efficiently and effectively prevented.
In addition, according to a DDoS attack control detection method and apparatus according to the present disclosure, the number of digits of an offset bitmask applied to detection of a feature pattern may be optimized by increasing/decreasing the number of digits depending on a computing environment, and thus, upward/downward compatibility may be flexibly managed. By applying a dynamic function, as opposed to a static function, to the detection of a feature pattern, an unknown urgent situation can be promptly handled without affecting system availability.
The above and other aspects, features, and advantages of the present disclosure will be more apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:
Hereinafter, the present disclosure will be described in detail with reference to attached drawings. In this instance, like reference numerals may refer to like elements illustrated in the accompanying drawings. In addition, detailed descriptions related to a well-known function or configuration will be omitted herein. The disclosure provided below will mainly describe the part needed to understand operations according to various embodiments, and descriptions of elements which make the subject matter of the descriptions unclear will omitted. In addition, some elements of the drawings may be omitted, or may be illustrated exaggeratingly or roughly. The size of each element does not reflect the actual size of the element, and thus, the disclosure is not limited to the relative sizes of elements or spacing therebetween illustrated in the drawings.
When detailed descriptions related to a well-known related function are determined to make the subject matter of the present disclosure ambiguous, the detailed descriptions thereof will be omitted herein. The terms to be described below are terms defined in consideration of functions in the present disclosure, and may be changed by a user, intention of an operator, custom, or the like. Therefore, the definitions of the terms should be made based on the contents throughout the specification. The terms used in the detailed description is for the purpose of describing embodiments of the present disclosure only and is not intended to be restrictive. The singular forms are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be understood that the terms “comprises”, or “includes”, when used in this description, specify the presence of stated features, numbers, steps, operations, elements, and/or part or a combination thereof, but do not preclude the presence or possibility of one or more other features, numbers, steps, operations, elements, and/or part or combination thereof.
It will be further understood that although the terms first, second, or the like, may be used herein to describe various elements, these elements should not be limited by these terms, and these terms are only used to distinguish one element from another element.
Referring to
Referring to
The above-described elements of the DDoS attack control apparatus 100 according to an embodiment of the present disclosure that may be contained in a server in a network such as the Internet or the like may be embodied as hardware such as a semiconductor processor, software such as application programs, or a combination thereof.
The pattern and mask storage 111 of the policy managing unit 110 may store policy information associated with a DDoS attack, such as a predetermined pattern and a predetermined mask (refer to
The offset bitmask producing unit 112 of the policy managing unit 110 may produce an offset bitmask (refer to
Referring to
The offset bitmask producing unit 112 may produce an offset bitmask corresponding to the mask for each block of a received packet. For example, in the example of
The matching mode producing unit 113 may produce a matching mode corresponding to the mask for each block of a received packet. For example, as illustrated in
Here, the byte matching mode or the bit matching mode may be dynamically determined for each block in the flow of a received packet. That is, the byte matching mode or the bit matching mode may not be uniformly determined for each block 1, 2, 3, ..., and the like, and the bite matching mode and the bit matching mode may be may be alternately, periodically, or irregularly combined and applied.
In order to detect a DDoS attack of a packet received on a network such as the Internet or the like, and to control the transmission or reception of the packet, the filtering unit 121 of the packet processor 120 may filter a size and a flow of a received packet for which detection is to be performed.
Referring to
Referring to
That is, according to a matching mode set in the matching mode producing unit 113, in the byte matching mode, the matching determining unit 123 may determine (e.g., using an AND operation) whether a result of comparison between the block of the received packet and the pattern (e.g., using a Vector CMP operation) matches an offset bitmask from the offset bitmask producing unit 112. According to a matching mode set in the matching mode producing unit 113, in the bit matching mode, the matching determining unit 123 may determine (e.g., using an AND operation) whether a result of comparison (e.g., using a Vector CMP operation) between the pattern and a result of an operation (e.g., using a Vector AND operation) performed on the mask of the pattern and mask storage unit 111 and the block of the received packet matches the offset bitmask.
As illustrated in the example of
In addition, as illustrated in the example of
Hereinafter, a DDoS attack detection method by the DDoS attack detection apparatus 100 of the present disclosure will be described with reference to the flowchart of
Referring to
Subsequently, the matching determining unit 123 may identify a policy setting of the policy managing unit 110, and may apply a setting of a packet, for which detection is to be performed, of the filtering unit 121 and a verification start point setting of the layer setting unit 122 in operation S110, and may determine whether each sequential block (e.g., 16 bytes) of the corresponding received packet for which detection is to be performed matches the pattern in the pattern and mask storage 111 in operations S111 to S280. If the policy of the policy managing unit 110 is not present, the matching determining unit 123 may determine that pattern matching fails and may terminate the process in operation S280.
If the policy of the policy managing unit 110 is present, the matching determining unit 123 may verify whether the pattern is matched via a loop processing repeated as long as the index length of an offset bitmask as described below, in operations S111 to S270.
If the matching determining unit 123 identifies that the offset bitmask is present in operation S111, the matching determining unit 123 may identify the index (≥1) of the corresponding offset bitmask in operation S210, may identify the value of the offset bitmask in operation S211, may identify a matching mode S220, may perform a byte matching mode or a bit matching mode with respect to each sequential block of the received packet at each index according to the matching mode in operation S230 or S240, may remove garbage values by performing an AND operation on the offset bitmask in operation S250, and may determine that an attack pattern is detected when a result of a Vector CMP operation is identical to the offset bitmask in operation S260 as illustrated in
Referring to
In the case of the spoofing attack described above, an attack that is difficult to block with a single pattern, and the like, there is a limit to defense against the DDoS. There are various defense methods, such as syn-cookie, syn-proxy, and the like, against a spoofing attack. However, although some spoofing attacks can be handled, there is a limit to defense, only using various detection/blocking methods such as regular expression and the like, against an attack which has a complex pattern and which is difficult to block using a single pattern.
According to the DDoS attack detection apparatus 100 according to the present disclosure, a DDoS attack of an attacker that has an unknown complex pattern in a similar form may be efficiently and effectively detected and prevented by determining whether a received packet has a feature pattern at a predetermined index (location) according to the above-described packet verification method, and it is guaranteed that packet transmission or reception may smoothly flow in a system such as a server or the like on an Internet network. That is, when traffic is provided, most various DDoS traffic on a general-purpose network where network traffic rapidly increases may have a feature pattern in which the value of a predetermined index (location) is repeated similarly as illustrated in
In addition, the DDoS attack control detection apparatus 100 according to an embodiment of the present disclosure may control repetitive short packet communication on network communication (may repeatedly inspect on a small packet in the case of detection of a header or the like), may detect a feature pattern in high speed even when a complex pattern is included in data having a high payload, and may efficiently and effectively defend against a DDoS attack. In addition, the DDoS attack control detection apparatus 100 according to an embodiment of the present disclosure may optimize the number of digits of an offset bitmask applied to detection of a feature pattern by increasing/decreasing the number of digits depending on a computing environment, and thus, may flexibly manage upward/downward compatibility. By applying a dynamic function, as opposed to a static function, to the detection of a feature pattern, an unknown urgent situation can be promptly handled without affecting system availability.
The DDoS attack detection apparatus 100 that processes a method of detecting a DDoS attack and controlling transmission or reception of a packet may include hardware, software, or a combination thereof. For example, the DDoS attack detection apparatus 100 of the present disclosure may be embodied in the form of a computing system 1000 of
The computing system 1000 may include at least one processor 1100 connected via a bus 1200, a memory 1300, a user interface input device 1400, a user interface output device 1500, a storage 1600, and a network interface 1700. The processor 1100 may be a semiconductor device that implements processing of instructions stored in a central processing unit (CPU), the memory 1300, and/or the storage 1600. The memory 1300 and the storage 1600 may include various types of volatile or nonvolatile storage media. For example, the memory 1300 may include a read only memory (ROM) 1310 and a random access memory (RAM) 1320.
In addition, the network interface 1700 may include a communication module such as a modem that supports wired Internet communication, wireless Internet communication, such as WiFi, WiBro, and the like, mobile communication such as WCDMA, LTE, and the like in a user equipment, such as a smartphone, a laptop PC, a desktop PC, and the like, or may include a communication module such as a modem that supports communication based on a short-range wireless communication scheme (e.g., Bluetooth, Zigbee, WiFi, and the like).
Therefore, the method and algorithm described in association with the embodiments disclosed in the present specification may be directly implemented by a hardware module, a software module, or a combination thereof which are executed by the processor 1100. The software module may reside in a computer or device-readable storing/recording medium (i.e., the memory 1300 and/or the storage 1600) such as a RAM memory, a flash memory, an ROM memory, an EPROM memory, an EEPROM memory, a register, a hard disk, a detachable disk, and a CD-ROM. An example of a storage medium may be coupled to the processor 1100, and the processor 1100 may read information (code) from the storage medium and may write information (code) in the storage medium. As another example, a storage medium may be embodied in the form of being integrated with the processor 1100. A processor and a storage medium may reside in an integrated circuit (ASIC). The ASIC may reside in a user equipment. As another method, a processor and a storage medium may reside in a user equipment as individual components.
Although the present disclosure have been shown and described based on predetermined items such as specific elements or the like and some embodiments and drawings, this is merely to help understanding but the present disclosure is not limited to the embodiments. Instead, it would be appreciated by those skilled in the art that various modifications and changes may be made to these embodiments without departing from the principles and spirit of the invention. Therefore, it should be understood that the idea of the present disclosure is not limited to the embodiments, and that all technical ideas that are equivalent to the scope of claims or that include equivalent modifications may fall within the scope of the example embodiments.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2021-0158854 | Nov 2021 | KR | national |