The present application is related to U.S. patent application Ser. No. 08/233,811, filed Apr. 26, 1994, entitled "Multiple Memory Bit/chip Failure Detection", and U.S. patent application Ser. No. 08/225,891, filed Apr. 11, 1994, filed, entitled "Control Store Built-In-Self-Test", and U.S. patent application Ser. No. 07/978,093, filed Nov. 17, 1992, entitled "Continuous Embedded Parity Checking for Error Detection in Memory Structures", and U.S. patent application Ser. No. 08/173,408, filed Dec. 23, 1993, entitled "Micro Engine Dialogue Interface", all assigned to the assignee of the present invention and all incorporated herein by reference.
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Entry |
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