Liu,S.-M.; Lo, R.; Chow, F.; “Loop Induction Variable Canoncalization in Parallelizing Compilers”; Proceedings of the 1996 Conference on Parallel Architectures and Compilation Techniques; pp. 228-237, Oct. 1996.* |
Davidson, J.; Jinturkar, S.; “Improving Instruction-Level Parallelism by Loop Unrolling and Dynamic Memory Disambiguation”; Proceedings of the 28th Annual International Symposium on Microarchitecture; pp. 125-132, Nov. 1995.* |
Maydan, D.; Hennessy, J.; Lam, M.; “Effectiveness of Data Dependence Analysis”; International Journal of Parallel Programming; vol. 23, No. 1, pp. 63-81, Feb. 1995.* |
Larus, J.; “Loop-Level Parallelism in Numeric and Symbolic Programs”; IEEE Transactions on Parallel and Distributed Systems; vol. 4, No. 7, pp. 812-826, Jul. 1993.* |
Aho, A.; Sethi, R.; Ullman, J.; “Compilers —Principles, Techniques and Tools”; Addison-Wesley Publishing Company; pp. 638-648,1986.* |
M. R. Haghighat, Symbolic Analysis for Parallelizing, Kluwer Academic Publishers (1995), Contents pp. vii-ix, List of Figures pp. xi-xiii, Chapter 4-Induction Variables pp. 35-56. |