Method and apparatus for generating non-binary balanced codes

Abstract

A decoder comprises a grouping module that groups an input signal into a plurality of blocks and a plurality of permutation symbols, wherein the plurality of blocks include N symbols and wherein each of said N symbols has one of q symbol values, where q and N are integers greater than two. A permutation module inverse permutes a first block of the plurality of blocks based on one of the plurality of permutation symbols and generates a decoded output signal based on the permutation.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The present disclosure will become more fully understood from the detailed description and the accompanying drawings, wherein:

FIG. 1A is a functional block diagram illustrating an exemplary encoder according to the principles of the present disclosure;

FIG. 1B is a flow chart illustrating steps performed by an exemplary encoder;

FIG. 2A is a functional block diagram illustrating an exemplary decoder according to the principles of the present disclosure;

FIG. 2B is a flow chart illustrating steps performed by an exemplary decoder;

FIG. 3 is a functional block diagram of a magnetic storage device that includes a read channel with an encoder and/or decoder of FIGS. 1A-2B;

FIG. 4 is a functional block diagram of a data storage device that includes an encoder and/or decoder of FIGS. 1A-2B;

FIG. 5A is a functional block diagram of a DVD drive;

FIG. 5B is a functional block diagram of a high definition television;

FIG. 5C is a functional block diagram of a vehicle control system;

FIG. 5D is a functional block diagram of a cellular phone;

FIG. 5E is a functional block diagram of a set top box; and

FIG. 5F is a functional block diagram of a mobile device.

Claims

1. A decoder comprising: a grouping module that groups an input signal into a plurality of blocks and a plurality of permutation symbols, wherein the plurality of blocks include N symbols and wherein each of said N symbols has one of q symbol values, where q and N are integers greater than two; anda permutation module that inverse permutes a first block of the plurality of blocks based on one of the plurality of permutation symbols and that generates a decoded output signal based on the permutation.

2. The decoder of claim 1 wherein the first block is arranged adjacent to the permutation symbol.

3. The decoder of claim 1 wherein the permutation symbol is either added to or subtracted from each of the q symbol values of the N symbols of the first block.

4. The decoder of claim 1 wherein the permutation module subtracts a second symbol of the permutation symbol from the q symbol values of the N symbols of the first block and divides by the first symbol of the permutation symbol after subtracting.

5. A system comprising the decoder of claim 1 and further comprising a target device.

6. The system of claim 5 wherein the target device comprises a receiver.

7. The system of claim 5 wherein the target device comprises a memory device.

8. The system of claim 7 wherein the memory device comprises a non-volatile memory.

9. The system of claim 7 wherein the memory device comprises a hard disk drive.

10. A method of decoding comprising: grouping an input signal into a plurality of blocks and a plurality of permutation symbols, wherein the plurality of blocks include N symbols and wherein each of said N symbols has one of q symbol values, where q and N are integers greater than two; andinverse permuting a first block of the plurality of blocks based on one of the plurality of permutation symbols and that generates a decoded output signal based on the permutation.

11. The method of claim 10 further comprising arranging the first block adjacent to the permutation symbol.

12. The method of claim 10 further comprising adding or subtracting the permutation symbol from each of the q symbol values of the N symbols of the first block.

13. The method of claim 10 further comprising subtracting a second symbol of the permutation symbol from the q symbol values of the N symbols of the first block and divides by the first symbol of the permutation symbol after subtracting.

14. A decoder comprising: grouping means for grouping an input signal into a plurality of blocks and a plurality of permutation symbols, wherein the plurality of blocks include N symbols and wherein each of said N symbols has one of q symbol values, where q and N are integers greater than two; andinverse permutation means for permuting a first block of the plurality of blocks based on one of the plurality of permutation symbols and that generates a decoded output signal based on the permutation.

15. The decoder of claim 14 wherein the first block is arranged adjacent to the permutation symbol.

16. The decoder of claim 14 further comprising adding or subtracting means for adding or subtracting the permutation symbol from each of the q symbol values of the N symbols of the first block.

17. The decoder of claim 14 wherein the inverse permutation means subtracts a second symbol of the permutation symbol from the q symbol values of the N symbols of the first block and divides by the first symbol of the permutation symbol after subtracting.

18. A system comprising target means and the decoder of claim 14.

19. The system of claim 18 wherein the target means comprises a transmitting means.

20. The system of claim 18 wherein the target means comprises a means for storing.

21. The system of claim 20 wherein the means for storing comprises a non-volatile means for storing.

22. The system of claim 20 wherein the means for storing comprises a hard disk means for storing.

23. A method for decoding comprising: grouping an input signal into a plurality of blocks and a plurality of permutation symbols, wherein the plurality of blocks include N symbols and wherein each of said N symbols has one of q symbol values, where q and N are integers greater than two; andinverse permuting a first block of the plurality of blocks based on one of the plurality of permutation symbols and that generates a decoded output signal based on the permutation.

24. The method of claim 23 further comprising arranging the first block adjacent to the permutation symbol.

25. The method of claim 23 further comprising adding or subtracting the permutation symbol from each of the q symbol values of the N symbols of the first block.

26. The method of claim 23 further comprising subtracting a second symbol of the permutation symbol from the q symbol values of the N symbols of the first block and divides by the first symbol of the permutation symbol after subtracting.

27. A decoder comprising: grouping means for grouping an input signal into a plurality of blocks and a plurality of permutation symbols, wherein the plurality of blocks include N symbols and wherein each of said N symbols has one of q symbol values, where q and N are integers greater than two; andinverse permutation means for inverse permuting a first block of the plurality of blocks based on one of the plurality of permutation symbols and that generates a decoded output signal based on the permutation.

28. The decoder of claim 27 wherein the first block is arranged adjacent to the permutation symbol.

29. The decoder of claim 27 further comprising adding or subtracting means for adding or subtracting the permutation symbol from each of the q symbol values of the N symbols of the first block.

30. The decoder of claim 27 wherein the inverse permutation means subtracts a second symbol of the permutation symbol from the q symbol values of the N symbols of the first block and divides by the first symbol of the permutation symbol after subtracting.

31. A computer program stored for use by a processor for decoding comprising: grouping an input signal into a plurality of blocks and a plurality of permutation symbols, wherein the plurality of blocks include N symbols and wherein each of said N symbols has one of q symbol values, where q and N are integers greater than two; andinverse permuting a first block of the plurality of blocks based on one of the plurality of permutation symbols and that generates a decoded output signal based on the permutation.

32. The computer program of claim 31 further comprising arranging the first block adjacent to the permutation symbol.

33. The computer program of claim 31 further comprising adding or subtracting the permutation symbol from each of the q symbol values of the N symbols of the first block.

34. The computer program of claim 31 further comprising subtracting a second symbol of the permutation symbol from the q symbol values of the N symbols of the first block and divides by the first symbol of the permutation symbol after subtracting.