Claims
- 1. A system for providing a designing an integrated circuit, comprising:
a design utility, the design utility suitable for providing a user interface, control system and communication system that implements metamethodology EDA tools, wherein the EDA tools are configured to implement at least one function in a process for designing an integrated circuit (IC); at least one interrelated dynamic template, wherein each dynamic template implements at least two symbols displayable on a display device on the user computer, wherein the symbols correspond to EDA tools accessible by the design utility, the symbols arranged on the display for a user of the user computer to indicate the interrelationship of the EDA tools in the design process; and at least one static template, wherein each static template implements a structure of a design process indicated by the dynamic template.
- 2. The system as described in claim 1, wherein the interrelationship of the symbols of the dynamic template is at least one of a flow and procedure.
- 3. The system as described in claim 1, wherein at least one dynamic template includes at least one of a milestone and sign-off.
- 4. The system as described in claim 1, wherein the EDA tools include a wrapper, the wrapper suitable for indicating to the design utility at least one of entry of an EDA tool and exit of an EDA tool.
- 5. The system as described in claim 1, further comprising one or more primary user computer(s), zero or more secondary user computer(s), and zero or more server computer(s), wherein the computers are communicatively coupled over a network.
- 6. The system as described in claim 5, wherein dynamic load balancing is utilized to balance operation of the design utility by equalizing loads on computer resources within the system.
- 7. The system as described in claim 1, wherein status of the EDA tools is accessible by the design utility.
- 8. The system as described in claim 1, wherein a symbol enables access to the corresponding EDA tool.
- 9. The system as described in claim 1, wherein heuristic feedback is utilized so that utilization of the EDA tools is monitored and utilized to configure future interrelationships on dynamic templates, new requirements for tools and procedures, and algorithmic and implementation enhancements to exiting tools and procedures.
- 10. A system for designing an integrated circuit, comprising:
a first user computer communicatively coupled to a network, including
a first design navigator, the first design navigator suitable for providing a user interface to enable utilization of EDA tools; a first project coordinator, the first project coordinator suitable for acting as an administrative interface; at least two EDA tools, wherein the EDA tools are configured to implement at least one function in a process for designing an integrated circuit (IC); and a dynamic template, wherein the dynamic template implements at least two symbols displayable on a display device on the user computer, wherein the at least two symbols each correspond to a respective EDA tools accessible by the first design navigator, the symbols arrangeable on the display by a user of the user computer to indicate an interrelationship of the EDA tools in a design process; and a second user computer communicatively coupled to the network, including
a second design navigator, the second design navigator suitable for providing a user interface to enable utilization of EDA tools; a second project coordinator, the second project coordinator suitable for acting as an administrative interface; at least two EDA tools, wherein the EDA tools are configured to implement at least one function in a process for designing an integrated circuit (IC); and a dynamic template, wherein the dynamic template implements at least two symbols displayable on a display device on the user computer, wherein the at least two symbols each correspond to a respective EDA tools accessible by the second design navigator, the symbols arrangeable on the display by a user of the user computer to indicate an interrelationship of the EDA tools in a design process.
- 11. The system as described in claim 10, wherein the interrelationship of the symbols of the dynamic template is a flow.
- 12. The system as described in claim 10, wherein the project coordinator is suitable for providing at least one of tool-usage logging, access control, load balancing, file backup and security.
- 13. The system as described in claim 10, wherein at least one dynamic template includes at least one of a milestone and sign-off.
- 14. The system as described in claim 10, wherein each EDA tool is embedded within a wrapper, the wrapper suitable for always indicating to the project coordinator (which, in turn informs the design navigator) of at least one of entry of an EDA tool and either an exit of an EDA tool or a suspension of the EDA tool operation due to a malfunction or other unexpected occurrence.
- 15. The system as described in claim 10, wherein dynamic load balancing is utilized by at least one of the primary project coordinator and the secondary or server project coordinator(s).
- 16. The system as described in claim 10, wherein heuristic feedback is utilized so that The system as described in claim 1, wherein heuristic feedback is utilized so that utilization of the EDA tools is monitored and utilized to configure future interrelationships on dynamic templates, new requirements for tools and procedures, and algorithmic and implementation enhancements to exiting tools and procedures.
- 17. A method of designing an integrated circuit, comprising:
accessing a design utility operating on an information handling system; displaying a dynamic template on a display device of an information handling system, wherein the dynamic template implements at least two symbols displayable on a display device, wherein the at least two symbols each correspond to a respective EDA tool; and arranging the at least two symbols displayed on the display device, wherein the at least two symbols are arranged to indicate an interrelationship of the EDA tools in a design process of an integrated circuit.
- 18. The method as described in claim 17, wherein the interrelationship of the symbols of the dynamic template is at least one of a flow and series of procedural steps.
- 19. The method as described in claim 17, wherein the dynamic template includes at least one of a milestone and sign-off.
- 20. The method as described in claim 17, wherein a symbol enables access to the corresponding EDA tool.
- 21. The method as described in claim 17, wherein heuristic feedback is utilized so that utilization of the EDA tools is monitored and utilized to configure future interrelationships on dynamic templates, new requirements for tools and procedures, and algorithmic and implementation enhancements to exiting tools and procedures.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] The present application hereby incorporates the following United Stated Patent Applications by reference in their entirety:
1AttorneyDocket NumberP.N./Express Mail Label NumberFiling DateLSI 01-69509/842,335Apr. 25, 2001LSI 01-488EV 013 245 395 USOct. 30, 2001LSI 01-489EV 013 245 404 USOct. 30, 2001LSI 01-490EV 013 245 418 USOct. 30, 2001