METHOD AND APPARATUS FOR IMPLEMENTING A WHITE-BOX CIPHER

Information

  • Patent Application
  • 20220271916
  • Publication Number
    20220271916
  • Date Filed
    April 28, 2022
    2 years ago
  • Date Published
    August 25, 2022
    2 years ago
Abstract
An apparatus method and computer media for implementing a white-box block cipher in a software application to create a secure software application having the same functionality as the software application. An implementation of a block cipher is created by: applying an isomorphism between an original finite field representation and a composite field representation, and using this isomorphism to reconstruct the cipher as operations that use only the elements of the composite field, including XOR, linear transformation and S-box; decomposing original S-box into several algebraic steps and merging some of these into other parts of the cipher; in the non-linear step of S-box, implementing the inversion in the original finite field representation with algorithm in the composite field representation; applying an initial threshold implementation of m input shares and n output shares to generate lookup tables for the non-linear step of S-box; applying further threshold implementations to different steps of the cipher to generate lookup tables. The block cipher is applied to at least a portion of the software application to create the secure software application and thereby increase security of a computing platform executing the secure software application.
Description
FIELD OF THE DISCLOSURE

The present disclosure relates to white-box security implementations and related white-box ciphers that can be applied to SM4 encoding schemes.


BACKGROUND

The term “cryptography” refers to techniques for secure communication in the presence of third parties, sometimes referred to as “adversaries” or “attackers.” Various protocols that prevent third parties or the public from reading private messages can be constructed. Applications of cryptography include electronic commerce, chip-based payment cards, digital currencies, computer passwords, and content streaming. Modern cryptographic algorithms are designed around computational hardness assumptions, making such algorithms hard to break in practice by any adversary. It is theoretically possible to break such a system, but it preferably is not pragmatic to do so in order to discourage potential attackers.


The “black-box” attack model of cryptography is based on the premise that the internal operation of a cipher and the key it uses are not accessible to an adversary, who only has access to its inputs and outputs. This model underlies the development and design of most modern cryptographic algorithms, including Data Encryption Standard (DES), Advanced Encryption Standard (AES) and many others. However, this premise of black box attack models, i.e. that the internal operations of devices are not accessible to an attacker, does not apply to many real-world security problems.


The “white-box” attack model assumes a greater level of visibility and control by the adversary. The white-box attack model can be applied in many more modern implementations, where the attacker may have full visibility and control of the operation, such as in a mobile phone or personal computer that may have debugging tools or installed malware. This presents a challenge to develop countermeasures to an adversary extracting information such as cryptographic keys or influencing the operation to produce undesired results in the white-box model. As a result, the study of countermeasures to subversion in the white-box model has become increasingly important.


Chow, S., Eisen, P., Johnson, H. and Van Oorschot, P. C., White-box cryptography and an AES implementation, International Workshop on Selected Areas in Cryptography, pp. 250-270, (Springer, Berlin, Heidelberg, August 2002) described countermeasures to white-box attacks and thus sensitized the academic community at large to the idea that countermeasures in the white-box scenario might be feasible. The general idea of a white-box AES implementation is to hide the secret key in the S-Boxes of AES, break AES into several steps and insert secret random bijections to obfuscate every step. To keep the implementation functionally equivalent to AES, the inserted parts will be canceled out in the end. However, AES white-box implementations have been successfully attacked. In 2004, Billet, Gilbert and Ech-Chatbi presented an efficient attack (referred to as the BGE attack) on and AES white-box implementation. The BGE attack extracted the embedded AES key with a work factor of 230 the attacks, and thus is a pragmatic attack.


Many dedicated white-box implementations are known. Some implement a standard cipher in a white-box attack context and some focus on the designs of various non-standard ciphers which are expected to be secure under white-box attack. Such ciphers are referred to as “white-box ciphers.” However, research on cryptanalysis against white-box implementations has made significant progress. Some attacks are unique to the white-box model, because they require detailed structure for analysis. This includes algebraic attacks such as the BGE attack. Additionally, in some scenarios, a “lifting attack” is possible because the key does need to be determined since the lifted algorithm may be used as an oracle and sources of randomness can be overridden.


“Gray-box” attacks such as DPA (Differential Power Analysis) have been repurposed under the name DCA (Differential Computation Analysis) and could be reassessed for effectiveness in white-box scenarios. For example, the advantage of a simple sharing scheme that increases the number of traces that must be collected for analysis as the power of the number of shares is lost when there is no noise, as is the case in the white-box scenario. Some benefits of these countermeasures are retained. Any well-designed sharing scheme, including a threshold scheme applied for combating leakage due to hardware glitches, provides some advantage since identifying information leakage is made more complex through the hiding of direct correlations.


Due to its prevalence, AES has been the focus of analysis and countermeasures, and several white-box implementations of AES have been published and analyzed in the literature. SM4 is a newer standardized cipher and has not been analyzed much in the white-box context. SM4 is a block cipher used in the Chinese National Standard for Wireless LAN WAPI. The SM4 algorithm was invented by Lu Shuwang and it became a national standard in China (GB/T 32907-2016) in August 2016. The SM4 cipher has a block size of 128 bits. It uses an 8-bit S-box and the key size is 128 bits. The only operations used are 32-bit bitwise XOR, 32-bit circular shifts and S-box applications. Encryption or decryption of one block of data is composed of 32 rounds. Each round updates a quarter (i.e., 32 bits) of the internal state. A non-linear key schedule is used to produce the round keys. Decryption uses the same round keys as for encryption, except that they are in reversed order. The round structure of SM4 has several similarities with AES, including an 8-bit S-box determined by inversion in a finite field followed by linear diffusion between the output of four S-boxes.


The first white-box SM4 implementation was proposed by Xiao, Y.; Lai, X. White-Box Cryptography and a White-Box Implementation of the SMS4 Algorithm; Shanghai Jiaotong University: Shanghai, China, pp. 24-34, 2009. The cipher of Xiao et al. was proved to be unsecure from an attack similar to a BGE attack. Another white-box SM4 implementation was proposed in Shi, Y., Wei, W. and He, Z., Lightweight White-box Symmetric Encryption Algorithm Against Node Capture for WSNs, Sensors, 15(5), pp.11928-11952, 2015. This implementation uses the concept of dual ciphers and a randomly selected nonsingular matrix to construct a functionally equivalent white-box encryption algorithm of SM4. Lin, Tingting, et al. Security Evaluation and Improvement of a White-Box SMS4 Implementation Based on Affine Equivalence Algorithm, The Computer Journal 61.12: 1783-1790, 2018, presented an analysis of this implementation and described how an affine equivalence algorithm could be used to extract the key.


SUMMARY

The implementations described herein are white-box implementations that can be applied to SM4. Techniques are applied in a novel manner to create a practical implementation of fixed-key SM4 resistant to white-box attacks. The techniques include the use of a composite fields made possible by the S-box structure, re-expressing the entire cipher in terms of 4-bit intermediate variables to reduce total table size, exclusive use of lookup-tables, and the application of an (n,n) threshold scheme where shares are generated using other parts of the processing state in the generation of the shares. The white-box SM4 implementations described herein are resistant against known white-box attacks, such as affine equivalence attacks, BGE-like attacks and DCA-like attacks.


One implementation includes a method, apparatus or computer-readable media for implementing a white-box block cipher in a software application to create a secure software application having the same functionality as the software application, the method comprising creating an implementation of a block cipher by:

    • applying an isomorphism between an original finite field representation and a composite field representation, and using this isomorphism to reconstruct the cipher as operations that use only the elements of the composite field, including XOR, linear transformation and S-box; decomposing original S-box into several algebraic steps and merging some of these into other parts of the cipher; in the non-linear step of S-box, implementing the inversion in the original finite field representation with algorithm in the composite field representation; applying an initial threshold implementation of m input shares and n output shares to generate lookup tables for the non-linear step of S-box; applying further threshold implementations to different steps of the cipher to generate lookup tables; and


applying the block cipher to at least a portion of the software application to create the secure software application and thereby increase security of a computing platform executing the secure software application.





BRIEF DESCRIPTION OF THE DRAWING

Implementations of the invention will be described below in connection with the attached drawing in which:



FIG. 1 is a block diagram on one round of an SM4 block cipher in accordance with a disclosed implementation.



FIG. 2 is a block diagram of a byte-wise operation example in SM4 in accordance with a disclosed implementation.



FIG. 3 is a block diagram of a lookup table generated by a threshold implementation in accordance with a disclosed implementation.



FIG. 4 is a block diagram of the processing of one branch of first round in accordance with a disclosed implementation.



FIG. 5 is a block diagram of a lookup table for mask generation in accordance with a disclosed implementation.



FIG. 6 is a block diagram of mask generation based on the lookup table of FIG. 5.



FIG. 7 is a block diagram of a computation step in accordance with a disclosed implementation.



FIG. 8 is a block diagram of a computation step in accordance with a disclosed implementation.



FIG. 9 is a block diagram of a computation step in accordance with a disclosed implementation.



FIG. 10 is a block diagram of a computation step in accordance a the disclosed implementation.



FIG. 11 is a block diagram of a process for creating a T-box in accordance a the disclosed implementation.



FIG. 12 is a block diagram of the lookup tables in accordance with the disclosed implementation.



FIG. 13 is a block diagram of a computation of the first branch of the second round in accordance with a disclosed implementation.



FIG. 14 is a block diagram of mask cancellation data flow in accordance with a disclosed implementation.



FIG. 15 is a block diagram of a computation of the first branch of the third round in accordance with a disclosed implementation.



FIG. 16 is a block diagram of a computation of the addition operation of the first branch of the third round in accordance with a disclosed implementation.



FIG. 17 is a block diagram of a computation of the first branch of the fourth round in accordance with a disclosed implementation.



FIG. 18 is a block diagram of a computation of the addition operation of the first branch of the fourth round in accordance with a disclosed implementation.



FIG. 19 is a block diagram of the changed lookup tables in accordance with a disclosed implementation.



FIG. 20 is a block diagram of the computation for ciphertext recovery in accordance with a disclosed implementation.



FIG. 21 is a block diagram of a “Type II Table” in accordance with a disclosed implementation.



FIG. 22 is a block diagram of a “Type III Table” in accordance with a disclosed implementation.



FIG. 23 is a block diagram of a “Type Iv Table” in accordance with a disclosed implementation.



FIG. 24 is a block diagram of a combined lookup tables for a single column in accordance with a disclosed implementation.



FIG. 25 is a block diagram of a simplified T-box in accordance with a disclosed implementation.



FIG. 26 is a block diagram of 4 T-boxes combined with 8×16 tables in accordance a the disclosed implementation.



FIG. 27 is a schematic diagram of an architecture for performing the function in accordance with a disclosed implementation.



FIG. 28 is a flow chart of a high-level method in accordance with a disclosed implementation.





DETAILED DESCRIPTION

Before describing the novel aspects of the disclosed implementations, SM4 will be described in greater detail. SM4 was selected to be used in the Wired Authentication and Privacy Infrastructure (WAPI) standard, is officially mandated in China and plays an important part in providing data confidentiality for WLAN products. SM4 has a 128-bit key size, a 128-bit block size and a 32-round unbalanced Feistel network structure. Let {X0,X1,X2,X3}∈GF(232)4 be the plaintext, Ki∈GF(232)4, (i=0, 1, 2, . . . , 31) be the round keys. The SM4 encryption operation is then shown at 100 in FIG. 1. As shown, the plain text {X0,X1,X2,X3} is inputted. Then, for i=0, 1, . . . , 31:










X

i
+
4


=

F

(


X
i

,

X

i
+
1


,

X

i
+
2


,

X

i
+
3


,

K
i


)







=


X
i



τ

(


X

i
+
1




X

i
+
2




X

i
+
3




K
i


)









The resulting output the cipher text is:





(Y0,Y1,Y2,Y3)=(X35,X34,X33,X32)


Where:

    • The transformation τ:GF(232)→GF(232) is a reversible substitution. It is composed of a linear transformation L and a non-linear transformation S and, namely τ(x)=L(S(x)).
    • The linear transformation L is defined as L(B)=B⊕(B<<<2⊕(B<<<10)⊕(B<<<18)⊕(B<<<24) for B∈GF(232).
    • The transformation S applies four 8×8 bijective S-Boxes in parallel: S(A)=(Sbox(a0),Sbox(a1),Sbox(a2),Sbox(a3)) for A=(a0,a1,a2,a3), S(A)∈GF(28)4.
    • The decryption procedure is identical to encryption procedure, except that the order in which the round keys are used is reversed.


Composite fields are often used in implementations of Galois Field arithmetic. A field GF(2k) is a composite field when k is not a prime and can be written as k=mn. The fields GF (2k) and GF ((2m)n) are isomorphic to each other. With an isomorphism, the elements and the operations can be mapped from one to the other.


For an implementation, the composite field GF (28) is used. The elements are mapped in GF (28) to GF((24)2), where the arithmetic in GF((24)2) is constructed by following field polynomials P1(x) and P2(x) both being irreducible:






P
1(x)=x2+tx+n, over GF(24)






P
2(x)=x4+ux3+vx2+wx+N, over GF(2).


A general element g of GF((24)2) can be represented as a linear polynomial (in Y) over , GF(24), as g=γ1Y⊕γ0, with multiplication modulo polynomial Pi(x). All the coefficients are in the 4-bit subfield GF(24). So the pair (γ10) represents g in terms of a polynomial basis [Y, 1], where Y is one root of Pi(x).


The isomorphism mappings and the operation representations depend on the field polynomials and different bases. We are free to choose either type of basis at each level. The isomorphism mappings between GF (28) and GF((24)2) can be found in a known manner, such as is taught by Rudra, A., Dubey, P. K., Jutla, C. S., Kumar, V., Rao, J. R. and Rohatgi, P. Efficient Rijndael Encryption Implementation with Composite Field Arithmetic, International Work-shop on Cryptographic Hardware and Embedded Systems pp.171-184. Springer, Berlin, Heidelberg, May, 2001; Paar, C. Efficient VLSI Architectures for Bit-parallel Computation in Galois fields. PhD Thesis, Inst. for Experi-mental Math., Univ. of Essen, 1994; and Wong, M. M., Wong, M. L. D., Hijzin, I. and Nandi, A. K. Composite field GF (((2 2)2)2) AES S-Box with Direct Computation in GF (2 4) Inversion, Information Technology in Asia (CITA 11), 2011 7th International Conference on, pp. 1-6. IEEE. The details of a known method for representing the operations, such as multiplication and multiplicative inverse, can be found in Canright, D., 2005, August, A Very Compact S-box for AES, International Workshop on Cryptographic Hardware and Embedded Systems pp. 441-455, Springer, Berlin, Heidelberg, July, 2011.


Threshold Implementations are well known as a side channel attack countermeasure as taught by Nikova, S., Rechberger, C. and Rijmen, V. December, Threshold implementations Against Side-channel Attacks and Glitches, International conference on information and communications security pp. 529-545, Springer, Ber-lin, Heidelberg. December 2006. Such an attack is based on secret sharing and multiparty computation. In a disclosed implementation an (n,n) threshold system, which requires a set of n functions fi to compute the outputs of a function f, is used. The set of n outputs of the functions fi are called the output shares.


Let z=f (A, B, . . . ) denote a function. A variable A is split into n shares Ai when A=ΣiAi. A secure threshold implementation can satisfy three properties:

    • Property 1 (Non-completeness). Every function is independent of at least one share of each of the input variables A, B, . . .








z
1

=


f
1

(


A
2

,

A
3

,


,

A
n

,

B
2

,

B
3

,


,

B
n

,


)






z
2

=


f
2

(


A
1

,

A
3

,


,

A
n

,

B
1

,

B
3

,


,

B
n

,


)




……




z
n

=


f
n

(


A
1

,

A
2

,


,

A

n
-
1


,


,

B
1

,

B
2

,


,

B

n
-
1


,


)








    • Property 2 (Correctness). The sum of the sharing gives the desired output.

    • z=Σiziifi.

    • Property 3 (Uniformity). If the input shares (A1, A2,L,An) consistent with A are uniformly distributed, and similarly for B, C, . . . , the output shares consistent with z must be uniformly distributed.





The number of the input shares and output shares affects the properties of a threshold implementation. For example, the uniformity is not guaranteed if a threshold implementation is applied with three shares for each input X, Y and Z, and three output shares to the function F(X,Y,Z)=X+YZ. The details of how to create a threshold implementation for such functions are well-known and not discussed further herein. For example, more details and constructions can be found in Bilgin B, Nikova S, Nikov V, Rijmen V, Stütz G, Threshold implementations of all 3×3 and 4×4 S-Boxes, International Workshop on Cryptographic Hardware and Embedded Systems, 9, pp. 76-91), Springer, Berlin, Heidelberg, September 2012; ]Nikova, S., Rechberger, C. and Rijmen, V. December, Threshold Implementations Against Side-channel Attacks and Glitches, International conference on information and communications security pp. 529-545, Springer, Berlin, Heidelberg. December 2006; Nikova, S., Rijmen, V. and Schlaffer, M. Secure Hardware Implementation of Non-linear Functions in the Presence of Glitches, International Conference on Information Security and Cryptology p.p 218-234), Springer, Berlin, Heidelberg, December 2008. The disclosed implementations use TI to indicate a threshold implementation.


Before describing the disclosed implementations in detail, several techniques are discussed below. Chow, S., Eisen, P., Johnson, H. and Van Oorschot, P. C., White-box cryptography and an AES implementation, International Workshop on Selected Areas in Cryptography, pp. 250-270. Springer, Berlin, Heidelberg. August 2002, teaches that the algebraic structure of an S -box can be represented as:








S

(
x
)

=



A
2

·


(



A
1

·
x



C
1


)


-
1






C
2

.

with








A
1

=

[



1


0


1


0


0


1


1


1




0


1


0


0


1


1


1


1




1


0


0


1


1


1


1


0




0


0


1


1


1


1


0


1




0


1


1


1


1


0


1


0




1


1


1


1


0


1


0


0




1


1


1


0


1


0


0


1




1


1


0


1


0


0


1


1



]


,


C
1

=

[



1




1




0




0




1




0




1




1



]








A
2

=

[



1


1


0


0


1


0


1


1




1


0


0


1


0


1


1


1




0


0


1


0


1


1


1


1




0


1


0


1


1


1


1


0




1


0


1


1


1


1


0


0




0


1


1


1


1


0


0


1




1


1


1


1


0


0


1


0




1


1


1


0


0


1


0


1



]


,



C
2

=

[



1




1




0




1




0




0




1




1



]


;






and the underlying irreducible polynomial for GF (28) over GF (2)is: f(x)=x8+x7+x6+x5+x4+x3+x2+1.


However, applicant has discovered that this does not match with the S -box table of SM4. Therefore, the matrix A2 and the irreducible polynomial have been modified in a novel manner. Verification shows that following parameters and irreducible polynomial will correctly generate the lookup table for the SM4 S -box:









A
1

=

[



1


0


1


0


0


1


1


1




0


1


0


0


1


1


1


1




1


0


0


1


1


1


1


0




0


0


1


1


1


1


0


1




0


1


1


1


1


0


1


0




1


1


1


1


0


1


0


0




1


1


1


0


1


0


0


1




1


1


0


1


0


0


1


1



]


,


C
1

=

[



1




1




0




0




1




0




1




1



]








A
2

=

[



0


1


0


0


1


0


1


1




1


0


1


1


1


1


0


1




0


1


0


1


0


0


0


1




1


0


0


0


1


0


0


1




0


0


1


1


1


0


0


1




0


1


0


1


1


0


0


1




1


0


0


1


0


0


0


0




0


1


1


0


0


0


0


0



]


,



C
2

=

[



1




1




0




1




0




0




1




1



]


;






and the underlying irreducible polynomial for GF(28) over GF(2) is:





f(x)=x8+x6+x4+x3+x2+x+1.


It may be noted that the polynomial is simply the reciprocal polynomial (reversed coefficients), and C1, A2 and C2 are the same, but the matrix A2 is substantially different.


In each round, four 8-bit S-Boxes are applied in parallel and the linear transformation L can be expressed as a block matrix composed of 8×8 matrices. This allows the entire SM4 operation to be expressed in terms of byte-wide operations. The 32×32 linear transformation L is expressed as a 4×4 block matrix of 8×8 matrices:






L
=

[




l
00




l
01




l
02




l
03






l
10




l
11




l
12




l
13






l
20




l
21




l
22




l
23






l
30




l
31




l
32




l
33




]





Thirty-two-bit inputs/outputs and round key in each round are presented as the concatenation of four bytes each:





Xt=xt0∥xt1∥xt2∥xt3(t={0, 1, . . . , 35})





Kr=kr0∥kr1∥kr2∥kr3(r={0, 1, . . . , 31})


The round key can be embedded in the S-boxes: Skrj(x)=S(x⊕krj). One byte of the output in each round can be calculated as follows:







x


(

r
+
4

)


j


=


x
rj




l

j

0


·


S

k

r

0



(


x


(

r
+
1

)


0




x


(

r
+
2

)


0




x


(

r
+
3

)


0



)





l

j

1


·


S

k

r

1



(


x


(

r
+
1

)


1




x


(

r
+
2

)


1




x


(

r
+
3

)


1



)





l

j

2


·


s

k

r

2



(


x


(

r
+
1

)


2




x


(

r
+
2

)


2




x


(

r
+
3

)


2



)





l

j

3


·


S

k

r

3



(


x


(

r
+
1

)


3




x


(

r
+
2

)


3




x


(

r
+
3

)


3



)







Where r=0, 1, 2, . . . , 31; j=0, 1, 2, 3.


For example, if the key byte is fixed in the S-box, the first byte of x, can be calculated with process shown at 200 in FIG. 2. The parallel four byte-wise operation sequences (respectively 201, 202, 203, and 204) before the final XOR in FIG. 2 are referred to as four “branches” herein.


Multiplications in GF(24) can be defined with an irreducible polynomial of degree 4 over GF(2). Only three irreducible polynomials with degree 4 exist, of which any one can be used for the definition:






f
1(x)=x4+x3+x2+x+1,






f
2(x)=x4+x3+1,






f
3(x)=x4+x+1.


The field multiplication “*” is defined as:










A
*
B

=


(


a
3

,

a
2

,

a
1

,

a
0


)

*

(


b
3

,

b
2

,

b
1

,

b
0


)








=


(



a
x



x
3


+


a
2



x
2


+


a
1


x

+

a
0


)



(



b
3



x
3


+


b
2



x
2


+


b
1


x

+

b
0


)



mod

(


f
i

(
x
)

)









The number of input shares and output shares for a threshold implementation may differ. When a threshold implementation of m input shares and n output shares is applied on a function F(X,Y,Z, . . . ) (denoted as H[F(X,Y,Z, . . . )]), the following steps generate a lookup table:

    • 1. Split each possible value of an input x into m shares randomly when generating the table. The set of shares of input x is {X1,X2, . . . }, where m−1 of them are random values (for example {X1,X2, . . . ,Xm-1}) generated from a pseudo-random number generator (PRNG), and the last share is computed by Xm=X⊕X1⊕X2⊕L⊕Xm-1. The same as for Y, Z etc. Note that the input shares are used only in the table generation, but the inputs of the lookup table are X,Y,ZK.
    • 2. Given the functions Fi, compute n output shares with:








z
1

=


F
1

(


X
2

,

X
3

,


,

X
m

,

Y
2

,

Y
3

,


,

Y
m

,


)






z
2

=


F
2

(


X
1

,

X
3

,


,

X
m

,

Y
1

,

Y
3

,


,

Y
m

,


)




……




z
n

=


F
n

(


X
1

,

X
2

,


,

X

m
-
1


,


,

Y
1

,

Y
2

,


,

Y

m
-
1


,


)






As described above, it is assumed that such threshold implementations exist, and TI is used to indicate that a threshold implementation is applied.


Steps 1 and 2 can be repeated for all the possible inputs X,Y,Z, . . . , to obtain corresponding output shares. The lookup table, shown in FIG. 3, is generated based on the inputs and its corresponding output shares. A dotted box is used to denote a lookup table herein.


To provide resistance to existing white-box attacks, such as affine equivalence attacks, BGE attacks, and DCA-like attacks, the disclosed implementations can be created based on the following rules:

    • 1. The way of applying masks (at least on the S-box) should not be affine.
    • 2. The masks can be data-dependent.
    • 3. The structure of the algorithm should be as obscure as possible.
    • 4. The correlations between the outputs of each step in the white-box SM4 implementation and in the standard SM4 cannot be used to apply analysis.
    • 5. Each mask can be dependent on an earlier mask in an inverted tree structure.


In the disclosed implementation, each intermediate variable is split into four-bit nibbles. With the operations in SM4, such as XOR, shift, and S-box, being divided into several steps, the 4-bit data as well as masks will be processed, and corresponding lookup tables will be generated. The threshold implementations are used to extend the output space of some lookup tables and produce masks at the same time. An isomorphic map is applied on the 4-bit data in S-box to obscure the inner operation. The whole encryption consists of only lookup tables, other calculations are not required.


In the first round, an example of implementing the first branch of FIG. 2 is described. Other branches can be implemented in a similar manner. As shown in FIG. 4, a threshold implementation TI1 of 4 shares of each input and 3 output shares is selected and applied to the function F(X ,Y)=X*Y to generate the lookup table 500 shown in FIG. 5. Each input is divided into two four-bit nibbles: x1=x100∥x101,x2=x200∥x201,x30=x300∥x301. Using the lookup table, masks fr1(i) are generated from x100 and x200, and masks grj(i) from x101 and x201, where r=0,1,K,31, i=0,1,2,3, j=0,1,2. The data flow is depicted at 600 in FIG. 6, using the same table in both cases.


To compute x100⊕x200⊕x300 and x101⊕x201⊕x301, the additions are accomplished with several steps. In each step, some masks are canceled out and new masks are added. First, the function F(X,Y,Z)=X⊕X*Y⊕Y⊕Z is used to generate a lookup table. Using the lookup table, we get ar(i) and a′r(i), where r and i are the same as before. This data flow is depicted at 700 in FIG. 7, where the same table is used twice. Note the table generation is not specific to the variables, but the data flow is shown with the specific variables used in this example.


A threshold implementation of 2 shares of each input and 2 output shares (TI2) is then selected and applied to the function F(X,Y,Z)=X⊕Y⊕Z to generate a lookup table for TI2(X⊕Y⊕Z). Using the lookup table, we get br,j(i) from (a0(0),x300,f0,1(0)), and b′r,j(r) from (a′0(0),x301,g0,1(0)), where r and i are the same as before, j=0,1. This data flow is shown at 800 in FIG. 8. Next, a threshold implementation of 4 shares of each input and 3 output shares (TI3) is selected and applied to the function F(X,Y)=X⊕X2⊕Y to generate a lookup table for TI3(X⊕X2⊕Y). Using the lookup table, we get cr,j(i) from (b0,1(0),f0,2(0)), and c′r,j(i) from (b′0,1(0),g0,2(0)), where r and i are the same as before, j=0,1,2. This data flow is shown at 900 in FIG. 9. As a result, we get b0,0(0)⊕c0,0(0)⊕c0,1(0)⊕c0,2(0)=x100⊕x200⊕x300⊕(b0,1(0))2 from left-hand data flow, and b′0,0(0)⊕c′0,0(0)⊕c′0,1(0)⊕c′0,2(0)=x101⊕x201⊕x301⊕(b0,1(0))2 right-hand data flow.


As noted above, the algebraic structure of a fixed-key S-box can be represented as:






S
k

ij
(x)=S(x⊕krj)=A2(A1x⊕A1krj⊕c1)−1⊕C2.

    • We compute “y=A1x” first.
    • Let








A
1

=


[



1


0


1


0


0


1


1


1




0


1


0


0


1


1


1


1




1


0


0


1


1


1


1


0




0


0


1


1


1


1


0


1




0


1


1


1


1


0


1


0




1


1


1


1


0


1


0


0




1


1


1


0


1


0


0


1




1


1


0


1


0


0


1


1



]

=

[




A
00




A
01






A
10




A
11




]






x
=

[




x
0






x
1




]








    • where Aij is a 4×4 block matrix of A1, xi is a 4×1 vector.

    • The multiplication “A1x” can be represented as:











A
1


x

=



[




A
00




A
01






A
10




A
11




]

[




x
0






x
1




]

=

[






Z
00



x
0





A
01



x
1










A
10



x
0





A
11



x
1






]








    • Six lookup tables for can be generated for functions:









F
0(X,Y,Z)=A00X⊕A01Y⊕A00Z,






F
1(X,Y,Z)=i X⊕A01Y≠A00Z,






F
2(X,Y,Z)=X⊕A01Y⊕A00Z2,






G
0(X,Y,Z)=A11X⊕A10Y⊕A10Z,






G
1(X,Y,Z)=X⊕A11Y⊕A10Z,






G
2(X,Y,Z)=X⊕A11Y⊕A10Z2


The data flow 1000 of FIG. 10 shows this computation. From the left-hand data flow we get:






d
0,3
(0)
=A
00(x100⊕x200⊕x300)⊕A01⊕(x101⊕x201⊕x301)⊕A01(b0,1(0))2 and






d′
0,3
(0)
=A
10(x100⊕x200⊕x100)⊕A11⊕(x101⊕x201⊕x301)⊕A11(b0,1(0))2,


The remaining portions of the standard S-box can be computed as:






T
k

rj
(y)=A2(y⊕A1krj⊕C1)−1⊕C2.


Now a T-box can be created using the data flow 1100 shown in FIG. 11. The masked data d0,3(0) and d′0,3(0) are the inputs of the T-box. To obfuscate the relationship between the inputs and outputs of the T-Box, the lookup table is created with a threshold implementation. However, it is not practical to construct uniform threshold shares for an inverse function with 8-bit input, so an isomorphism is used to map the 8-bit operations into 4-bit operations of a chosen composite field. When the inversion is complete, T−1 will be used to map the values back to the field GF (28). The lookup table T-box is generated for all the possible inputs and corresponding outputs with following steps. In Step 1 of FIG. 11, masks from d0,3(0) and d′0,3(0) are cancelled out by computing d0,3(0)⊕A01(b′0,1(0))2 and d′0,3(0)⊕A11(b′0,1(0))2. We get a y for Tkrj(y). In Step 2 of FIG. 11, z=y⊕A1k00⊕C1 is computed. In Step 3 of FIG. 11, z−1 is computed in a composite field GF((24)2). Isomorphism mapping T is then used to transform the standard 8-bit value into two 4-bit values γ0∥γ1 in a composite field. Applicant has implemented a program to find T and the experiment shows that there are 120 irreducible polynomial P(x) of degree 2, and 128 mappings from (GF(28),f(x)) to (GF((24)2),P(x)) for each P(x). Therefore, there are 15360 candidates for T. Each T is an 8×8 invertible matrix. One is chosen and in Step 4 of FIG. 11, F=(γ12n+γ1λ0τ+γ02)−1 is computed. In Step 5 of FIG. 11, Fγ1 and F(γ1τ+γ0) are computed as the inverse of γ0∥γ1. Since a polynomial basis (Y,1) and P(x)=x2+τx+n was chosen, the inverse of γ0∥γ1 is given by:





1Y+γ0)31 1=[Fγ1]Y+[F1τ+γ0)],


where Y is one root of P(x). We apply threshold implementation (TI4) of 4 shares of each input and 3 output shares to function Fγ1+d′3 and F(γ1τ+γ0)+d3, their outputs shares are (G0,G1,G2) and (N0,N1,N2), respectively. In Step 6 of FIG. 11,l let








T


=



A
2



T

-
1



=

[




T
00





T
01







T
10





T
11





]



,


C
2

=

[





C

2
-
00




C

2
-
01




C

2
-
02









C

2
-
10




C

2
-
11




C

2
-
12






]






where T′ij is the 4×4 block matrix of T′, (C2-00,C2-01,C2-02) are three shares of the first 4-bit nibble of C2, (C2-10,C2-11,C2-12) are three shares of the last 4-bit nibble of C2. Compute ti(0)=T′00Gi⊕T′01N0⊕C2-0i and si(0)=T′10Gi⊕T′11N0⊕C2-1i, where i=0,1,2. The matrix T−1 is used to transform two 4-bit values of the composite field back to a standard 8-bit value; A2 and C2 are the linear and constant parts of the affine transformation of SM4, respectively. The result is that we have obtained six masked values (t0,0(0),t0,1(0),t0,2(0),s0,0(0),s0,1(0),s0,2(0)) from the first branch. With the same method used in above subsections, we get (t0,0(i),t0,1(i),t0,2(i),s0,0(i),s0,1(i),s0,2(i)) (i=1,2,3) for remaining three branches. To compute x40, we multiply l0i with outputs of each branch and add them together:








x
00




l
00

[





t
0

(
0
)




t
1

(
0
)




t
2

(
0
)









s
0

(
0
)




s
1

(
0
)




s
2

(
1
)






]




l
01

[





t
0

(
1
)




t
1

(
1
)




t
2

(
1
)









s
0

(
1
)




s
1

(
1
)




s
2

(
1
)






]



=




[




x
00
0






x
00
1




]




[




P

00
-
00





P

00
-
01







P

00
-
10





P

00
-
11





]

[





t
0

(
0
)




t
1

(
0
)




t
2

(
0
)









s
0

(
0
)




s
1

(
0
)




s
2

(
0
)






]




l
02

[





t
0

(
2
)




t
1

(
2
)




t
2

(
2
)









s
0

(
2
)




s
1

(
2
)




s
2

(
2
)






]






l
03

[





t
0

(
3
)




t
1

(
3
)




t
2

(
3
)









s
0

(
3
)




s
1

(
3
)




s
2

(
3
)






]

[




P

01
-
00





P

01
-
01







P

01
-
10





P

01
-
11





]

[





t
0

(
1
)




t
1

(
1
)




t
2

(
1
)









s
0

(
1
)




s
1

(
1
)




s
2

(
1
)






]







[




P

02
-
00





P

02
-
01







P

02
-
10





P

02
-
11





]

[





t
0

(
2
)




t
1

(
2
)




t
2

(
2
)









s
0

(
2
)




s
1

(
2
)




s
2

(
2
)






]




[




P

03
-
00





P

03
-
01







P

03
-
10





P

03
-
11





]

[





t
0

(
3
)




t
1

(
3
)




t
2

(
3
)









s
0

(
3
)




s
1

(
3
)




s
2

(
3
)






]









Where








l

0

h


=

[




P


0

h

-
00





P


0

h

-
01







P


0

h

-
10





P


0

h

-
11





]


,




P0h-ju is a 4×4 block matrix.


By adding part of the upper half part of each matrix, we get a masked value of x400. We can construct 16 lookup tables to implement this step. This data flow is depicted at 1200 in FIG. 12, where i=1, j=0.


It can be verified that x400=x400⊕P03-01s2(3). By adding part of the lower half part of each matrix, the result is a masked value of x401. We construct another 16 lookup tables to compute x401. This data flow is also depicted in FIG. 12, except j=1. One can verify that x401=x401⊕P03-11s0,2(3).


Let








l

1

h


=

[




P


1

h

-
00





P


1

h

-
01







P


1

h

-
10





P


1

h

-
11





]


,


l

2

h


=

[




P


2

h

-
00





P


2

h

-
01







P


2

h

-
10





P


2

h

-
11





]


,


and



l

3

h



=

[




P


3

h

-
00





P


3

h

-
01







P


3

h

-
10





P


3

h

-
11





]






where Pih-ju is a 4×4 block matrix, i=1,2,3; j=0,1; u=0,1.


Other three masked bytes of X4 are generated in a similar way. At this time, 16 lookup tables are constructed to compute x410, x411, x420, x430 and x431 respectively. The data flows are the same as depicted in FIG. 12, except i=1,2,3 j=0,1for x4ij.


One can verify that x410=x410⊕P13-01s0,2(3), x411=x411⊕P13-11s0,2(3), x420=x420⊕P23-01s0,2(3), x421=x421⊕P23-11s0,2(3), x430=x430⊕P33-01s0,2(3) and x431=x431⊕P33-11s0,2(3).


For a second round the first branch of this round is also used, as shown at 1300 in FIG. 13, as an example. In this branch, all the steps are the same as in first branch of first round, except for the addition operation. Since x40=(x400⊕P03-01s0,2(3)∥(x401⊕P03-11s0,2(3)) is a masked data, the masks should be cancelled in the addition operation. The lookup tables are only changed in step 3, i.e. use threshold implementation (TI3) of 4 input shares and 3 output shares to compute F(X,Y,Z)=X⊕(X)2⊕Y⊕P03-01Z, and G(X,Y,Z)=X⊕(X)2⊕Y⊕P03-11Z. This data flow is depicted at 1400 in FIG. 14. The result of this round is:






x
50
0=x500⊕P03-01s1,2(3)x501=x501⊕P03-11s1,2(3), x510=x510⊕P13-01s1,2(3), x511=x511⊕P13-12s1,2(3), x520=x520⊕P23-01s1,2(3), x521=x521⊕P23-11s1,2(3), x530=x530⊕P33-01s1,2(3), x531=x531⊕P33-13s1,2(3).



FIG. 15, at 1500, illustrates data flow of a first branch of a third round. The first branch of this round is as follows and is shown at 1600 in FIG. 16. Similar to the second round, all steps are the same as in the first branch of the first round, except for the addition operation. Since x40 and x50 masked data, the masks can be cancelled in this part. We only change the lookup tables in step 2, i.e. use threshold implementation (TI2) of 2 input shares and 2 output shares to compute F(X,Y,Z)=X⊕Y⊕P03-01Z and G(X,Y,Z)=X⊕Y⊕P03-11Z.


The result of this round is:






x
60
0=x600⊕P03-01s2,2(3), x601=x601⊕P03-11s2,2(3), x610=x610⊕P03-01s2,2(3),






x
61
1=x611⊕P13-11s2,2(3), x620=x620⊕P23-01s2,2(3),






x
62
1=x621⊕P23-11s2,2(3),






x
63
0=x630⊕P33-01s2,2(3),






x
63
1=x631⊕P33-11s2,2(3),


The processing of the first branch of the fifth round is shown at 1700 of FIG. 17. Similar to the second and third rounds, all steps are the same as in the first branch of the first round, except the Addition operation. Lookup tables generated in previous rounds are reused here, as shown at 1800 of FIG. 18. The result of this round is:






x
70
0=x700⊕P03-01s3,2(3),






x
70
1=x701⊕P03-11s3,2(3),






x
71
0=x710⊕P13-01s3,2(3),






x
71
1=x711⊕P13-11s3,2(3),






x
72
0=x720⊕P23-01s3,2(3),






x
72
1=x721⊕P23-11t3,2(3),






x
73
0=x730⊕P33-01s3,2(3),






x
73
1=x731⊕P33-11s3,2(3),


For remaining rounds, the data flow is the same as in the fourth round except in Compute X40 and Remaining three bytes of X4. Since, in the fifth round, all inputs are masked data. The two-input lookup tables in Part V: Compute X40 can be changed to three-input lookup tables to cancel an additional mask, and other lookup tables remain the same. The first nibble is used as an example and FIG. 19 indicates the changed tables and the data flow at 1900. For other nibbles, the lookup table can be changed in a similar manner.


After the last round, masked cipher texts (X32,X33,X34,X35) were obtained, where xr can be divided into eight 4-bit nibbles: Xr=(xr00xr00)∥(xr10xr11)∥(xr20xr21)∥(xr30xr31), where xr00=xr00⊕P03-01sr-4,2, xr01=xr01⊕P03-11sr-r,2(3), xr10=xr10⊕P13-01sr-4,2(3), xr11=xr11⊕P13-11sr-4,2, xr20=xr20⊕P23-01sr-4,2(3), xr21=xr21⊕P23-11sr-4,2(3), xr30=xr30⊕P33-01sr-4,2(3), xr31=xr31⊕P33-11sr-4,2(3).


Now eight lookup tables can be constructed for eight functions as shown at 2000 of FIG. 20:






F
0(X,Y)=X⊕P03-01Y, F1(X,Y)=X⊕P03-11Y






F
3(X,Y)=X⊕P13-01Y, F3(X,Y)=X⊕P13-11Y F4(X,Y)=X⊕P23-01Y,






F
5(X,Y)=X⊕P23-11Y F6(X,Y)=X⊕P33-01Y, F7(X,Y)=X⊕P31-11Y


The result is the following cipher text:





X32=x(32)00∥x(32)01∥x(32)10∥x(32)11∥x(32)20∥x(32)21∥x(32)30∥x(32)31





X33=x(33)00∥x(33)01∥x(33)10∥x(33)11∥x(33)20∥x(33)21∥x(33)30∥x(33)31





X34=x(34)00∥x(34)01∥x(34)10∥x(34)11∥x(34)20∥x(34)21∥x(34)30∥x(34)31





X35=x(35)00∥x(35)01∥x(35)10∥x(35)11∥x(35)20∥x(35)21∥x(35)30∥x(35)31


One important criterion for any white-box implementation is performance. The performance of the above implementation is evaluated below. As a first step, storage cost of the lookup tables was evaluated through the following algorithm.

    • For 0<r<31:
    • In Part I: Generate masks, there is only one lookup table for all branches and rounds. The storage cost is 28×12bits.
    • In Part II: Addition operation, there are three lookup tables in the first round. In the second and third rounds, one additional lookup table is generated respectively. The five lookup tables are shared for all the rounds and branches. The storage cost is 2×212×4+1×212×8+1×28×12+1×212×12 bits.
    • In Part III Compute A1x, there are six lookup tables for all rounds and all branches. The storage cost is 6×212×4 bits.
    • In Part IV Create a T-box, since the round key is different for each round, the T-box must be generated in each round and each branch. The storage cost is 4×212×24×32 bits.
    • In Part V: Compute X40 and Part VI: Remaining three bytes of X4, there are 32 lookup tables for one branch. After four rounds, eight lookup tables must be added.


The storage cost is (15×212×4+28×4)×8+8×212×4 bits-1.5MB. As noted above, the implementation has 276 lookup tables. The last two parts have the highest storage requirements. In Part IV: Create T-box, a T-box is generated for each key byte to keep the secret key in the only non-linear component of the algorithm. To reduce the storage requirement, the key byte can be moved from the T-box and embedded into a small lookup table. The effect is that only one T-box will exist for all rounds and all branches. Another way to reduce storage requirements is to use matrix operations instead of lookup tables in Part V: Compute X4o and Part VI: Remaining three bytes of X4. Both methods trade security for performance. The above storage cost analysis was conducted on a PC (CPU E3-1240 v5@ 3.50 GHz, Memory: 16 GB). The experiment showed that the throughput of the implementation is 119 KB/s.


It is axiomatic that a primary criterion for a block cipher is security. The three main cryptographic system attack models of interest include black-box, grey-box, and white-box attacks. Black-box is a traditional attack model in which an adversary only has access to the inputs and outputs of a cryptosystem. As an official encryption standard, SM4 has good performance in resisting classical attacks on block ciphers such as differential and linear attacks.


“Grey-box” is an attack model where the adversary can use leaked information to deploy side-channel cryptanalysis. Different leaked information can lead to different grey-box attacks. DCA (Differential computation analysis) is a powerful side-channel attack against white-box implementations of a cryptosystem. The main reason that DCA is successful is due to the nonnegligible correlation between the expected values (from the standard cipher specification) and the masked intermediate values (from the white-box implementation), which is caused by the linear imbalances in encodings used in white-box implementation. The disclosed implementation is DCA resistant because when the inputs are uniformly distributed, the outputs from the threshold implementation are uniformly distributed, so that the data correlations between SM4 and its white-box implementation are weakened.


In a white-box attack model, a practical symmetric encryption implementation cannot usually find a strict security proof. Instead of reducing the white-box security into solving a computationally infeasible mathematical problem, security of a white-box implementation is assessed by checking whether it is secure against known attacks. The security of the disclosed implementation against two well-known white-box attacks, the BGE attack and the affine equivalence attack, is evaluated below.


The earliest attack against a white-box implementation beyond grey-box attacks is the BGE attack. This attack was originally constructed to recover the round key of the Chow et al.'s white-box AES implementation. The white-box AES implementation includes several phrases (external input and output encodings are exclusive):


1. The round key is embedded into the S-box by replacing each S-box with a T-box:






T
i,j
r(x)=s(x⊕ki,jr),






T
i,j
10(x)=S(x⊕ki,j10)⊕ki,jpi11.


2. The 32×32 matrix MC representing MixColumns is split into four 32×8 matrices MCi.


3. To protect Ti,jr(x), 8×8 affine “mixing” bijection mbi is inserted before Ti,jr(x) and a 32×32 affine bijection MB is inserted after MCi. Meanwhile, concatenated non-linear permutations are used to decode/encode 4-bit input/output, and known as input decoding/output encoding. The resulting lookup table is named as Type II table and shown in FIG. 21 at 2100. To cancel the effect of MB, a lookup table takes care of the inversion. The inverse of MB is pre-multiplied by the inverse of the appropriate four mix bijections and split into four submatrices (MB−1) This lookup table is named Type III table and is shown at 2200 in FIG. 22.


5. Four bytes from one column is processed in parallel with the previous steps and combined with an XOR operation, and called Type IV table, as shown in FIG. 23 at 2300.


A BGE attack process is summarized below.


Phase 1. Combine the lookup tables of four bytes in one column of one round. The effect of MB and adjacent internal encodings are canceled out. Other encodings are left and denoted as Pi,jr and Qi,jr (2400 in FIG. 24):


Phase 2. Remove the non-linear part of the encoding Qi,jr (the same as Pi,jr).


Phase 3. Retrieve the affine part of encoding Qi,jr (the same as Pi,jr) by the affine relation between function yi(x0,x1,x2,x3)and yj(x0,x1,x2,x3).


Phase 4. During the affine recovery process, the key-dependent affine mapping Pi,jr(x)=Pi,jr(x)⊕ki,jr are obtained by using inverse of the S-box to cancel out the effect of the S-box in the function yi(x0,x1,x2,x3). This enables the key recovery by ki,jr=Pi,jr(x)⊕Pi,jr(x).


Phase 5. Use the same method to recover the round key bytes of round r+1.


The two cornerstones of the BGE attack are Phase 2 and Phase 3. The key point of Phase 3 is the existence of the affine relationship between yi(x0,x1,x2,x3) and yj(x0x1,x2,x3). To apply a BGE-like attack on the disclosed implementation, the two phases are checked. Since non-linear encodings are not used in the implementation, Phase 2 can be skipped. For Phase 3, constructing a function set should be considered. The functions are key-dependent, so T-boxes must be included.


Considering the T-box on its own. Neither ti nor si can be represented as a function of inputs (d, b′, d′). The inputs and outputs of T-box 2500 are shown in FIG. 25. The T-box 2500 of FIG. 25 is simplified by dropping some subscripts without loss of generality. tj and sj (j=0,1,2) are computed with G0,G1,G2,N0,N1 and N2, which are outputs from a threshold implementation. Based on the Property 1 of the threshold implementation, each output is independent of at least one share of each of the input variables. In other words, there is no functional relationship exists between the inputs (d, b′, d′) and each of G0,G1,G2,N0,N1 and N2. The functions to compute tj and sj use (Gi,Ni) as inputs, which means that each of tj or sj (j=0,1,2) have no functional relationship with inputs (d, b′, d′). Therefore, any combination of lookup tables which end with the T-box cannot be used to construct function set which have an affine relationship.


Lookup tables that follow the T-box are two sets of 16 tables generated in Part V above. To cancel out the effect of the threshold implementation, we can combine four T-boxes with 8×16 tables from four branches as shown at 2600 in FIG. 26. A function set {yj(x0,x1,x2,x3)=0,1,2,3} can be obtained and it is easy to prove the functions of the set have an affine relationship. However, note that x, are 12-bit inputs, which does not match the input size of s−1. Therefore, the effect of S-box in function yi(x0,x1,x2,x3) cannot be canceled out and the attack fails in Phase 4.


Now a look is taken at Affine equivalence attack resistance. For two S-box s2(x) and St(x), the purpose of the affine equivalence algorithm is to test if there exists two invertible n×n matrices Aiand 4, and two n-dimensional vectors a1 and a2 such that s2(x)=A2S1[A1(x)⊕a1]⊕a1. Several algorithms are presented to solve the affine equivalence problems in Biryukov, A., De Canniere, C., Braeken, A. et al A Toolbox for Cryptanalysis: Linear and Affine Equivalence Algorithms. Advances in Cryptology-EUROCRYPT 2003, pp. 33-50, Springer, Berlin Heidelberg, May 2003. Usually, non-linear transformations or affine mappings are used to obscure an S-box. Since the Phase 2 in a BGE attack can be used to remove the non-linear part of the transformation and keep the affine part remaining, an obscured S-box (referred to as a T-box herein) can be affinely equivalent to the original S-box. Therefore, an affine equivalence algorithm is an efficient attack against most conventional white-box implementations. However, such affine equivalence attacks do not apply to the disclosed implementation because the sizes of input and output of T-box are 12 bits and 24 bits respectively, which are different than those of standard S-box, and the matrices A1 and A2, would be non-square.


Conventional white-box implementations split SM4 into several steps and use affine transformation to protect each step. However, the disclosed implementation described above adopts a different approach. The S-box is split into two steps to thereby obscure the boundary of the S-box and help protect the key when it is embedded in the S-box. Second, the elements and operations in GF(28) are mapped to a composite field GF(24)2, which increase the difficulty to identify the original operations. Third, threshold implementation techniques are used that, weaken the correlation between the white-box implementation and standard SM4. These techniques work together to protect the SM4 under BGE-like attacks, affine equivalence attacks and DCA attacks. Table 1 below compares the disclosed implementation conventional implementations. While the disclosed implementation has larger storage requirements, it has good performance on resisting popular white-box attacks.









TABLE 1







A comparation between WB-SM4 implementations









Security











Performance

Affine













Size of

BGE
equivalence




lookup
Other
attack
attack
DCA



tables
operations
resistance
resistance
resistance

















WBSM4 *
149
KB
Matrix
No
Unknown
Unknown





multiplication


WBSM4 First
144
KB
Matrix
Unknown
No
Unknown


algorithm **


multiplication


The Disclosed
1.5
MB
None
Yes
Yes
Yes


Implementation





* Xiao, Y.; Lai, X. White-Box Cryptography and a White-Box Implementation of the SMS4 Algorithm; Shanghai Jiaotong University: Shanghai, China, pp. 24-34, 2009.


** Shi, Y., Wei, W. and He, Z., lightweight white-box symmetric encryption algorithm against node capture for WSNs. Sen-sors, 15(5), pp. 11928-11952, 2015.






The disclosed implementation is based on a composite field and a threshold implementation. The implementation works on 4-bit nibbles instead of on bytes. The threshold implementation makes the distribution of the masked values uniform and independent of the corresponding unmasked values. The operation in a smaller composite field reduce the size of the lookup tables. The disclosed implementation is resistant against traditional white-box attacks, such as the affine equivalence attacks, the BGE-like attacks and DCA-like attacks.


The above-described implantations may be accomplished by a computer or computing system 2700, as shown in FIG. 27. Computing system 27 can include computing devices 2712 having one or more processors 2714 and one or more memories storing instruction, that when executed by the processors 2714, accomplish the disclosed computations and storage. The computer system can include servers, client computing platforms, and/or external resources 2720, which may be operatively linked via one or more electronic communication links. For example, such electronic communication links may be established, at least in part, via a network such as the Internet and/or other networks. By way of non-limiting example, the computing system may include one or more remote computing devices 2718, including a desktop computer, a laptop computer, a handheld computer, a tablet computing platform, a NetBook, a Smartphone, a gaming console, a server, and/or other computing platforms. The computing devices 2712 may include communication lines, or ports to enable the exchange of information with a network and/or other computing platforms. Memories may include electronic storage devices that may comprise non-transitory storage media that electronically stores information. The electronic storage media of electronic storage may include one or both of system storage that is provided integrally (i.e., substantially non-removable) with computing devices 2712 and/or removable storage that is removably connectable to computing devices 2712 via, for example, a port (e.g., a USB port, a firewire port, etc.) or a drive (e.g., a disk drive, etc.). Electronic storage may include one or more of optically readable storage media (e.g., optical disks, etc.), magnetically readable storage media (e.g., magnetic tape, magnetic hard drive, floppy drive, etc.), electrical charge-based storage media (e.g., EEPROM, RAM, etc.), solid-state storage media (e.g., flash drive, etc.), and/or other electronically readable storage media. Electronic storage may include one or more virtual storage resources (e.g., cloud storage, a virtual private network, and/or other virtual storage resources). Electronic storage may store software algorithms, information determined by processor(s), information received from computing devices 2712, the described data structures, and/or other information and machine-readable instructions 2716 that the processors 2714 to carry out the functions as described herein.


Processor(s) may include one or more of a digital processors, an analog processor, a digital circuit designed to process information, an analog circuit designed to process information, a state machine, and/or other mechanisms for electronically processing information. Processor(s) may be configured to execute modules by software; hardware; firmware; some combination of software, hardware, and/or firmware; and/or other mechanisms for configuring processing capabilities on processor(s). As used herein, the term “module” may refer to any component or set of components that perform a specified functionality attributed to the module. This may include one or more physical processors 2714 during execution of processor readable instructions, the processor readable instructions, circuitry, hardware, storage media, or any other components.



FIG. 28 illustrates a high-level method for implementing a white-box block cipher in a software application to create a secure software application having the same functionality as the software application in accordance with the disclosed implementations. The process can be accomplished by any computing platform, such as the system shown in FIG. 27. At 2802 an isomorphism is applied between an original finite field representation and a composite field representation, and the isomorphism is used to reconstruct the cipher as operations that use only the elements of the composite field, including XOR, linear transformation and S-box. At 2804 the original S-box is decomposed into several algebraic steps and merging some of these into other parts of the cipher. At 2806, in the non-linear step of S-box, the inversion in the original finite field representation is implemented with an algorithm in the composite field representation. At 2808, a threshold implementation of m input shares and n output shares is applied to generate lookup tables for the non-linear step of S-box. At 2810, further threshold implementations are applied to different steps of the resulting cipher to generate lookup tables. At 2812 the resulting block cipher is applied to at least a portion of the software application to create the secure software application and thereby increase security of a computing platform executing the secure software application.


Although the present technology has been described in detail for the purpose of illustration based on what is currently considered to be the most practical and preferred implementations, it is to be understood that such detail is solely for that purpose and that the technology is not limited to the disclosed implementations, but, on the contrary, is intended to cover modifications and equivalent arrangements that are within the spirit and scope of the appended claims. For example, it is to be understood that the present technology contemplates that, to the extent possible, one or more features of any implementation can be combined with one or more features of any other implementation. Further, features may be added or removed from the implementations to correspond to the specific application.

Claims
  • 1. A method for implementing a block cipher algorithm in a software application to create a secure whitebox protected software application having the same functionality as the software application, the block cipher including a non-linear S-box step, and other linear algebraic steps, the method comprising: re-expressing the S-box of the block cipher algorithm to hide and protect cryptographic keys used by the algorithm by: decomposing the S-box based on its field, into a linear part including only linear steps and a non-linear part including non-linear steps and linear steps;merging the linear part of the S-box with a preceding operation and creating a first set of lookup tables;applying threshold implementations and masks to the first set of lookup tables;obfuscating the non-linear part of S-box by, for each round of the block cipher algorithm creating a T-box comprising a second set of lookup tables by; adding one of the cryptographic keys into the non-linear part of the S-Box;applying an isomorphism to map the inversion computation corresponding to the S-box into a composite field to obtain a result that use only the elements of the composite field which include XOR, linear transformation and inversion;combining a threshold implementation and masks with the last step of the inversion computation in the composite field of the S-box;mapping the result of the step of combining the threshold implementation step back into the original field of the S-box; andcreating a third set of lookup tables comprising all non-S-box operations the block cipher algorithm;applying further threshold implementations selectively to the third set of lookup tables and masks to the first, second, and third set of the lookup tables of the block cipher to generate and further obfuscate the first, second, and third set of lookup tables, whereby the inputs and outputs of all of the lookup table are obfuscated and the distribution of the masked values are uniform and independent of the original inputs; andapplying the block cipher to at least a portion of the software application to create the secure whitebox protected software application and thereby increase security of a computing platform executing the secure whitebox protected software application.
  • 2. The method of claim 1, wherein the composite field comprises two 4-bit elements.
  • 3. The method of claim 1, wherein the isomorphism is constructed from elements in GF(28) to the composite field GF (24)2 for the S-box and the threshold implementation is applied the masks.
  • 4. The method of claim 1, wherein the threshold implementation generates the masks.
  • 5. The method of claim 4, wherein the masks are associated with one another through an inverted tree structure.
  • 6. A system for implementing a block cipher algorithm in a software application to create a secure whitebox protected software application having the same functionality as the software application, the block cipher including a non-linear S-box step, and other linear algebraic steps, the system comprising: at least one processor; andat least one memory storing instructions which, when executed by the at least one processor, cause the at least one processor to carry out the method of: re-expressing the S-box of the block cipher algorithm to hide and protect cryptographic keys used by the algorithm by: decomposing the S-box based on its field, into a linear part including only linear steps and a non-linear part including non-linear steps and linear steps; merging the linear part of the S-box with a preceding operation and creating a first set of lookup tables;applying threshold implementations and masks to the first set of lookup tables;obfuscating the non-linear part of S-box by, for each round of the block cipher algorithm creating a T-box comprising a second set of lookup tables by;  adding one of the cryptographic keys into the non-linear part of the S-Box;  applying an isomorphism to map the inversion computation corresponding to the S-box into a composite field to obtain a result that use only the elements of the composite field which include XOR, linear transformation and inversion;  combining a threshold implementation and masks with the last step of the inversion computation in the composite field of the S-box;  mapping the result of the step of combining the threshold implementation step back into the original field of the S-box; andcreating a third set of lookup tables comprising all non-S-box operations the block cipher algorithm;applying further threshold implementations selectively to the third set of lookup tables and masks to the first, second, and third set of the lookup tables of the block cipher to generate and further obfuscate the first, second, and third set of lookup tables, whereby the inputs and outputs of all of the lookup table are obfuscated and the distribution of the masked values are uniform and independent of the original inputs; andapplying the block cipher to at least a portion of the software application to create the secure whitebox protected software application and thereby increase security of a computing platform executing the secure whitebox protected software application.
  • 7. The system of claim 6, wherein the composite field comprises two 4-bit elements.
  • 8. The system of claim 6, wherein the isomorphism is constructed from elements in GF(28) to the composite field GF (24)2 for the S-box and the threshold implementation is applied the masks.
  • 9. The system of claim 6, wherein the threshold implementation generates the masks.
  • 10. The system of claim 9, wherein the masks are associated with one another through an inverted tree structure.
Parent Case Info

The present application is a continuation of U.S. Ser. No. 16/368,922, filed Mar. 29, 2019, the entire content of which is incorporated.

Continuations (1)
Number Date Country
Parent 16368922 Mar 2019 US
Child 17731894 US