METHOD AND APPARATUS FOR IMPROVING PACKET ERROR RATE PERFORMANCE USING BEAMFORMING TECHNIQUES

Abstract

A method and apparatus for implementing transmit and receive beamforming in an orthogonal frequency division modulation (OFDM) multiple-in multiple-out (MIMO) system. The OFDM MIMO system includes at least one transmitter and at least one receiver. A receive information vector is determined based upon channel estimates performed at the transmitter and the receiver.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

A more detailed understanding of the invention may be had from the following description of a preferred embodiment, given by way of example and to be understood in conjunction with the accompanying drawings wherein:

FIG. 1 is a functional block diagram of a pair of WTRUs in a wireless communication system in accordance with the present invention;

FIG. 2 is a frequency domain functional block diagram of an OFDM MIMO system;

FIG. 3 is a flow diagram of a method for combining transmit and receive processing in accordance with the present invention;

FIG. 4 graphically illustrates four beamforming patterns formed by four receive antennas for four data streams utilizing a minimum mean square error (MMSE) approach;

FIG. 5 graphically illustrates four beamforming patterns formed by four transmit antennas for four data streams utilizing a singular value decomposition (SVD) approach;

FIG. 6 graphically illustrates four beamforming patterns formed by four receive antennas for four data streams utilizing an SVD approach;

FIG. 7 is a graphical representation of equal modulation data streams utilizing modulation and coding scheme (MCS) 12 and MCS 15;

FIG. 8 is a graphical representation of non-equal modulation data streams utilizing MCS 38 and MCS 41;

FIG. 9 is a graphical representation of equal modulation data streams utilizing MCS 28 and MCS 31; and

FIG. 10 is a graphical representation of non-equal modulation data streams utilizing MCS 100 and MCS 112.

Claims

1. A method for transmit and receive beamforming in an orthogonal frequency division modulation (OFDM) multiple-in multiple-out (MIMO) system comprising at least one transmitter and at least one receiver, the method comprising: performing a channel estimate at the transmitter;performing a channel estimate at the receiver; anddetermining a receive information vector based upon the channel estimates performed at the transmitter and the receiver.

2. The method of claim 1 wherein performing the channel estimate at the transmitter includes performing a singular value decomposition (SVD).

3. The method of claim 2, further comprising performing a minimum mean square error (MMSE) operation at the transmitter.

4. The method of claim 1 wherein performing the channel estimate at the receiver includes performing an SVD.

5. The method of claim 4, further comprising performing an MMSE operation at the receiver.

6. In an orthogonal frequency division modulation (OFDM) multiple-in multiple-out (MIMO) system comprising a plurality of wireless transmit/receive units (WTRUs), each WTRU comprising: a receiver;a transmitter; anda processor in communication with the receiver and the transmitter, the processor configured to perform a transmit channel estimate on a signal transmitted by the transmitter, perform a receive channel estimate on a signal received by the receiver, and determine a received information vector based upon the transmit and receive channel estimates.

7. The WTRU of claim 6 wherein the processor is further configured to perform a singular value decomposition (SVD) on the transmit and receive channel estimates.

8. The WTRU of claim 7 wherein the processor is further configured to perform a minimum mean square error (MMSE) on the transmit and receive channel estimates.

9. The WTRU of claim 6, further comprising at least one antenna in communication with the transmitter and the receiver, wherein the antenna is configured to transmit a beamforming pattern received from the transmitter.

10. The WTRU of claim 9 wherein the antenna is configured to receive a beamforming pattern transmitted from another WTRU in the OFDM MIMO system.

11. The WTRU of claim 10 wherein the antenna includes a plurality of individual antennas.

12. The WTRU of claim 11 wherein the plurality of individual antennas are aimed at a plurality of angles.

13. The WTRU of claim 11 wherein the antenna includes four (4) individual antennas.

14. The WTRU of claim 13 wherein the four antennas are transmit antennas.

15. The WTRU of claim 14 wherein a first transmit antenna is aimed at a 150 degree angle, a second transmit antenna is aimed at a 120 degree angle, a third transmit antenna is aimed at an 80 degree angle, and a fourth transmit antenna is aimed at a 45 degree angle.

16. The WTRU of claim 13 wherein the four antennas are receive antennas.

17. The WTRU of claim 16 wherein a first receive antenna is aimed at a 160/25 degree angle, a second receive antenna is aimed at a 126 degree angle, a third receive antenna is aimed at a 105/55 degree angle, and a fourth receive antenna is aimed at a 78 degree angle.

18. The WTRU of claim 6 wherein the processor employs any one of the following modulation and coding schemes (MCS) for transmission: MCS 12, MCS 15, MCS 38, MCS 41, MCS 28, MCS 31, MCS 100, and MCS 112.

19. The WTRU of claim 18 wherein the processor employs any one of the following modulation schemes: Quadrature Amplitude Modulation (QAM) and Quadrature Phase Shift Keying (QPSK).

20. The WTRU of claim 19 wherein QAM includes 16-QAM, 64-QAM, or 256-QAM.

21. The WTRU of claim 20 wherein the processor employs any one of the following coding rates: ¾ and ⅚.

22. The WTRU of claim 21 wherein the processor employs any one of the following data rates: 78 MBPS, 130 MBPS, 117 MBPS, 156 MBPS, 195 MBPS, and 260 MBPS.

23. The WTRU of claim 22 wherein MCS 12 includes 16-QAM modulation, ¾ coding rate, and a data rate of 78 MBPS.

24. The WTRU of claim 22 wherein MCS 15 includes 64-QAM modulation, ⅚ coding rate, and a data rate of 130 MBPS.

25. The WTRU of claim 22 wherein MCS 38 includes 64-QAM modulation, ¾ coding rate, and a data rate of 78 MBPS.

26. The WTRU of claim 22 MCS 38 includes QPSK modulation, ¾ coding rate, and a data rate of 78 MBPS.

27. The WTRU of claim 22 wherein MCS 41 includes 256-QAM modulation, ¾ coding rate, and a data rate of 117 MBPS.

28. The WTRU of claim 22 wherein MCS 41 includes 16-QAM modulation, ¾ coding rate, and a data rate of 117 MBPS.

29. The WTRU of claim 22 wherein MCS 28 includes 16-QAM modulation, ¾ coding rate, and a data rate of 156 MBPS.

30. The WTRU of claim 22 wherein MCS 31 includes 64-QAM modulation, ⅚ coding rate, and a data rate of 260 MBPS.

31. The WTRU of claim 22 wherein MCS 100 includes 64-QAM modulation, ¾ coding rate, and a data rate of 156 MBPS.

32. The WTRU of claim 22 wherein MCS 100 includes 16-QAM modulation, ¾ coding rate, and a data rate of 156 MBPS.

33. The WTRU of claim 22 wherein MCS 100 includes QPSK modulation, ¾ coding rate, and a data rate of 156 MBPS.

34. The WTRU of claim 22 wherein MCS 112 includes 64-QAM modulation, ¾ coding rate, and a data rate of 195 MBPS.

35. The WTRU of claim 22 wherein MCS 112 includes 256-QAM modulation, ¾ coding rate, and a data rate of 195 MBPS.

36. The WTRU of claim 22 wherein MCS 112 includes 16-QAM modulation, ¾ coding rate, and a data rate of 195 MBPS.

37. The WTRU of claim 22 wherein MCS 112 includes QPSK modulation, ¾ coding rate, and a data rate of 195 MBPS.

38. In an orthogonal frequency division modulation (OFDM) multiple-in multiple-out (MIMO) system comprising a plurality of wireless transmit/receive units (WTRUs), each WTRU including an integrated circuit (IC), the IC comprising: a receiver;a transmitter; anda processor in communication with the receiver and the transmitter, the processor configured to perform a transmit channel estimate on a signal transmitted by the transmitter, perform a receive channel estimate on a signal received by the receiver, and determine a received information vector based upon the transmit and receive channel estimates.

39. The IC of claim 38 wherein the processor is further configured to perform a singular value decomposition (SVD) on the transmit and receive channel estimates.

40. The IC of claim 39 wherein the processor is further configured to perform a minimum mean square error (MMSE) on the transmit and receive channel estimates.