The present disclosure relates to wireless communications, and specifically to a demodulation reference signal design.
In wireless communications, a transmitter modulates a sequence of information bits and constructs complex-valued symbols to be transmitted to a receiver through a wireless channel. The wireless channel can change the transmitted symbols before the receiver receives the transmitted symbols according to channel coefficients. However, the channel coefficients themselves can change over time, making it more challenging for the receiver to demodulate the received symbols. To estimate the channel coefficients, reference signals can be used between the transmitter and the receiver.
Aspects of the disclosure provide a method for wireless communication. The method includes determining, by processing circuitry of an apparatus, one or more antenna ports of the apparatus for data transmission. The method further includes generating, by the processing circuitry of the apparatus and for each of the one or more antenna ports, a respective demodulation reference signal (DMRS) based on one of a first DMRS pattern, a second DMRS pattern, a third DMRS pattern, and a fourth DMRS pattern. The first DMRS pattern includes four code division multiplexing (CDM) groups each comprising a length-2 orthogonal cover code (OCC), the second DMRS pattern includes six CDM groups each comprising a length-2 OCC, the third DMRS pattern includes three CDM groups each comprising a length-4 OCC, and the fourth DMRS pattern includes two CDM groups each comprising a length-6 OCC. The method includes transmitting, by the one or more antenna ports, the one or more DMRSs.
According to embodiments of the disclosure, the length-2 OCC of the first DMRS pattern is repetitive at an interval of eight resource elements (REs) in frequency domain. In an embodiment, two REs allocated to the length-2 OCC of the first DMRS pattern are non-contiguous in frequency domain. For example, the two REs allocated to the length-2 OCC of the first DMRS pattern are apart from two REs in frequency domain. Relative to one of the four CDM groups of the first DMRS pattern, other three CDM groups are shifted in frequency domain by one RE, four REs, and five REs, respectively.
According to embodiments of the disclosure, the length-2 OCC of the second DMRS pattern is repetitive at an interval of twelve REs in frequency domain. In an embodiment, two REs allocated to the length-2 OCC of the second DMRS pattern are contiguous in frequency domain. Relative to one of the six CDM groups of the second DMRS pattern, other five CDM groups are shifted in frequency domain by two REs, four REs, six REs, eight REs, and ten REs, respectively.
According to embodiments of the disclosure, the length-4 OCC of the third DMRS pattern is repetitive at an interval of twelve REs in frequency domain. In an embodiment, four REs allocated to the length-4 OCC of the third DMRS pattern are contiguous in frequency domain. Relative to one of the three CDM groups of the third DMRS pattern, other two CDM groups are shifted in frequency domain by four REs and eight REs, respectively. In an embodiment, every two adjacent REs of four REs allocated to the length-4 OCC of the third DMRS pattern are apart from three REs in frequency domain. Relative to one of the three CDM groups of the third DMRS pattern, other two CDM groups are shifted in frequency domain by one RE and two REs, respectively. In an embodiment, two first REs that are contiguous in frequency domain and two second REs that are contiguous in frequency domain are allocated to the length-4 OCC of the third DMRS pattern. The two first REs and the two second REs are apart from six REs in frequency domain. Relative to one of the three CDM groups of the third DMRS pattern, other two CDM groups are shifted in frequency domain by two REs and four REs, respectively.
According to embodiments of the disclosure, the length-6 OCC of the fourth DMRS pattern is repetitive at an interval of twelve REs in frequency domain. In an embodiment, every two adjacent REs of six REs allocated to the length-6 OCC of the fourth DMRS pattern are apart from two REs in frequency domain. Relative to one of the two CDM groups of the fourth DMRS pattern, the other CDM group is shifted in frequency domain by one RE.
Aspects of the disclosure provide an apparatus for wireless communication. Processing circuitry of the apparatus determines one or more antenna ports of the apparatus for data transmission. The processing circuitry generates, for each of the one or more antenna ports, a respective demodulation reference signal (DMRS) based on one of a first DMRS pattern, a second DMRS pattern, a third DMRS pattern, and a fourth DMRS pattern. The one or more antenna ports transmit the one or more DMRSs. The first DMRS pattern includes four code division multiplexing (CDM) groups each comprising a length-2 orthogonal cover code (OCC), the second DMRS pattern includes six CDM groups each comprising a length-2 OCC, the third DMRS pattern includes three CDM groups each comprising a length-4 OCC, and the fourth DMRS pattern includes two CDM groups each comprising a length-6 OCC.
Aspects of the disclosure provide a non-transitory computer-readable medium storing instructions which when executed by an apparatus cause the apparatus to perform any one or a combination of the above methods.
Various embodiments of this disclosure that are proposed as examples will be described in detail with reference to the following figures, wherein like numerals reference like elements, and wherein:
The detailed description set forth below in connection with the appended drawings is intended as a description of various configurations and is not intended to represent the only configurations in which the concepts described herein may be practiced. The detailed description includes specific details for the purpose of providing an understanding of various concepts. However, these concepts may be practiced without these specific details.
Several aspects of telecommunication systems will now be presented with reference to various apparatuses and methods. These apparatuses and methods will be described in the following detailed description and illustrated in the accompanying drawings by various blocks, components, circuits, processes, algorithms, etc. (collectively referred to as “elements”). These elements may be implemented using electronic hardware, computer software, or any combination thereof. Whether such elements are implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system.
In wireless communications, a transmitter modulates a sequence of information bits and constructs complex-valued symbols to be transmitted to a receiver through a wireless channel. The wireless channel can change the transmitted symbols before the receiver receives the transmitted symbols according to channel coefficients. However, the channel coefficients themselves can change over time, making it more challenging for the receiver to demodulate the received symbols.
To estimate the channel coefficients, reference signals can be used between the transmitter and the receiver. The reference signals are predefined signals that are known to both the transmitter and the receiver. Demodulation reference signal (DMRS) is one type of the reference signals that can help the receiver demodulate the received symbols by enabling high-quality channel estimation. DMRS can be interleaved with and identically pre-coded as data.
After the data demodulation, the receiver 120 can attempt to decode the data, and then send feedback to the transmitter 110 about the decoding process, for example, in a form of a hybrid automatic repeat request (HARQ) message.
It can be seen that DMRS is very crucial in the channel estimation. In absence of DMRS, the demodulation performance of the receiver 120 can be significantly reduced. However, resource elements (REs) should be assigned to DMRS, and thus an overhead level of DMRS should be considered for a DMRS design. A higher overhead level can achieve a higher channel estimation quality. Accordingly, a balance between the DMRS overhead and the channel estimation quality is important for a good DMRS design.
In 5G NR, two types of DMRS are defined and referred to as Type 1 and Type 2. These two types have different patterns of assigned REs. The different patterns can result in different overhead levels and different performances of DMRS-based channel estimation.
In TS 28.211 section 7.4.1.1.1, for physical downlink shared channel (PDSCH), a DMRS sequence can be defined as
The sequence r(n) can be scaled by a factor of βPDSCHDMRS to conform with the transmission power specified in TS 38.214 and mapped to resource elements (k,l)p,u according to Eq. 1-Eq. 5.
where k and l represent frequency domain location and time domain location, respectively. wf(k′), wt(l′), and Δ are given by Tables 7.4.1.1.2-1 and 7.4.1.1.2-2 in TS 38.211, which are shown in
It is noted that in all RE mapping pattern figures (e.g.,
Resource mapping for Type 1 DMRS can be based on Eq. 1-Eq. 5 and
Resource mapping for Type 2 DMRS can be based on Eq. 1-Eq. 5 and
Compared to Type 1 (or Type 2) single-symbol DMRS pattern, Type 1 (or Type 2) double-symbol DMRS pattern can occupy two adjacent symbols. The first symbol for a port in Type 1 (or Type 2) double-symbol DMRS pattern can be the same as the corresponding symbol for the port in Type 1 (or Type 2) single-symbol DMRS pattern, and the second symbol (l′=1) for the port in Type 1 (or Type 2) double-symbol DMRS pattern can be either a repetition or a reversion of the first symbol (l′=0) for the port in Type 1 (or Type 2) double-symbol DMRS pattern. For example, in Type 1 double-symbol DMRS pattern, the second symbol of each of ports 1000-1003 is a repetition of the first symbol of the respective port, and the second symbol of each of ports 1004-1007 is a reversion of the first symbol of the respective port. Accordingly, Type 1 (or Type 2) double-symbol DMRS pattern can support a twice number of ports that Type 1 (or Type 2) single-symbol DMRS pattern can support.
It is noted that DMRSs of different ports are orthogonal, and the orthogonality of these DMRSs can be achieved in the time domain, frequency domain, or code domain. For example, in
DMRS can be generated for each data port, and a number of realizable DMRS ports can limit a number of layers that can be spatially multiplexed. This is especially crucial for multi-user, multiple input, and multiple output (MU-MIMO) settings where a number of user equipments (UEs) that can be simultaneously served can be limited by the number of DMRS ports available to a network.
As described above, legacy Type 1 and Type 2 DMRS patterns allow simultaneous DMRS transmission from up to 8 and 12 ports, respectively. Allowing only 12 simultaneous ports to carry DMRS at any given time restricts an ability to exploit spatial multiplexing opportunities, which can allow for more than 12 data streams to be used. Accordingly, this disclosure provides various DMRS patterns to increase the maximum number of orthogonal DMRS ports.
According to embodiments of the disclosure, Type 1 and Type 2 DMRS patterns can be extended by making the RE assignment sparser in frequency domain. For example, the frequency location k can be defined as
where k′=0, 1.
It can be seen that extended Type 1 single-symbol DMRS pattern can support up to 8 ports, compared to Type 1 single-symbol DMRS pattern which can only support up to 4 ports, as shown in
It can be seen that extended Type 2 single-symbol DMRS pattern can support up to 12 ports, compared to Type 2 single-symbol DMRS pattern which can only support up to 6 ports, as shown in
It is noted that, as shown in
According to embodiments of the disclosure, compared to legacy types, larger code division multiplexing (CDM) groups can be used in DMRS patterns so that more ports can be multiplexed in code domain. For example, as shown in
Instead, Type 1 based length-6 OCC with complex-values cover code can solve this issue and make the DMRS pattern identical for all RBs. A second DMRS pattern 520 is based on tripling the length of an OCC in legacy Type 1DMRS pattern so that each OCC in the second DMRS pattern 502 has a length of 6 and every two adjacent OCCs are apart from 12 REs. In the second DMRS pattern 520, each OCC can have complex values.
Type 2 based length-4 OCC still results in uniform pattern across all RBs. A third DMRS pattern 530 is based on doubling a length of an OCC in legacy Type 2 DMRS pattern so that each OCC in the third DMRS pattern 530 has a length of 4 and every two adjacent OCCs are apart from 12 REs.
In an embodiment, a DMRS pattern with a length-4 OCC in frequency domain can be generated based on k=12n+k′+Δ, where k′∈{0, 1, 2, 3}. The length in time domain can be the same as legacy DMRS patterns. That is, l=
In an embodiment, a DMRS pattern with a length-4 OCC in frequency domain can be generated based on k=12n+3k′+4, where k′ε{0, 1, 2, 3}. The length in time domain can be the same as legacy DMRS patterns. That is, l=
In an embodiment, a DMRS pattern with a length-4 OCC in frequency domain can be generated based on k=12n+k′+Δ, where k′ε{0, 1, 6, 7}. The length in time domain can be the same as legacy DMRS patterns. That is, l=
In an embodiment, a DMRS pattern with a length-6 OCC in frequency domain can be generated based on k=12n+2k′+Δ, where k′ε{0, 1, 2, 3, 4, 5}. The length in time domain can be the same as legacy DMRS patterns. That is, l=
It can be seen that the single-symbol and double-symbol DMRS patterns based on the length-6 OCC in frequency domain can support up to 8 and 16 orthogonal ports, respectively.
A length of OCC can also be increased in time domain to maximize the number of orthogonal ports. To allow a longer OCC in time domain, additional DMRS symbols can be configured. For example, to double the number of DMRS ports, the time-domain OCC length should at least be doubled. This can be achieved by configuring double-symbol DMRS with one additional double-symbol or single-symbol DMRS with three additional DMRS symbols.
According to embodiments of the disclosure, legacy Type 1 and Type 2 DMRS patterns can be modified by making the RE assignment longer in time domain. The RE mapping can still be based on Eq. 1-Eq. 3, while Eq. 4 is replaced with the following equation:
where l′ε{0, 1, 2, 3} for both single-symbol DMRS and for double-symbol DMRS, as well. Note here that the time-based length-increased OCC code can extend in time domain over 4 single-symbol DMRS symbols (k,
It is noted that the 4 single-symbol DMRS symbols may be or may not be contiguous in time domain. That is, there may or may not be a gap between any two of
This disclosure presents various DMRS patterns that can increase a system capacity compared to the legacy DMRS patterns by increasing a number of orthogonal DMRS ports. More orthogonal DMRS ports can enable the transmission of a larger number of data streams, and hence, can better exploit the spatial multiplexing opportunities in the wireless channel environment. All presented DMRS patterns can coexist with the legacy DMRS designs. The maximum overhead levels of the presented DMRS patterns are unchanged compared to the legacy DMRS designs. Different DMRS patterns can be suited for different wireless channel conditions, such as high or low delay spread or doppler spread.
At step S1310, the process 1300 determines, by processing circuitry 1410 of the apparatus 1400, one or more antenna ports (e.g., in antenna panels 1440 and/or 1450) of the apparatus 1400 for data transmission. Then, the process proceeds to step S1320.
At step S1320, the process 1300 generates, by the processing circuitry 1410 of the apparatus 1400 and for each of the one or more antenna ports, a respective DMRS based on one of a first DMRS pattern, a second DMRS pattern, a third DMRS pattern, and a fourth DMRS pattern. The first DMRS pattern includes four CDM groups each comprising a length-2 OCC (e.g., as shown in
At step S1330, the process 1300 transmits, by the one or more antenna ports, the one or more DMRSs. Then, the process 1300 terminates.
According to embodiments of the disclosure, the length-2 OCC of the first DMRS pattern is repetitive at an interval of eight resource elements (REs) in frequency domain (e.g., as shown in
According to embodiments of the disclosure, the length-2 OCC of the second DMRS pattern is repetitive at an interval of twelve REs in frequency domain (e.g., as shown in
According to embodiments of the disclosure, the length-4 OCC of the third DMRS pattern is repetitive at an interval of twelve REs in frequency domain (e.g., as shown in
According to embodiments of the disclosure, the length-6 OCC of the fourth DMRS pattern is repetitive at an interval of twelve REs in frequency domain (e.g., as shown in
In various examples, the processing circuitry 1410 can include circuitry configured to perform the functions and processes described herein in combination with software or without software. In various examples, the processing circuitry 1410 can be a digital signal processor (DSP), an application specific integrated circuit (ASIC), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), digitally enhanced circuits, or comparable device or a combination thereof.
In some other examples, the processing circuitry 1410 can be a central processing unit (CPU) configured to execute program instructions to perform various functions and processes described herein. Accordingly, the memory 1420 can be configured to store program instructions. The processing circuitry 1410, when executing the program instructions, can perform the functions and processes. The memory 1420 can further store other programs or data, such as operating systems, application programs, and the like. The memory 1420 can include a read only memory (ROM), a random-access memory (RAM), a flash memory, a solid-state memory, a hard disk drive, an optical disk drive, and the like.
The RF module 1430 receives a processed data signal from the processing circuitry 1410 and converts the data signal to beamforming wireless signals that are then transmitted via the antenna panels 1440 and/or 1450, or vice versa. The RF module 1430 can include a digital to analog convertor (DAC), an analog to digital converter (ADC), a frequency up convertor, a frequency down converter, filters and amplifiers for reception and transmission operations. The RF module 1430 can include multi-antenna circuitry for beamforming operations. For example, the multi-antenna circuitry can include an uplink spatial filter circuit, and a downlink spatial filter circuit for shifting analog signal phases or scaling analog signal amplitudes. Each of the antenna panels 1440 and 1450 can include one or more antenna arrays.
In an embodiment, part of all the antenna panels 1440/1450 and part or all functions of the RF module 1430 are implemented as one or more TRPs (transmission and reception points), and the remaining functions of the apparatus 1400 are implemented as a BS. Accordingly, the TRPs can be co-located with such a BS, or can be deployed away from the BS.
The apparatus 1400 can optionally include other components, such as input and output devices, additional or signal processing circuitry, and the like. Accordingly, the apparatus 1400 may be capable of performing other additional functions, such as executing application programs, and processing alternative communication protocols.
The processes and functions described herein can be implemented as a computer program which, when executed by one or more processors, can cause the one or more processors to perform the respective processes and functions. The computer program may be stored or distributed on a suitable medium, such as an optical storage medium or a solid-state medium supplied together with, or as part of, other hardware. The computer program may also be distributed in other forms, such as via the Internet or other wired or wireless telecommunication systems. For example, the computer program can be obtained and loaded into an apparatus, including obtaining the computer program through physical medium or distributed system, including, for example, from a server connected to the Internet.
The computer program may be accessible from a computer-readable medium providing program instructions for use by or in connection with a computer or any instruction execution system. The computer readable medium may include any apparatus that stores, communicates, propagates, or transports the computer program for use by or in connection with an instruction execution system, apparatus, or device. The computer-readable medium can be magnetic, optical, electronic, electromagnetic, infrared, or semiconductor system (or apparatus or device) or a propagation medium. The computer-readable medium may include a computer-readable non-transitory storage medium such as a semiconductor or solid-state memory, magnetic tape, a removable computer diskette, a random-access memory (RAM), a read-only memory (ROM), a magnetic disk and an optical disk, and the like. The computer-readable non-transitory storage medium can include all types of computer readable medium, including magnetic storage medium, optical storage medium, flash medium, and solid-state storage medium.
It is understood that the specific order or hierarchy of blocks in the processes/flowcharts disclosed is an illustration of exemplary approaches. Based upon design preferences, it is understood that the specific order or hierarchy of blocks in the processes/flowcharts may be rearranged. Further, some blocks may be combined or omitted. The accompanying method claims present elements of the various blocks in a sample order and are not meant to be limited to the specific order or hierarchy presented.
While this disclosure has described several exemplary embodiments, there are alterations, permutations, and various substitute equivalents, which fall within the scope of the disclosure. It will thus be appreciated that those skilled in the art will be able to devise numerous systems and methods which, although not explicitly shown or described herein, embody the principles of the disclosure and are thus within the spirit and scope thereof.
The previous description is provided to enable any person skilled in the art to practice the various aspects described herein. Various modifications to these aspects will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other aspects. Thus, the claims are not intended to be limited to the aspects shown herein but is to be accorded the full scope consistent with the language claims, wherein reference to an element in the singular is not intended to mean “one and only one” unless specifically so stated, but rather “one or more.” The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects. Unless specifically stated otherwise, the term “some” refers to one or more. Combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” include any combination of A, B, and/or C, and may include multiples of A, multiples of B, or multiples of C. Specifically, combinations such as “at least one of A, B, or C,” “one or more of A, B, or C,” “at least one of A, B, and C,” “one or more of A, B, and C,” and “A, B, C, or any combination thereof” may be A only, B only, C only, A and B, A and C, B and C, or A and B and C, where any such combinations may contain one or more member or members of A, B, or C. All structural and functional equivalents to the elements of the various aspects described throughout this disclosure that are known or later come to be known to those of ordinary skill in the art are expressly incorporated herein by reference and are intended to be encompassed by the claims. Moreover, nothing disclosed herein is intended to be dedicated to the public regardless of whether such disclosure is explicitly recited in the claims. The words “module,” “mechanism,” “element,” “device,” and the like may not be a substitute for the word “means.” As such, no claim element is to be construed as a means plus function unless the element is expressly recited using the phrase “means for.”
This present disclosure claims the benefits of U.S. Provisional Application No. 63/330,822, filed on Apr. 14, 2022, and U.S. Provisional Application No. 63/370,807, filed on Aug. 9, 2022. The entire disclosures of the prior applications are incorporated herein by reference in their entireties.
Filing Document | Filing Date | Country | Kind |
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PCT/CN2023/087893 | 4/12/2023 | WO |
Number | Date | Country | |
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63330822 | Apr 2022 | US | |
63370807 | Aug 2022 | US |