Patent Application
20180115328
The present application generally relates to wide bandwidth radio system designed to adapt to various global radio standards and, more particularly, to a cellular radio architecture that employs a combination of a single circulator, programmable band-pass sampling radio frequency (RF) front-end and optimized digital baseband that is capable of supporting all current cellular wireless access protocol frequency bands. The system and method incorporate a data converter that can simultaneously equalize and noise shape the incoming signals by incorporating a channel equalizer into a sigma delta data converter.
Traditional cellular telephones employ different modes and bands of operation that have been supported in hardware by having multiple disparate radio front-end and baseband processing chips integrated into one platform, such as tri-band or quad-band user handsets supporting global system for mobile communications (GSM), general packet radio service (GPRS), etc. Known cellular receivers have integrated some of the antenna and baseband data paths, but nevertheless the current state of the art for mass mobile and vehicular radio deployment remains a multiple static channelizing approach. Such a static architecture is critically dependent on narrow-band filters, duplexers and standard-specific down-conversion to intermediate-frequency (IF) stages. The main disadvantage of this static, channelized approach is its inflexibility with regards to the changing standards and modes of operation. As the cellular communications industry has evolved from 2G, 3G, 4G and beyond, each new waveform and mode has required a redesign of the RF front-end of the receiver as well as expanding the baseband chip set capability, thus necessitating a new handset. For automotive applications, this inflexibility to support emerging uses is prohibitively expensive and a nuisance to the end-user.
Providing reliable automotive wireless access is challenging from an automobile manufacturers point of view because cellular connectivity methods and architectures vary across the globe. Further, the standards and technologies are ever changing and typically have an evolution cycle that is several times faster than the average service life of a vehicle. More particularly, current RF front-end architectures for vehicle radios are designed for specific RF frequency bands. Dedicated hardware tuned at the proper frequency needs to be installed on the radio platform for the particular frequency band that the radio is intended to operate at. Thus, if cellular providers change their particular frequency band, the particular vehicle that the previous band was tuned for, which may have a life of 15 to 20 years, may not operate efficiently at the new band. Hence, this requires automobile manufactures to maintain a myriad of radio platforms, components and suppliers to support each deployed standard, and to provide a path to upgradability as the cellular landscape changes, which is an expensive and complex proposition.
Known software-defined radio architectures have typically focused on seamless baseband operations to support multiple waveforms and have assumed similar down-conversion-to-baseband specifications. Similarly, for the transmitter side, parallel power amplifier chains for different frequency bands have typically been used for supporting different waveform standards. Thus, receiver front-end architectures have typically been straight forward direct sampling or one-stage mixing methods with modest performance specifications. In particular, no prior application has required a greater than 110 dB dynamic range with associated IP3 factor and power handling requirements precisely because such performance needs have not been realizable with complementary metal oxide semiconductor (CMOS) analog technologies. It has not been obvious how to achieve these metrics using existing architectures for CMOS devices, thus the dynamic range, sensitivity and multi-mode interleaving for both the multi-bit analog-to-digital converter (ADC) and the digital-to-analog converter (DAC) is a substantially more difficult problem.
Delta-sigma modulators are becoming more prevalent in digital receivers because, in addition to providing wideband high dynamic range operation, the modulators have many tunable parameters making them a good candidate for reconfigurable systems. In particular, delta-sigma modulators include a software tunable filter for noise shaping an incoming RF signal. It would be desirable to utilize the software programmable nature of the delta-sigma modulator to further reduce the processing load of a system digital signal processor.
The present disclosure describes a method for configuring a delta signal modulator comprising receiving a first RF signal, configuring the delta sigma modulator in response to the first RF signal, determining a first filter parameter in response to the configuring of the delta sigma modulator, receiving a second RF signal, configuring the delta sigma modulator in response to the first filter parameter, and processing the second RF signal.
Another aspect of the present disclosure describes an apparatus comprising an antenna for receiving a first RF signal and a second RF signal, a memory for storing a filter parameter, a delta signal modulator for filtering the first RF signal and the second RF signal in response to the filter parameter, and a processor for tuning the delta sigma modulator in response to the first RF signal, for determining a filter parameter in response to the tuning the delta signal modulator in response to the first RF signal, and for configuring the delta signal modulator in response to the filter parameter to process the second RF signal.
Another aspect of the present disclosure describes a method for equalizing an RF receiver comprising receiving a pilot signal having a known frequency response, configuring a delta sigma modulator in order to receive the pilot signal, generating a filter parameter in response to the configuring of the delta sigma modulator to receive the pilot signal, receiving an RF signal, determining an RF signal characteristic, configuring the delta sigma modulator using the filter parameter in response to the RF signal characteristic, and processing the RF signal.
Additional features of the present invention will become apparent from the following description and appended claims, taken in conjunction with the accompanying drawings.
The following discussion of the embodiments of the invention directed to a cellular radio architecture is merely exemplary in nature, and is in no way intended to limit the invention or its applications or uses. For example, the radio architecture of the invention is described as having application for a vehicle. However, as will be appreciated by those skilled in the art, the radio architecture may have applications other than automotive applications.
The cellular radio architectures discussed herein are applicable to more than cellular wireless technologies, for example, WiFi (IEEE 802.11) technologies. Further, the cellular radio architectures are presented as a fully duplexed wireless system, i.e., one that both transmits and receives. For wireless services that are receive only, such as global positioning system (GPS), global navigation satellite system (GNSS) and various entertainment radios, such as AM/FM, digital audio broadcasting (DAB), SiriusXM, etc., only the receiver design discussed herein would be required. Also, the described radio architecture design will enable one radio hardware design to function globally, accommodating various global wireless standards through software updates. It will also enable longer useful lifespan of the radio hardware design by enabling the radio to adapt to new wireless standards when they are deployed in the market. For example, 4G radio technology developments and frequency assignments are very dynamic. Thus, radio hardware deployed in the market may become obsolete after just one or two years. For applications, such as in the automotive domain, the lifespan can exceed ten years. This invention enables a fixed hardware platform to be updateable through software updates, thus extending the useful lifespan and global reuse of the hardware.
The architecture 30 also includes a front-end transceiver module 44 that is behind the multiplexer 34 and includes a receiver module 46 that processes the receive signals and a transmitter module 48 that processes the transmit signals. The receiver module 46 includes three receiver channels 50, one for each of the signal paths through the multiplexer 34, where a different one of the receiver channels 50 is connected to a different one of the circulators 38, as shown. Each of the receiver channels 50 includes a delta-sigma modulator 52 that receives the analog signal at the particular frequency band and generates a representative stream of digital data using an interleaving process in connection with a number of N-bit quantizer circuits operating at a very high clock rate, as will be discussed in detail below. As will further be discussed, the delta-sigma modulator 52 compares the difference between the receive signal and a feedback signal to generate an error signal that is representative of the digital data being received. The digital data bits are provided to a digital signal processor (DSP) 54 that extracts the digital data stream. A digital baseband processor (DBP) 56 receives and operates on the digital data stream for further signal processing in a manner well understood by those skilled in the art. The transmitter module 48 receives digital data to be transmitted from the processor 56. The module 48 includes a transmitter circuit 62 having a delta-sigma modulator that converts the digital data from the digital baseband processor 56 to an analog signal. The analog signal is filtered by a tunable bandpass filter (BPF) 60 to remove out of band emissions and sent to a switch 66 that directs the signal to a selected power amplifier 64 optimized for the transmitted signal frequency band. In this embodiment, three signal paths have been selected, however, the transmitter module 48 could be implemented using any number of signal paths. The amplified signal is sent to the particular circulator 38 in the multiplexer 34 depending on which frequency is being transmitted.
As will become apparent from the discussion below, the configuration of the architecture 30 provides software programmable capabilities through high performance delta-sigma modulators that provide optimized performance in the signal band of interest and that can be tuned across a broad range of carrier frequencies. The architecture 30 meets current cellular wireless access protocols across the 0.4-2.6 GHz frequency range by dividing the frequency range into three non-continuous bands. However, it is noted that other combinations of signal paths and bandwidth are of course possible. The multiplexer 34 implements frequency domain de-multiplexing by passing the RF carrier received at the antenna structure 32 into one of the three signal paths. Conversely, the transmit signal is multiplexed through the multiplexer 34 onto the antenna structure 32. For vehicular wireless access applications, such a low-cost integrated device is desirable to reduce parts cost, complexity, obsolescence and enable seamless deployment across the globe.
The delta-sigma modulators 52 may be positioned near the antenna structure 32 so as to directly convert the RF receive signals to bits in the receiver module 46 and bits to an RF signal in the transmitter module 48. The main benefit of using the delta-sigma modulators 52 in the receiver channels 50 is to allow a variable signal capture bandwidth and variable center frequency. This is possible because the architecture 30 enables software manipulation of the modulator filter coefficients to vary the signal bandwidth and tune the filter characteristics across the RF band, as will be discussed below.
The architecture 30 allows the ability to vary signal capture bandwidth, which can be exploited to enable the reception of continuous carrier aggregated waveforms without the need for additional hardware. Carrier aggregation is a technique by which the data bandwidths associated with multiple carriers for normally independent channels are combined for a single user to provide much greater data rates than a single carrier. Together with MIMO, this feature is a requirement in modern 4G standards and is enabled by the orthogonal frequency division multiplexing (OFDM) family of waveforms that allow efficient spectral usage.
The architecture 30 through the delta-sigma modulators 52 can handle the situation for precise carrier aggregation scenarios and band combinations through software tuning of the bandpass bandwidth, and thus enables a multi-segment capture capability. Dynamic range decreases for wider bandwidths where more noise is admitted into the sampling bandpass. However, it is assumed that the carrier aggregation typically makes sense when the user has a good signal-to-noise ratio, and not cell boundary edges when connectivity itself may be marginal. Note that the inter-band carrier aggregation is automatically handled by the architecture 30 since the multiplexer 34 feeds independent modulators in the channels 50.
The circulators 38 route the transmit signals from the transmitter module 48 to the antenna structure 32 and also provide isolation between the high power transmit signals and the receiver module 46. Although the circulators 38 provide significant signal isolation, there is some port-to-port leakage within the circulator 38 that provides a signal path between the transmitter module 48 and the receiver module 46. A second undesired signal path occurs due to reflections from the antenna structure 32, and possible other components in the transceiver. As a result, a portion of the transmit signal will be reflected from the antenna structure 32 due to a mismatch between the transmission line impedance and the antenna's input impedance. This reflected energy follows the same signal path as the incoming desired signal back to the receiver module 46.
The architecture 30 is also flexible to accommodate other wireless communications protocols. For example, a pair of switches 40 and 42 can be provided that are controlled by the DBP 56 to direct the receive and transmit signals through dedicated fixed RF devices 58, such as a global system for mobile communications (GSM) RF front-end module or a WiFi front-end module. In this embodiment, some select signal paths are implemented via conventional RF devices.
Delta-sigma modulators are a well known class of devices for implementing analog-to-digital conversion. The fundamental properties that are exploited are oversampling and error feedback (delta) that is accumulated (sigma) to convert the desired signal into a pulse modulated stream that can subsequently be filtered to read off the digital values, while effectively reducing the noise via shaping. The key limitation of known delta-sigma modulators is the quantization noise in the pulse conversion process. Delta-sigma converters require large oversampling ratios in order to produce a sufficient number of bit-stream pulses for a given input. In direct-conversion schemes, the sampling ratio is greater than four times the RF carrier frequency to simplify digital filtering. Thus, required multi-GHz sampling rates have limited the use of delta-sigma modulators in higher frequency applications. Another way to reduce noise has been to use higher order delta-sigma modulators. However, while first order canonical delta-sigma architectures are stable, higher orders can be unstable, especially given the tolerances at higher frequencies. For these reasons, state of the art higher order delta-sigma modulators have been limited to audio frequency ranges, i.e., time interleaved delta-sigma modulators, for use in audio applications or specialized interleaving at high frequencies.
The filter characteristics of a Delta-Sigma modulator may effectively be modified in order to compensate for Doppler shift. Doppler shift occurs when the transmitter of a signal is moving in relation to the receiver. The relative movement shifts the frequency of the signal, making it different at the receiver than at the transmitter. An exemplary system according to the present disclosure leverages the software-defined radio architecture to quickly estimate a shift in the carrier frequency and re-center the filter before the signal is disrupted or degraded. In normal operation, the notch of the modulator filter is centered about the expected carrier frequency of the received signal with the signal band information centered around the carrier frequency and not exceeding the bandwidth of the modulator filter. A Doppler shift would offset the carrier by an amount Δf causing potential degradation to signal content with an increase in noise at one side of the band. According to the method and system described herein, the transceiver in a wireless cellular communication system can adapt to changes in the RF carrier frequency and may maintain signal integrity, by shifting the filter notch by the same amount as the carrier frequency.
For the cellular application discussed herein that covers multiple assigned frequency bands, a transmitter with multi-mode and multi-band coverage is required. Also, many current applications mandate transmitters that rapidly switch between frequency bands during the operation of a single communication link, which imposes significant challenges to typical local oscillator (LO) based transmitter solutions. This is because the switching time of the LO-based transmitter is often determined by the LO channel switching time under the control of the loop bandwidth of the frequency synthesizer, around 1 MHz. Hence, the achievable channel switching time is around several microseconds, which unfortunately is too long for an agile radio. A fully digital PWM based multi-standard transmitter, known in the art, suffers from high distortion, and the channel switching time is still determined by the LO at the carrier frequency. A DDS can be used as the LO sourced to enhance the switching speed, however, this design consumes significant power and may not deliver a high frequency LO with low spurious components. Alternately, single sideband mixers can be used to generate a number of LOs with different center frequencies using a common phase-lock loop (PLL), whose channel switching times can be fast. However, this approach can only support a limited number of LO options and any additional channels to cover the wide range of the anticipated 4G bands would need extra mixtures. As discussed, sigma-delta modulators have been proposed in the art to serve as an RF transmitter to overcome these issues. However, in the basic architecture, a sigma-delta modulator cannot provide a very high dynamic range in a wideband of operations due to a moderate clock frequency. It is precisely because the clock frequency is constrained by current technology that this high frequency mode of operations cannot be supported. 10029) Turning now to
Channel equalization is a must-have component in a radio communication system. Typically in radio systems the channel equalization is performed after the analog-to-digital conversion, commonly in the digital domain. This digital operation takes a number of clock cycles to finish. Therefore, if it is performed in real-time, a latency is introduced that affects communication links. The currently describe system and method performs channel equalization using a sigma-delta converter so that the channel equalization can be performed on the modulator path of the sigma-delta converter, in the analog domain, in a real-time manner while the noise shaping operation provided by the sigma delta converter is still kept and running at the same time.
The system is first operative to receive an RF signal via the antenna 305. The signal may be a pilot signal used for system equalization or the desired RF signal during normal operations. The antenna may be external to the system or integral within the system. The RF signal is coupled from the antenna 305 to the signal processing circuitry through a power combiner 370. The antenna may be directly coupled to the power combiner 370, or through a transmission line. The power combiner 370 is a type of power combiner that can combine multiple analog signals. The power combiner 370 operative to combine the RF signal from the antenna with the feed back signal of the sigma delta modulator. The power combiner 370 is coupled the LNTA 310. The LNTA is operative to amplify the RF signal couple from power combiner with minimum impact to the signal to noise ratio.
The system acts as a delta-sigma based radio and performs noise-shaping operation using the first tunable resonator 315 and the second tunable resonator 320 to increase the in-band SNR, and thus a spectrum notch is built. During operation, the system starts receiving signals/packets that normally have channel estimation sequence (CES). The system is first configured by the DSP 335 to perform channel estimation to estimate the channel response. Based on the channel estimation, the DSP 335 performs the initial setups for FIR 340, and tunes the first tunable resonator 315 and the second tunable resonator 320 for coarse channel equalization while trying to keep the sigma-delta noise shaping spectrum with the same/similar notch frequency and bandwidth. Once the system has performed the coarse channel equalization, the DSP further fine tunes FIR (and tunable resonator 315 and tunable resonator 320 if necessary) in response to the demodulation performance calculated by the DSP 335. The fine tuning for fine equalization is performed while trying to keep the sigma-delta noise shaping spectrum with the same/similar notch frequency and bandwidth.
Turning now to
The first low noise amplifier 405 and the second low noise amplifier 406 are used to amplify the desired received RF signal in a manner that minimizes the amplification of the noise floor. The first low noise amplifier 405 and/or the second low noise amplifier 406 may be a low noise transconductance amplifier which employs an amplifier whose differential input voltage produces an output current. This voltage controlled current source may have control inputs to control the conductance, impedance, and/or the amplification/attenuation.
The delta sigma modulator 400 initially couples the amplified RF signal through the summer 410 and the second low noise amplifier 406 to an N-th order filter 415. The N-th order filter 415 is a finite impulse filter or other tunable frequency selective device which has an output sequence that is a weighted sum of the most recent input values. For example, a 5-th order filter would perform 5 weighted summations of the input signal with 5 unit delays. In a delta sigma modulator, the N-th order filter 415 has programmable weights and therefore the filter characteristics of the N-th order filter 415 can be adjusted in response to the RF signal to be received.
The filtered RF signal is then coupled to a M-bit quantizer 420. The quantizer 420 is operative to convert the analog RF signal into a series of discrete values representative of the analog RF signal. A 2-bit quantizer would have four levels of quantization and a 3-bit quantizer could have 8 levels of quantization determined by the counting capacity of 2 bits and 3 bits respectively. The discrete values are then coupled to a processor, such as a digital signal processor, for further processing and to an M-th bit feedback DAC.
The M-th bit feedback DAC is operative to convert the discrete value back to an analog signal. This analog signal is then coupled to the summer 410 and combined with the amplified RF signal thereby providing a feedback path. The combined RF signal is then processes as described previously.
Turning now to
When it is determined that the method is required to receive a particular RF signal other than the pilot signal, the method is operative to configure the delta sigma modulator according to the expected frequency and amplitude, offset by the saved data acquired in equalization using the pilot signal 550. The method is then operative to decode the signal 560 and, optionally, fine tune the delta sigma modulator setting to further reduce distortion and improve signal quality.
As will be well understood by those skilled in the art, the several and various steps and processes discussed herein to describe the invention may be referring to operations performed by a computer, a processor or other electronic calculating device that manipulate and/or transform data using electrical phenomenon. Those computers and electronic devices may employ various volatile and/or non-volatile memories including non-transitory computer-readable medium with an executable program stored thereon including various code or executable instructions able to be performed by the computer or processor, where the memory and/or computer-readable medium may include all forms and types of memory and other computer-readable media.
The foregoing discussion disclosed and describes merely exemplary embodiments of the present invention. One skilled in the art will readily recognize from such discussion and from the accompanying drawings and claims that various changes, modifications and variations can be made therein without departing from the spirit and scope of the invention as defined in the following claims.
