The present invention provides a digital loss-of-clock detector. The disclosed loss-of-clock detector provides a programmable speed and duty cycle.
The outputs of the N delay element(s) 220 are applied to the N-input NOR gate 240 to detect when the input clock is stuck in a low position and are applied to the N-input AND gate 230 to detect when the input clock is stuck in a high position. The outputs of the NOR gate 240 and the AND gate 230 are applied to the two input OR gate 250 to produce the loss of clock signal that is high when there is no clock present. It is noted that, in alternative embodiments of the invention, the NOR gate 240 can be replaced with inverted inputs to an AND gate (not shown) and the AND gate 230 can be replaced with inverted inputs to a NOR gate (not shown). Further, in some embodiments of the invention, the delay element(s) 220 are implemented as separate delay components/circuits, while in other embodiments, the delay element(s) 220 may be implemented as a single delay component, having multiple outputs providing different periods of signal delay from the input of the delay element(s) 220.
In an exemplary implementation where a loss of clock is detected within one clock period, the length of the delay cell chain 220 should preferably be higher than the period of the input clock. For example, assuming a clock period of 10 nanoseconds, and if each delay element 220-i has an absolute delay of 1 nanosecond, then the delay chain 220 should comprise at least 11 delay elements. In this manner, the outputs of each delay element in the delay chain 220 cover the full clock period. If the clock is stuck in a high position, the outputs of each delay element will be high, and the output of the AND gate 230 will be high. Likewise, if the clock is stuck in a low position, the outputs of each delay element will be low, and the output of the NOR gate 240 will be high. If the output of either the NOR gate 240 or the AND gate 230 are high, the output of the OR gate 250 will be high.
In the fabrication of an integrated circuit, a plurality of identical die are typically formed in a repeated pattern on a surface of the wafer. In the implementation of one present embodiment of this invention, one or more of the die includes a device, or circuit, for detecting the loss of a clock, as described herein, and may include other structures or circuits. The individual die are cut or diced from the wafer, then packaged as an integrated circuit. One skilled in the art would know how to dice wafers and package die to produce integrated circuits. Integrated circuits so manufactured are considered part of this invention.
While exemplary embodiments of the present invention have been described with respect to digital logic blocks, as would be apparent to one skilled in the art, various functions may be implemented in the digital domain as processing steps in a software program, in hardware by circuit elements or state machines, or in combination of both software and hardware. Such software may be employed in, for example, a digital signal processor, micro-controller, or general-purpose computer. Such hardware and software may be embodied within circuits implemented within an integrated circuit.
Thus, the functions of the present invention can be embodied in the form of methods and apparatuses for practicing those methods. One or more aspects of the present invention can be embodied in the form of program code, for example, whether stored in a storage medium, loaded into and/or executed by a machine, or transmitted over some transmission medium, wherein, when the program code is loaded into and executed by a machine, such as a computer, the machine becomes an apparatus for practicing the invention. When implemented on a general-purpose processor, the program code segments combine with the processor to provide a device that operates analogously to specific logic circuits.
It is to be understood that the embodiments and variations shown and described herein are merely illustrative of the principles of this invention and that various modifications may be implemented by those skilled in the art without departing from the scope and spirit of the invention.