This invention relates to the occurrence of temporary overvoltages on AC networks and more particularly to the mitigation of those voltages.
Undesirable temporary overvoltages can occur for a variety of reasons on AC networks and have the potential to adversely affect connected equipment, possibly resulting in equipment damage. For example, the temporary overvoltages can occur in conjunction with conventional (line commutated) high voltage DC (HVDC) terminals in cases where the DC system is blocked (conduction halted) when a large amount of capacitive shunt compensation and harmonic filters are connected because of the operation of some kind of protection in the DC system. The HVDC control system is normally designed to trip the shunt compensation at the instant of converter blocking, thereby limiting the duration of the overvoltage to a few cycles, corresponding to the breaker opening times.
The magnitude of the dynamic overvoltage is directly related to the short circuit capacity of the AC system and the size of the shunt compensation. Dynamic overvoltage (DOV) can be an issue in those systems that have a low short circuit capacity compared to the rating of the HVDC transmission. Systems having this characteristic are known as weak systems.
Dynamic overvoltage can be particularly problematic in systems with generation connected at or near the bus experiencing the DOV event. In such a configuration, avoidance of generator self-excitation and/or generator overflux can be a decisive design consideration.
Static Var Compensators (SVC) where that term includes SVCs, Voltage Source Converter SVC (VSC-SVC) sold by various manufacturers such as ABB and others by using trademarks or tradenames such as SVC Light or STATCOM, thyristor switched or thyristor controlled reactors (TSR, TCR) and synchronous condensers are used to provide reactive power compensation to a power system. Part of the function of these systems may include suppression of dynamic overvoltages but their cost can be prohibitive since these SVC systems are normally designed for longer-term and more frequent operation than is needed to correct DOV. Therefore they would include additional capability that is not needed for mitigation of DOV.
Referring now to
An apparatus for mitigating in less than the time for one cycle of a predetermined operating frequency of an AC network a short term dynamic overvoltage on the AC network. The apparatus has:
a distribution and power transformer having a primary connected to a high voltage bus and a secondary connected to a switching device that can switch from a nonconductive mode to a conductive mode within a time that is less than the time for one cycle of the network predetermined operating frequency;
a system connected to the switching device, the system capable of detecting the occurrence of a condition known to cause a dynamic overvoltage on the AC network and the occurrence of a dynamic overvoltage on the AC network and causing the switching device to change in less than the time for one cycle of the predetermined operating frequency from the nonconductive mode to the conductive mode to thereby short circuit the transformer secondary when both the occurrence of a condition known to cause a dynamic overvoltage on the AC network and the occurrence of a dynamic overvoltage on the AC network are detected at the same time.
A method for mitigating in less than the time for one cycle of a predetermined operating frequency of an AC network a short term dynamic overvoltage on the AC network. The method:
detects the occurrence of a condition known to cause a dynamic overvoltage on the AC network and the occurrence of a dynamic overvoltage on the AC network; and
causes a switching device connected to the secondary of a transformer whose primary is connected to the AC network to change in less than the time for one cycle of the predetermined operating frequency from a nonconductive mode to a conductive mode to thereby short circuit the transformer secondary when both the occurrence of a condition known to cause a dynamic overvoltage on the AC network and the occurrence of a dynamic overvoltage on the AC network are detected at the same time.
a graphs show the high side bus voltage and the generator flux magnitude without the Subcycle DOV Limiting Device (SDLD) of the present invention.
b graphs show the high side bus voltage and the generator flux magnitude with the Subcycle DOV Limiting Device (SDLD) of the present invention.
Referring now to
The transformer 12 may be embodied by any well known distribution and power transformer, such as for example and without limitation, a two winding or auto transformer, with secondary voltage in the medium voltage range. The transformer 12 is designed with MVA rating and impedance values selected to give the needed reactive power absorption at the primary for conditions with the secondary short circuited. For example, a transformer 12 with 500 MVAR absorption capability at the primary (at nominal primary voltage) can be made using a 50 MVA base rated transformer with 10% leakage reactance.
The SDLD and thus apparatus 10 also includes the high voltage breaker 14 that is connected between the HV primary side of transformer 12 and the HV bus 16. The secondary or MV side of transformer 12 is connected to MV bus 18 and to high speed switching device 20.
As is shown in
The DOV condition detector 28 provides an input signal to control system 26 upon the occurrence of a condition that is known to cause a DOV. As is well known the DOV condition detector 28 senses certain preset conditions that are known to cause a DOV in a particular power system. While DOV condition detector 28 is shown in
The control system 26 can either be an existing system such as the Mach 2 system presently used by ABB for its HVDC technology, with additional programming for the SDLD of the present invention which is well within the skill of those of ordinary skill in this art, or a special-purpose control system built for use in apparatus 10.
For normal operating conditions, the transformer 12 is energized from the high voltage side by its connection to the HV bus 16, and its secondary circuit is open (no load). During dynamic overvoltage, the transformer secondary is short circuited by the high speed (subcycle) switching device 20. The signal from the DOV condition detection 28 causes the control system 26 to connect all three phases on the secondary side of the transformer 12 to a common point without delay if, for example, device 26 detects that the HVDC converters have blocked during an AC network configuration and power level known to cause DOV. It should be appreciated that the standards used by transformer manufacturers such as ABB for designing the power transformers that can be used to embody the SDLD of the present invention require that the transformer withstand such a secondary side connection for a limited time which is typically less than two (2) seconds. The input signal from the overvoltage detection 24 to control system 26 causes the control system 26 to short circuit the secondary of the tranformer 12 if an overvoltage is detected.
As is well known to those of ordinary skill in this art, the close timing of the individual poles (phases) of the high speed switching device 20 may optionally be selected by control system 26 in such a way as to minimize DC offsets in the secondary side currents of transformer 12. DC offsets may cause more stress on transformer 12 as the mechanical force on the transformer is proportional to the peak I in the transformer. Minimizing DC offsets also minimizes the current that has to be carried by switching device 20.
After the capacitive MVARs (such as AC filters at a HVDC station, shunt capacitor banks, or lightly loaded high voltage transmission lines) that have caused the DOV are disconnected from the system, the transformer reactive power absorption is removed from the system, either by opening the switching device 20 on the transformer secondary circuit or by opening the high voltage breaker 14 on the primary side.
A fast switching device 20 capable of conducting high currents is used on the secondary side of transformer 12 in order to mitigate the DOV in the subcyle time frame, i.e. less than eight (8) milliseconds for a 60 Hertz system. The device 20 may be, but is not limited to, one of the following:
Fast mechanical switch
Triggered spark gap
Thyristors, or other power electronic switches
The device 20 chosen for a given application depends on specific conditions and detailed design studies of the power system.
While DOV detector 24, control system 26 and DOV condition detector 28 are shown in
An example showing the performance of the SDLD of the present invention in mitigating generator overflux and DOV, that is high side bus voltage, is shown by the graphs in
In the system that was tested to obtain the graphs shown in
It is to be understood that the description of the preferred embodiment(s) is (are) intended to be only illustrative, rather than exhaustive, of the present invention. Those of ordinary skill will be able to make certain additions, deletions, and/or modifications to the embodiment(s) of the disclosed subject matter without departing from the spirit of the invention or its scope, as defined by the appended claims.
This application claims the priority of U.S. provisional patent application Ser. No. 60/903,751 filed on Feb. 27, 2007, entitled “Method And Apparatus For Mitigation Of Dynamic Overvoltage” the contents of which are relied upon and incorporated herein by reference in their entirety, and the benefit of priority under 35 U.S.C. 119(e) is hereby claimed.
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/US08/02537 | 2/26/2008 | WO | 00 | 8/21/2009 |
Number | Date | Country | |
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60903751 | Feb 2007 | US |