Patent Application
20140181546
In present day electronic computing and communications platforms, input power source (e.g., battery or AC adapter) protection is lacking. While the need for such protection may have been less important in previous generations of such platforms, present day components such as a general processor (CPU) and graphics processor may have design features that allow high power performance that exceeds the thermal design of a platform that incorporates such components. One such feature is a dynamic overclocking feature, sometimes referred to as “turbo boost” or “turbo mode” that enables a processor to operate above its base operating frequency. Typically, a series of performance states may be defined in a configuration specification, and the turbo mode may be activated when an operating system requests the highest performance state of the given processor.
The excursion into high power or turbo mode may result in platform input voltage droop, and may cause an alternating current (AC) adapter or power supply under-voltage or/over-current shut down, inadvertent data loss, and/or platform failure.
However, because such high performance processors are more widely deployed in present day platforms, it may be desirable to accommodate such devices without at the same time placing undue risk of platform failure. For example, although a scenario such as the operation of multiple processors at a highest turbo power mode may risk overcurrent/undervoltage conditions that induce platform failure, such conditions may occur only occasionally, such that it is desirable to supply a platform having such processors using an AC adapter that may not be rated to supply power at the highest possible level in which the processor can run. Moreover, the maximum amount of current drawn by a platform may be hard to predict especially when multiple components may be potentially active and operating in different power modes at any given time. Accordingly, an unpredicted but infrequent power surge may occur that exceeds the ability of an AC adapter to safely drive.
It is with respect to these and other considerations that the present improvements have been needed.
Various embodiments may comprise one or more elements. An element may comprise any structure arranged to perform certain operations. Some elements may be implemented as hardware, software, or any combination thereof, as desired for a given set of design parameters or performance constraints. Although an embodiment may be described with a limited number of elements in a certain topology by way of example, the embodiment may include more or less elements in alternate topologies as desired for a given implementation. It is worthy to note that any reference to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment.
Various embodiments are related to managing platform power including computing devices, portable communications devices, communications devices, and other electronics devices. In various embodiments, apparatus and techniques are provided that better manage current supplied to a platform. In particular, the present embodiments address, among other things, the problem of overcurrent voltage droop that may occur due to increased current drawn by platform components from an AC adapter/power supply.
In accordance with some embodiments, the current output from an AC adapter/power supply is monitored and dynamically altered in a manner that may prevent inadvertent shutdown of a system, platform failure, and/or data loss. Other embodiments are described and claimed.
Platform components 104 may include one or more voltage regulators that are designed to operate within a specific input voltage tolerance or range. Accordingly, if the system input voltage 106 is below the specific input voltage range, the system 100 may not function properly or may shut down. As noted above, modern processor design allows for high power (“turbo”) operation of such platform components 104. These power excursions may result in short periods in which power consumption may cause a concomitant drop in system input voltage 106 to below safe operating levels, even if the time average input voltage is above a lower limit for safe operation of the platform components 104. Even without operation in such turbo modes, the processor power may increase due to increased workload such that voltage droop occurs. In one example, one or more of components 104a to 104n may be operative to adjust its mode to a high power mode for short periods of time in order to provide enhanced performance. These periods may typically last several milliseconds to tens of milliseconds and may take place occasionally, such as at instances that are separated from one another by hundreds of milliseconds or seconds. In this manner, the platform device(s) may operate at a regular power level, or regular operating mode, for a majority of the time, while operating in high power modes for short durations. Depending upon the magnitude of the power increase in a high power mode, the current output IOUT that is output from the AC adapter 102 may surge and the system input voltage, shown as VPLATFORM may droop below an acceptable level, such that operation of platform components is threatened or platform shutdown occurs.
To prevent such adverse circumstances, system 100 includes a platform power protection system 108 that is operative to monitor the current output IOUT that is output from the AC adapter 102, and to respond in order to limit current surges so that overcurrent/undervoltage conditions are limited to prevent inadvertent shutdown, data loss, or other adverse effects. In various embodiments, the platform power protection system 108 may be implemented in hardware, or a combination of hardware and software, examples of which are detailed with respect to the FIGS. to follow. For example, when the AC adapter is plugged into an external AC power line, the AC adapter may be rated for a maximum current output of 4.5 A. During proper operation, the output current IOUT from the AC adapter may range up to 4.5 A depending upon the requirements of the platform devices at any given time. Consistent with the present embodiments, the platform power protection system 108 may be set to detect when IOUT is excessive, and to generate a control signal that alters the operation of one or more platform components to reduce IOUT which may result in preventing or stopping potentially damaging input voltage droop. In the above example, if the IOUT from the AC adapter 102 were detected to exceed 4.5 A or another current limit set to ensure proper operation, the platform power protection system may rapidly generate a control signal to reduce power consumed in the one or more platform components 104a to 104n. This reduction in power consumed by platform 104, in turn, may result in lowering the IOUT from the AC adapter 102 before any damaging events take place.
In the embodiment of
In operation, to provide power to the platform components 202 the AC adapter 102 may be coupled to a source of external AC power (not shown) and to the system input line 106. The system input line 106 may power an entire platform (not separately shown) such as a computer that includes the platform components 202, and may further include the platform power protection system 200. Notably, although not explicitly shown in
When one or more of platform components 202 are active, power may be drawn from the AC adapter 102 such that the current output IOUT from the AC adapter 102 varies according to the level of power consumed by the collection of platform components 202 that are active at any given time. To illustrate operation of the platform power protection system 200, in one example, it may be assumed that the AC adapter 102 is rated to 65 W, while a CPU 212 may be operative to consume up to 90 W power. If the CPU enters a turbo operation mode in which power approaches the 90 W limit, the initial current drawn from the AC adapter 102 may exceed safe operation limits. In this circumstance the platform power protection system 200 may detect the excessive current and generate a signal to place the CPU 212 in a lower power mode so that the current drawn from AC adapter 102 reduces to safe levels.
In particular, the current sensor 204 may monitor the current output IOUT from the AC adapter 102, and provide a current signal to the differential amplifier 206. The differential amplifier 206 may then generate an amplified current signal that is received at the comparator 208. Consistent with the present embodiments, the comparator 208 may be set to output a signal when the amplified current signal exceeds a reference value. In one example, the comparator 208 may have a first input (not shown) that receives a reference value characteristic of the current limit for current output IOUT from the AC adapter 102. In one instance, the current limit of the reference value may be set to indicate 4.5 A following the above example. The comparator 208 may include a second input to receive the amplified current signal. When the amplified current signal received at the second input of comparator 208 indicates a value of current output IOUT from the AC adapter 102 in excess of 4.5 A, the comparator 208 may output a signal to the gate of a field effect transistor (or, simply “transistor) 214. In the example shown the field effect transistor is a P-type field effect transistor (pFET).
When the voltage level set by the signal output by comparator 208 is received at the gate of the transistor 214, the transistor may turn on, such that an alert signal is generated. In the example of
In various embodiments, the control signal that is output by embedded controller 210 may be operative to reduce power in one or more platform components 202 until the control signal is de-asserted. In the example of
Continuing with
Thus, embodiments consistent with the arrangement of
However, as will be readily appreciated by those of skill in the art, the present embodiments are not limited to the specific arrangement shown in
In particular, in
Consistent with the present embodiments, the platform power control system 108 may set a current limit 308, as shown in
As noted previously, one factor in determining the value to set for the current threshold 308 is the voltage threshold for stable operation of a platform. Because excessive current draw from an AC adapter may engender a droop in input voltage to a platform, the current threshold 308 may be set to avoid or minimize the voltage droop below a critical value in an input line connected to that AC adapter.
As also explained previously, the platform power protection circuit 108 may further respond to an alert signal by generating a control signal to cause the CPU 212 to lower its operating power. This response engenders a drop in CPU power consumed and thereby a drop in the current level of second current peak 508, as illustrated. In the particular example of
When the AC_OK signal 602 is asserted, the AC_OK signal 602 may trigger the generation of the PROCHOT# signal as discussed previously in regards to
As a consequence of the operation of the embodiment shown in the scenario of
To address this, the present embodiments provide a rapid mechanism to reduce processor or other platform component current as soon as the monitored AC current, such as output current IOUT 502 of
It is to be emphasized that consistent with the various embodiments the platform components giving rise to a detected current surge need not be those whose power is adjusted in response. In other words, the surge in activity of a first platform component may give rise to excessive current drawn from an AC adapter. In response, the platform power protection system 108 may generate a control signal that reduces power in one or more platform components that may include other components than the first platform component.
Included herein is a set of flow charts representative of exemplary methodologies for performing novel aspects of the disclosed architecture. While, for purposes of simplicity of explanation, the one or more methodologies shown herein, for example, in the form of a flow chart or flow diagram, are shown and described as a series of acts, it is to be understood and appreciated that the methodologies are not limited by the order of acts, as some acts may, in accordance therewith, occur in a different order and/or concurrently with other acts from that shown and described herein. For example, those skilled in the art will understand and appreciate that a methodology could alternatively be represented as a series of interrelated states or events, such as in a state diagram. Moreover, not all acts illustrated in a methodology may be required for a novel implementation.
At block 904, it is determined that the value of the current output signal exceeds a preset current threshold. The preset current threshold may correspond to a current limit for safe operation of the platform components.
At block 906, a control signal is asserted to one or more platform components to reduce power. In one example, the control signal is a PROCHOT# signal that is sent to one or more CPU processors/processor cores and/or one or more graphics processors/processor cores.
At decision block 908 a determination is made as to whether the current output signal continues to exceed the preset current threshold. If so, the process returns to block 906. If not, the process ends.
At block 1002 a current threshold is set for AC adapter output current according to a safe voltage level for operation of platform components.
At block 1004 the current output of the AC adapter is monitored. The logic flow then proceeds to block 1006.
At decision block 1006, a determination is made as to whether the current limit exceeded. If, at block 1006, a determination is made that the current limit is not exceeded, the logic flow returns to block 1004, where the current output of the AC adapter continues to be monitored.
If, at block 1006, a determination is made that the current limit is exceeded, the logic flow proceeds to block 1008. At block 1008, an AC_OK signal is asserted. The flow then proceeds to block 1010.
At block 1010, a PROCHOT# signal is asserted to a platform component for preset duration sufficient for that platform component to enter a low power mode of operation.
As shown in
Processor 1102 may be a central processing unit comprising one or more processor cores and may include any number of processors having any number of processor cores. The processor 1102 may include any type of processing unit, such as, for example, CPU, multi-processing unit, a reduced instruction set computer (RISC), a processor that have a pipeline, a complex instruction set computer (CISC), digital signal processor (DSP), and so forth. In some embodiments, processor 1102 may be multiple separate processors located on separate integrated circuit chips. In some embodiments processor 1102 may be a processor having integrated graphics, while in other embodiments processor 1102 may be a graphics core or cores.
Some embodiments may be described using the expression “one embodiment” or “an embodiment” along with their derivatives. These terms mean that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment. Further, some embodiments may be described using the expression “coupled” and “connected” along with their derivatives. These terms are not necessarily intended as synonyms for each other. For example, some embodiments may be described using the terms “connected” and/or “coupled” to indicate that two or more elements are in direct physical or electrical contact with each other. The term “coupled,” however, may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other.
In one embodiment, an apparatus may include a platform power protection circuit to monitor an electric current over a platform input line, the electric current received on the platform input line from a current source, and to output an alert signal from a comparator when current output is determined to exceed a current threshold. The apparatus may further include logic to assert a control signal to reduce power consumption in one or more platform components coupled to the platform input line when the alert signal is received.
In another embodiment, wherein the control signal may cause a reduction of an operating frequency of a processor, the processor comprising one of the platform components
Alternatively, or in addition, in a further embodiment, the platform power protection circuit may generate a binary signal indicative of AC signal level when monitored AC current is determined to exceed the current threshold.
Alternatively, or in addition, in a further embodiment the platform power protection circuit may include a current sensor to sample current, a differential amplifier to produce an amplified current signal from the sampled current, and a comparator to output the alert signal when the amplified current signal exceeds an input value corresponding to the current threshold.
Alternatively, or in addition, in a further embodiment the apparatus may include an embedded controller to set an interrupt to detect the alert signal, and to assert the control signal when the interrupt is triggered.
Alternatively, or in addition, in a further embodiment the logic may assert the control signal to reduce platform component power for a preset duration sufficient for the one or more platform components to enter a low power mode of operation.
Alternatively, or in addition, in a further embodiment the logic may assert the control signal when the monitored current exceeds the current threshold.
Alternatively, or in addition, in a further embodiment, the current source may include an alternating current (AC) adapter.
In another embodiment, a computer implemented method may include monitoring an electric current over a platform input line, the electric current received on the platform input line from a current source, outputting an alert signal when current output is determined to exceed a current threshold, and asserting a control signal to reduce power consumption in one or more platform components coupled to the platform input line when the alert signal is generated.
In a further embodiment, the computer implemented method may include asserting a control signal to lower processor operating frequency.
Alternatively, or in addition, in a further embodiment, the computer implemented method may include generating the alert signal as a binary signal indicative of AC signal level when monitored AC current is determined to exceed the current threshold.
Alternatively, or in addition, in a further embodiment, the computer implemented method may include sampling AC current in the platform input line, producing an amplified current signal from the sampled current, and outputting the alert when the amplified current signal exceeds an input value corresponding to the current threshold.
Alternatively, or in addition, in a further embodiment, the computer implemented method may include setting an interrupt to detect the alert signal, and asserting the control signal when the interrupt is triggered.
Alternatively, or in addition, in a further embodiment, computer implemented the method may include asserting the control signal to reduce platform component power for a preset duration sufficient for the one or more platform components to enter a low power mode of operation.
Alternatively, or in addition, in a further embodiment the computer implemented method may include asserting the control signal when the monitored current exceeds the current threshold.
In a further embodiment, an apparatus may be configured to perform the method of any one of the preceding embodiments.
In another embodiment, at least one machine readable medium may comprise a plurality of instructions that in response to being executed on a computing device, cause the computing device to carry out a method according to any one of the preceding embodiments.
It is emphasized that the Abstract of the Disclosure is provided to allow a reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing Detailed Description, it can be seen that various features are grouped together in a single embodiment for the purpose of streamlining the disclosure. This method of disclosure is not to be interpreted as reflecting an intention that the claimed embodiments require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed embodiment. Thus the following claims are hereby incorporated into the Detailed Description, with each claim standing on its own as a separate embodiment. In the appended claims, the terms “including” and “in which” are used as the plain-English equivalents of the respective terms “comprising” and “wherein,” respectively. Moreover, the terms “first,” “second,” “third,” and so forth, are used merely as labels, and are not intended to impose numerical requirements on their objects.
What has been described above includes examples of the disclosed architecture. It is, of course, not possible to describe every conceivable combination of components and/or methodologies, but one of ordinary skill in the art may recognize that many further combinations and permutations are possible. Accordingly, the novel architecture is intended to embrace all such alterations, modifications and variations that fall within the spirit and scope of the appended claims.
Various embodiments may be implemented using hardware elements, software elements, or a combination of both. Examples of hardware elements may include processors, microprocessors, circuits, circuit elements (e.g., transistors, resistors, capacitors, inductors, and so forth), integrated circuits, application specific integrated circuits (ASIC), programmable logic devices (PLD), digital signal processors (DSP), field programmable gate array (FPGA), logic gates, registers, semiconductor device, chips, microchips, chip sets, and so forth. Examples of software may include software components, programs, applications, computer programs, application programs, system programs, machine programs, operating system software, middleware, firmware, software modules, routines, subroutines, functions, methods, procedures, software interfaces, application program interfaces (API), instruction sets, computing code, computer code, code segments, computer code segments, words, values, symbols, or any combination thereof. Determining whether an embodiment is implemented using hardware elements and/or software elements may vary in accordance with any number of factors, such as desired computational rate, power levels, heat tolerances, processing cycle budget, input data rates, output data rates, memory resources, data bus speeds and other design or performance constraints.
Some embodiments may be described using the expression “coupled” and “connected” along with their derivatives. These terms are not intended as synonyms for each other. For example, some embodiments may be described using the terms “connected” and/or “coupled” to indicate that two or more elements are in direct physical or electrical contact with each other. The term “coupled,” however, may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other.
Some embodiments may be implemented, for example, using a computer-readable medium or article which may store an instruction or a set of instructions that, if executed by a computer, may cause the computer to perform a method and/or operations in accordance with the embodiments. Such a computer may include, for example, any suitable processing platform, computing platform, computing device, processing device, computing system, processing system, computer, processor, or the like, and may be implemented using any suitable combination of hardware and/or software. The computer-readable medium or article may include, for example, any suitable type of memory unit, memory device, memory article, memory medium, storage device, storage article, storage medium and/or storage unit, for example, memory, removable or non-removable media, erasable or non-erasable media, writeable or re-writeable media, digital or analog media, hard disk, floppy disk, Compact Disk Read Only Memory (CD-ROM), Compact Disk Recordable (CD-R), Compact Disk Rewriteable (CD-RW), optical disk, magnetic media, magneto-optical media, removable memory cards or disks, various types of Digital Versatile Disk (DVD), a tape, a cassette, or the like. The instructions may include any suitable type of code, such as source code, compiled code, interpreted code, executable code, static code, dynamic code, encrypted code, and the like, implemented using any suitable high-level, low-level, object-oriented, visual, compiled and/or interpreted programming language.
Unless specifically stated otherwise, it may be appreciated that terms such as “processing,” “computing,” “calculating,” “determining,” or the like, refer to the action and/or processes of a computer or computing system, or similar electronic computing device, that manipulates and/or transforms data represented as physical quantities (e.g., electronic) within the computing system's registers and/or memories into other data similarly represented as physical quantities within the computing system's memories, registers or other such information storage, transmission or display devices. The embodiments are not limited in this context.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
Numerous specific details have been set forth herein to provide a thorough understanding of the embodiments. It will be understood by those skilled in the art, however, that the embodiments may be practiced without these specific details. In other instances, well-known operations, components and circuits have not been described in detail so as not to obscure the embodiments. It can be appreciated that the specific structural and functional details disclosed herein may be representative and do not necessarily limit the scope of the embodiments
