This application claims priority under 35 U.S.C. §119 to European Patent Application No. 13156384.3 filed in Europe on Feb. 22, 2013, the content of which is hereby incorporated by reference in its entirety.
The present disclosure relates to three-phase voltage source inverters, and more particularly to converting a DC voltage into three-phase currents by using a multi-level-current concept.
Plants generating renewable energy can be considered key components in the next generation of power systems, such as smart grids and microgrids. As discussed in the document by B. Burger and D. Kranzer titled “Extreme High Efficiency PV-Power Converter,” in Proc. EPE09, September 2009, these plants can also provide an alternate power source to known energy sources, such as oil, coal and natural gas.
A known characteristic for a renewable energy generating process is that an inverter is used in the process as an interface transforming available renewable energy in the form of a DC voltage to an AC voltage. Thus, DC/AC inverter technology can have a role in generating renewable energy in high power three-phase grid-connected applications.
DC/AC inverting technology can be implemented in various ways. The DC/AC inverting technology can have multiple degrees of freedom, for example, with respect to circuit topology, semiconductors, storage and filtering passive devices. These aspects can be interrelated, that is, changing one aspect can affect another. An effect of a change can manifest itself as an advantage or a drawback. Different combinations of different aspects can be used for serving different purposes.
A known approach for inverting a DC voltage into a three-phase AC voltage is to use a voltage source inverter (VSI), as renewable energy sources can be seen as DC voltage sources. If a DC voltage source can provide a sufficiently high voltage, only one power stage can be enough for the DC/AC conversion.
As discussed in U.S. Pat. No. 4,670,828, multi-level voltage source inverters were proposed to tackle the high switching losses of the two-level voltage source inverters. Output inductors of multi-level VSIs can be subjected to smaller transients, as the output voltage/current can be formed in smaller steps. This allows the use of output inductors with smaller inductances. Smaller inductances allow considerable reductions in size and losses of the inductors.
a illustrates a neutral-point-champed (NPC) voltage source inverter topology. In three-level topology, three inverter legs are implemented by using twelve switches S1 to S12. The inverter legs are clamped to the neutral point through diodes D1 to D6. Breakdown voltages of all semiconductors S1 to S12 and D1 to D6 are half of the DC link voltage. Thus, the switching losses of the semiconductors can be lower than those of a two-level voltage source inverter. Further, fast semiconductors can be utilized in the outer switches S1 to S3 and S10 to S12 and NPC diodes D1 to D6. Size and losses of the output inductors can be reduced by increasing the switching frequency. A drawback of this topology is that the inner slower switching switches S4 to S9 have relatively high conduction losses.
b illustrates a flying capacitor (FC) voltage source inverter topology. The three-level topology includes fewer semiconductors than the inverter NPC topology of
c illustrates a T-type NPC voltage source inverter topology. A three-level output is achieved by using a half bridge including six switches S1 to S6 in combination with active clamping. In
Wide-band-gap (WBG) semiconductors, such as Gallium Nitride (GaN) and Silicon Carbide (SiC), can be used to reduce the switching losses of these switches. The WBG semiconductors can be, however, more expensive than pure Silicon (Si) devices. The topology of
Another approach for converting a DC voltage to a three-phase AC voltage is by means of a current source inverter (CSI).
a shows a known current source inverter topology as discussed in the document of B. Sahan, S. Araujo, C. Nöding, and P. Zacharias titled “Comparative Evaluation of Three-Phase Current Source Inverters for grid interfacing of distributed and renewable energy systems,” IEEE Trans. Power Electron., vol. 26, no. 8, 2304-2318, August 2011. The topology shares a drawback with the two-level VSI topology in
b illustrates an indirect current source inverter (ICSI) topology introduced in the document of R. Raik, N. Mohan, M. Rogers, and A. Bulawka titled “A noval grid interface optimized for utility-scale applications of photovoltaic, wind-electric, and fuel-cell systems,” IEEE Trans. Power Del., vol. 10, no. 4, pp. 1920-1926, October 1995, and discussed in WO 2009073582 A2. The topology uses two fast switches S1 and S2 for shaping the current of inductors L1 and L2, and six slow switches S3 to S8 to reform the currents. A lossy and bulky three-phase transformer 31 is used to convert them to in-phase currents. Total Harmonic Distortion (THD) of the output current can be very poor.
An exempalry apparatus for producing a three-phase current is disclosed, comprising: a three-phase output; a DC voltage input including a positive terminal, a negative terminal, and a neutral terminal; a first switching converter connected between the positive terminal and the neutral terminal; a second switching converter connected between the neutral terminal and the negative terminal; a third switching converter including an inverter leg connected between the positive terminal and the negative terminal, and an output having an inductor connected thereto; a two-level three-phase inverter bridge including three parallel-connected inverter legs between outputs of the first switching converter and second switching converter, wherein outputs of the inverter legs can be connected to phase conductors of the three-phase output; and an arrangement of bidirectional switching devices connected between the third switching converter output and each of the phase conductors.
An exemplary method is disclosed for producing a three-phase current by using an apparatus that includes a three-phase output, and a DC voltage input having a positive terminal, a negative terminal, and a neutral terminal, the method comprising: producing a positive current via a first buck converter connected between the positive terminal and the neutral terminal, wherein the produced positive current follows a path of a highest phase of a sinusoidal three-phase signal at a given time; producing a negative current via a second buck converter connected between the neutral terminal and the negative terminal, wherein the produced negative current follows a path of a lowest phase of the three-phase signal at the given time; producing an intermediate current via a third switching converter that includes an inverter leg connected between the positive terminal and the negative terminal, and an inductor at the output of the third switching converter, wherein the produced intermediate current follows a path of a phase of the three-phase signal between the highest and the lowest phase at the given time; and switching the produced currents to each phase conductor of the three-phase output in sequence so that phase currents of the three-phase current are formed in the output conductors.
In the following the disclosure will be described in greater detail by means of exemplary embodiments with reference to the attached drawings, in which
a to 2c show known three-level voltage source inverter topologies according to a known implementations;
a and 3b illustrate current source inverter topologies according to a known implementations;
a and 4b show an example of generating a positive current, a negative current, and an intermediate current according to an exemplary embodiment of the disclosure;
a and 9b illustrate some applicable multi-level inverter topologies according to an exemplary embodiment of the disclosure;
a and 10b illustrate block diagrams of apparatuses in which boost converters can be used according to an exemplary embodiment of the disclosure;
a to 11d illustrate simulated waveforms according to an exemplary embodiment of the disclosure;
a to 12d illustrate simulated waveforms related to one phase of a three-phase output according to an exemplary embodiment of the disclosure; and
a to 13f show gate signals of switching converters and current distributing means with respect to one phase of a three-phase output according to an exemplary embodiment of the disclosure.
Exemplary embodiments of the present disclosure provide a method and an apparatus for implementing the method so as to alleviate the above disadvantages.
An exemplary embodiment of the present disclosure discloses a method and an apparatus implementing the method, which can be used to convert DC voltage to a three-phase AC voltage/current. The disclosed method and inverter can be used, for example, for providing a sinusoidal, in-phase three-phase output current to a three-phase power network.
The exemplary method implements a multi-level-current concept for forming three-phase currents. In order to form three sinusoidal output phase currents, an inverter implementing the disclosed method can comprise three routes for current: a positive, a negative and a middle route.
A positive current through the positive route can follow the highest phase of a sinusoidal three-phase reference at a given time, a negative current through the negative route can follow the lowest phase of the reference, and an intermediate current through the middle route can follow a phase current between the highest and the lowest phase.
Sinusoidal output phase currents at a three-phase output can then be constructed by supplying the three phase conductors of the output with the positive, the negative, and the intermediate current in sequence.
Each route can include high-frequency semiconductors for shaping the current waveform, and low-frequency semiconductors for distributing the shaped currents to the output phase conductors.
When the produced output three-phase current is sinusoidal and in phase with the output/load voltage, the positive route and the negative route together carry a large majority of the supplied power. The positive and negative currents can both be produced by using one switching device, and, therefore, the disclosed inverter topology can be implemented by using only two fast switching devices with a high current rating. As the middle route carries only a small portion of the total power, the current shaping part of the middle route can be implemented with switching devices having lower current ratings. The semiconductors distributing the shaped currents can be low-frequency components.
The disclosed method and inverter topology can be implemented cost-efficiently by using only a few high current, high switching frequency switching devices. The disclosed method and inverter topology can also provide a higher power density, as the core size of the output inductors can be reduced by increasing the switching frequency. The inverter can be connected to the three-phase grid directly, without a transformer. This further reduces the overall size and cost of the system. Also, there can be no high frequency ground leakage currents flowing through the DC voltage source terminals and the grounded frame.
An exemplary embodiment of the present disclosure is directed to a method for producing a three-phase current. The method can be used to produce the three-phase current from a DC voltage which can be generated by a renewable energy source, for example. An apparatus implementing the disclosed method can be used, for example, to convert the DC voltage produced by a solar power plant or by a wind power generator into a three-phase, in-phase sinusoidal current at a three-phase output of the inverter.
The output can be connected to a three-phase AC power grid or load, for example.
The exemplary method includes producing a positive current, a negative current, and an intermediate current.
Phases forming a sinusoidal three-phase signal can have one highest phase, one lowest phase, and one intermediate phase, e.g., a phase between the highest and the lowest phase, at a given time, at least if the moments when values of the phases can be crossing each other can be disregarded.
Thus, the produced positive current of the disclosed method can follow the path of the highest phase of a (balanced) sinusoidal three-phase signal at a given time and the produced negative current can follow a path of the lowest phase of the three-phase signal at the given time. The produced intermediate current can follow a path of a phase of the three-phase signal which is between the highest and the lowest phase at the given time.
a and 4b show an example of generating the positive current ip, the negative current in, and the intermediate current im.
In
At the time t1, the positive current ip has the value of the phase current ic. The intermediate current im follows the path of the phase current ib, and the negative current in follows the path of the phase current ia.
At the time t2, the value of the positive current ip follows the phase current ib, and the intermediate current im follows the phase current ic. The negative current in still follows the phase current ia.
b shows an exemplary path to be followed by the positive current ip. The path alternates between the positive peak Ipeak the reference current and the of half value of the positive peak Ipeak. In
Switching converters can be used for generating the positive, the negative, and the intermediate current. For example, the positive current ip can be produced from a DC voltage by using a first switching converter. In a similar manner, the negative current in can be produced by using a second switching converter, and the intermediate current im by using a third switching converter.
b illustrates ideal waveforms of the produced currents ip, in, and im. However, when the produced currents can be generated by switching converters, they can not exactly correspond with their references phases but follow the phases of the reference within a tolerance range.
In
The apparatus in
The apparatus 50 forms three routes for current from the DC voltage input to the three-phase output. Thus, the apparatus 50 includes a first switching converter 53, a second switching converter 54, a third switching converter 55 and current distributing means 56 to 58. The first switching converter 53 and first current distributing means 56 connected to the output of the first converter 53 form the first route. In a similar manner, the second switching converter 54 and second current distributing means 57 connected to the output of the second converter 54 form the second route. The third switching converter 55 and third current distributing means 58 connected to the output of the third converter 55 form the third route. The apparatus 50 can also include an EMI filter 59 for filtering the produced three-phase output current.
In
In
The second switching converter 54 is configured to produce a negative current in which follows a path of the lowest phase of the three-phase signal. The second switching 54 converter supplies the produced negative in current to a second switching converter output. The path to be followed by the negative current can be determined using the lowest present phase value of the three-phase current reference.
The third switching converter 55 is configured to produce an intermediate current im which follows a path of a phase of the three-phase signal between the highest phase current and the lowest phase current at a given time t. In other words, the one phase left after picking the highest and the lowest phase can be used as the path to be followed for the intermediate current im. The third switching converter 55 supplies the produced intermediate im current to a third switching converter output.
In
The positive current ip, the negative current in, and the intermediate current im can then be used for generating phase currents to phase conductors a, b, and c of the three-phase output. The outputs of the switching converters 53 to 55 provide different partial current shapes of a sinusoidal phase current. These partial shapes can be assembled into sinusoidal phase current waveforms. In
In order to form phase currents of the three output phase current in the output conductors a, b, and c, the apparatus 50 can include control means, such as a controller, for controlling the current distributing means 56 to 58 to connect the switching converter outputs to each output phase conductor a, b, and c in sequence.
The switching converters 53 to 56 can include high-frequency semiconductors in order to shape the DC voltage into a desired form. However, the current distributing means 56 to 58 can be adapted to operate at a lower switching frequency than the corresponding switching converters 53 to 56.
The exemplary method and topology can also provide a high power density, as increasing the switching frequency allows the use of smaller output inductors. The exemplary apparatus can be used for connecting a DC voltage source to a three-phase grid directly without a transformer.
If the input DC voltage is lower than the peak of the phase-to-line voltage, a boost converter can be used for increasing the input voltage of the apparatus. All routes can be connected to the boost converter output in order to simplify the control scheme of the apparatus or, alternatively, the third route generating the intermediate current can be connected to the input of the boost converter in order to reduce the handling power of the boost converter and the losses of the third route.
In
In
The first switching converter 73 and the second switching converter 74 can be supplied through the DC voltage input. The first switching converter 73 in
The second switching converter 74 in
Together, the first switching converter 73 and the second switching converter 74 form a symmetric high-frequency switching buck converter.
In
A basis for the current reference can be formed by calculating the fundamental harmonic of the grid 72 voltage. The current reference can follow the sinusoidal waveform of the fundamental harmonic with the same frequency and phase. The amplitude of the current reference can then be modified by a Maximum Power Point Tracker (MPPT), for example, which controls the extraction of power from the solar power arrays 71.
The second switching converter 74 is supplied from the neutral terminal vdc0 and the negative terminal vdc− and produces a negative current in through its output inductor Ln. The produced negative current in follows the lowest phase current of the current reference at the given time.
In
In
An arrangement of bidirectional switching devices S7 to S9 connected between the third switching converter output and each of the phase conductors acts as the current distributing means 77 for the third switching converter 75. The bidirectional switches S7 to S9 can be capable of connecting the third switching converter 75 output to the phase conductors a, b, and c, making the arrangement 77 capable of allocating the produced intermediate current im to the correct output phase conductor.
The apparatus 70 further includes control means for controlling the current distributing means 76 and 77. The current distributing means 76 and 77 in
The apparatus 70 in
If the produced three-phase current can be assumed to be sinusoidal and in phase with the grid 72 voltage, the semiconductors in the third route can be rated to withstand only a fraction of the rated power of the semiconductor components in the first and second routes.
At the same time, the current distributing means 76 and 77 can be adapted to operate at a lower switching frequency than the switching converters 73 to 75.
The switches in the first switching converter 73, the second switching converter 74, and the third switching converter 75 can be MOSFETs, IGBTs, JFETs or BJTs, for example. As in
The bidirectional switches S7 to S9 and the switches S1 to S6 in the inverter bridge 76 can be IGBTs, thyristors or GTOs, for example.
The apparatus 70 can provide a high efficiency as it can be implemented by using only two fast switching devices with a high current rating. The apparatus of
According to another exemplary embodiments, the implementations of the switching converters 73 to 75 and the current distribution means 76 and 77 can be expanded from the exemplary embodiments shown in
a illustrates an exemplary implementation of the third route, where a third switching converter 91 is implemented by using a NPC inverter leg, and current distributing means 92 for the third switching converter 91 can be implemented by using two antiparallel silicon-controlled rectifiers (SCR).
b illustrates another exemplary implementation of the third route, where a third switching converter 93 is implemented by using a T-type NPC inverter leg, and current distributing means 94 for the third switching converter 93 can be implemented by using a Vienna-type bi-directional single switch configuration.
Alternatively, other topologies, such as a flying capacitor topology can be used for the third route. The first and second routes can also be implemented in various alternative ways.
In some cases, such as in solar panel applications, the DC source voltage can not always be sufficient for guaranteeing proper operation of the switching converters of the disclosed apparatus. Thus, a DC-DC boost converter can be used between the DC source and the switching converters shaping the current.
a illustrates an exemplary block diagram where a boost converter 101 is used. The boost converter is located between the solar panel 102 and a DC link 103. A first switching converter 104, a second switching converter 105 and a third switching converter can be connected to the poles of the DC link 103.
b illustrates another approach for using a boost converter in the input of the disclosed apparatus. As generating the intermediate current can specify less DC voltage reserve, a third switching converter 107 producing the intermediate current can be connected directly to the DC voltage source, as illustrated in
The operation of an arrangement as illustrated in
The results show that the disclosed apparatus can guarantee a sinusoidal output current.
a to 11d illustrate simulated waveforms.
b shows the positive current ip generated by the first switching converter 73 and the negative current in generated by the second switching converter 74. Both currents carry a 150 Hz AC ripple. As the produced currents can be generated by the switching converters, they also contain a small ripple at the switching frequencies of the switching converters 73 and 74.
a to 12d illustrate simulated waveforms related to phase a of the three-phase output.
a shows the phase voltage va of the grid voltage.
b shows a first partial output current ipn,a constructed by the inverter bridge 76 for the phase a. In the manner illustrated in
c shows a second partial output current im,a for the phase a, constructed by the arrangement 77 of bidirectional switches. The second partial output current im,a is constructed by sequentially supplying the output phase a with the produced intermediate current im.
d shows the resulting phase output current ia. As shown in
a to 13f show gate signals of the switching converters and the current distributing means with respect to the phase a of the three-phase output.
a to 13c illustrate the gate signals of the first switching converter 73, the second switching converter 74, and the third switching converter 75, respectively.
d and 13e show the gate signals for a leg of the inverter bridge 76 controlling phase a. The switching frequency is at 50 Hz.
Thus, it will be appreciated by those skilled in the art that the present invention can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. The presently disclosed embodiments are therefore considered in all respects to be illustrative and not restricted. The scope of the invention is indicated by the appended claims rather than the foregoing description and all changes that come within the meaning and range and equivalence thereof are intended to be embraced therein.
Number | Date | Country | Kind |
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13156384.3 | Feb 2013 | EP | regional |