BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram showing an optical information recording and reproducing apparatus according to an embodiment of the present invention.
FIG. 2 is an explanatory diagram showing a positional relationship among preceding and following cells and a light spot in a case where a cell center value is sampled.
FIG. 3 is an explanatory diagram showing a positional relationship among the preceding and following cells and the light spot in a case where a cell boundary value is sampled.
FIG. 4 shows a structure in which an M-value mark and N-value marks are recorded in a block and sampling locations of data used for level correction in a first method according to the present invention.
FIG. 5 is an explanatory diagram showing a width of an information pit in a track direction, which is changed according to a level, in a case where the M-value mark is recorded based on a binary level.
FIG. 6 shows an algorithm for performing the level correction on a reproduction signal in the present invention.
FIG. 7 shows a cell center value learning table (one cell of M-value mark and two cells of N-value mark, M=2) consulted for performing the level correction by the first method according to the present invention.
FIG. 8 shows a structure in which M is set to 2, N is set to 8, and cells of two M-value marks and three N-value marks are recorded in a block in a second method according to the present invention.
FIG. 9 shows a cell boundary value learning table (two cells of M-value mark, M=2) consulted for performing level correction by the second method according to the present invention.
FIG. 10 shows a structure in which M is set to 2, N is set to 8, and cells of three M-value marks and three N-value marks are recorded in a block in a third method according to the present invention.
FIG. 11 shows a cell center value learning table (three cells of M-value mark, M=2) consulted for performing level correction by the third method according to the present invention.
FIG. 12 is a schematic block diagram showing an AGC circuit according to the embodiment of the present invention.
FIG. 13 is an explanatory diagram showing a multi-level data determining method for a multi-level data determination circuit.
FIGS. 14A and 14B show learning tables used for multi-level data determination, in which FIG. 14A shows a cell center value learning table and FIG. 14B shows a cell boundary value learning table.
FIG. 15 is an explanatory diagram showing a method of determining a candidate value of a target cell based on the cell center value learning table of a cell center value determination section shown in FIG. 13.
FIG. 16 is an explanatory diagram showing a method of determining a candidate value of the target cell based on the cell boundary value learning table of a cell boundary value determination section shown in FIG. 13.
FIG. 17 is an explanatory diagram showing an algorithm for a final value determination section shown in FIG. 13.
FIG. 18 is an explanatory diagram showing an algorithm for determining a multi-level of the target cell shown in FIG. 17.
FIG. 19 is an explanatory diagram showing an algorithm for correcting a multi-level of a preceding cell shown in FIG. 17.
FIG. 20 is an explanatory diagram showing widths in a track direction and corresponding combinations of three bits based on different levels of multi-level information pits.
FIG. 21 is an explanatory diagram showing amplitude distributions of the cell center values.
FIG. 22 is a simple diagram showing a normal block structure of a fixed pattern region for performing the AGC and the level correction in an optical disk.