The invention relates to the field of communications and, more specifically, to a receiver adapted for use in a system that utilizes symbols with a cyclic extension or similar type of repetition of time-domain samples.
Communication systems typically require mechanisms to provide synchronization at the receiver. Such mechanisms are in particular required for orthogonal frequency division multiplexing (OFDM), a communication scheme for transmitting data over N parallel sub-carriers, which is used within the context of Digital Video Broadcasting (DVB) systems, certain wireless local area networks, digital radio systems, power line communications as well as other systems.
An OFDM symbol of length L=N+G consists of N (complex) time-domain samples emerging from an OFDM modulator, as well as a cyclic extension of length G. The cyclic extension is a portion of the N samples taken from the end and/or beginning and positioned preceding and/or following the N samples. The cyclic extension may be utilized as an aid in distinguishing one OFDM symbol from another, as well as function as a guard interval for mitigating inter-symbol interference (ISI) and other undesirable propagation effects.
For an OFDM symbol to render any useful information, an OFDM receiver must be able to distinguish the OFDM symbols. A correlation technique is normally used to determine a starting point of an OFDM symbol. However, in certain communication systems, including DVB-T systems, the precise length of an OFDM symbol is not known to a receiver. Common methods of determining the length of the symbol and estimating its position have been to guess a certain symbol length, perform correlations of the received signal, and to see how the correlation changes over time. If the correlation increases beyond a threshold level, the OFDM symbol is deemed to have been found. While likely to ultimately succeed, this brute force method is time consuming and susceptible to various error sources. Moreover, these random guesses may also not provide a sufficient result in a reasonable amount of time.
Various embodiments generally relate to a method for synchronizing a receiver detecting symbols with a cyclic extension or similar type of repetition of time-domain samples, including iteratively performing the steps of receiving a stream that includes a sequence of symbols, estimating the size of the symbols, extracting an amount of the stream according to the estimated size of the cyclic extension, and comparing the extracted amount to the stream to determine thereby a portion of the stream likely to include a symbol start point.
The teachings of the present invention can be readily understood by considering the following detailed description in conjunction with the accompanying drawings, in which:
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures.
Various embodiments will be primarily described within the context of achieving receiver synchronization while detecting an orthogonal frequency division multiplexed (OFDM) signal utilizing a cyclic extension. However, it is fully contemplated that the various embodiments described herein are also equally applicable to detecting similar signal types, including (but not limited to) discrete multi-tone (DMT) modulation, which denotes OFDM-based communications where the transmission is adapted to the channel conditions individually for each sub-carrier. An example of a system that employs this modulation scheme is VDSL.
Exemplary receiver 110 includes a baseband recovery/conditioning module 120, a synchronization module 130 and a demodulation/payload extraction module 140. Baseband recovery/conditioning module 120 receives the detected signal, and down-converts it into a (complex) I/Q signal. This step may include further operations, such as filtering, interpolation and quantization. The conditioned signal is then processed by synchronization module 130. Various embodiments to be discussed are directed toward processes implementable by a system such as synchronization module 130, but any system performing a similar function may also be utilized without departing from the basic principles disclosed herein.
Synchronization module 130 includes a symbol synchronization module 132 and cyclic extension removal module 134. Symbol synchronization module 132 determines the length and position of the symbol, thereby providing receiver synchronization. Once its length and position have been characterized, the cyclic extension is removed by cyclic extension removal module 134, leaving only the information-carrying part of the symbol, which is extracted by the demodulation/payload extraction module 140. Module 140 typically performs a Fast Fourier Transform (FFT) and may further provide carrier frequency estimation and compensation, as well as post-FFT equalization and payload extraction. Module 140 may also perform sampling frequency offset estimation which may be fed back to the interpolator in module 120.
Generally, the length of a symbol is not known to the receiver at initial acquisition and the length can vary over time. But it may be known (i.e., the receiver may be aware) that the length of the symbols can only take on a limited number of values. It is the task of the symbol synchronization module to automatically detect the length of an OFDM (or other type of) symbol and its relative position. In various embodiments, correlation is utilized to determine the start time of a symbol.
In an exemplary embodiment, an OFDM symbol has a length L=N+G, where N is the length of the information-carrying part of the symbol and where G denotes the length of the cyclic extension. At any given time, N may be any one of a set of permissible values . Correspondingly, G may be any one of a set of possible values (N). For example, in a Digital Video Broadcasting—Terrestrial (DVB-T) system, ={2048, 8192}, and the ratio of the cyclic extension relative to the symbol length N is an element of { 1/32, 1/16, ⅛, ¼}. Thus, for N=2048, (N)={64, 128, 256, 512}, and for N=8192, (N)={256, 512, 1024, 2048}. This implies that the symbol length of in a DVB-T system can be any element of the set L={2112, 2176, 2304, 2560, 8448, 8704, 9216, 10240}.
In one embodiment, the sampling rate of an OFDM demodulator is known within a given accuracy. For basic concept introductory purposes, an algorithm is initially described wherein N and G have fixed lengths. Other embodiments to be explained will include those for detection of symbols including any length of N and/or G. In the present example, a stream of (real or complex) samples is represented by {y,}, and a quantity of samples L=N+G is sufficient to reconstruct the signal, thus indicating per the current example that no oversampling is assumed. Other embodiments to be described will be applicable to both oversampled and resampled scenarios. In one embodiment, the noise level as well as other propagation effects such as multi-path, are determined, such that if specific detrimental parameters (noise, multi-path, etc.) are relatively low, then fewer samples are needed to determine whether the position of a symbol has been accurately determined.
Of the stream of samples {yt}, a first received signal is y0. A buffer of length L=N+G that holds the elements yi−L . . . yt−1 at time t is initialized with zeros, i.e., yt=0 for −L≦t≦0. A basic objective of various embodiments is to ascertain a correlation c, between a signal that has been time delayed by N samples and an incoming signal to determine whether the two signal sequence segments (up to length G) are substantially identical. That is, ct may be expressed as
where yt−N−g* denotes the complex conjugate of yt−N−g. The elements ct may generally be expressed as
ct=ct−1+ytyt−N−yt−GY−N−G* (2)
The above described correlation may be performed multiple times (e.g., in continuing succession) for multiple symbols. The correlation values accumulating over a period L=N+G are stored as a stacked correlation vector s of length L, wherein the coefficients sl(r) after r stacked correlations are given as an example by
s1(r)=αs1(r−1)+c(r−1)L+1, (3)
wherein α is a weighting factor. If α=1, the full value of each correlation value is added (stacked) upon a previous value. In various embodiments to be explained, α=1 will provide the best performance under adverse channel conditions, and it will be desirable to maintain α=1 for all or most of the time. But, α does not have to remain static over all successive stacking operations. That is, α may be set or adjusted, for example, to cause the influence of older correlations to disappear over time. In one embodiment, at the initialization of every new stacking procedure, all elements of vector s(( )) are set to zero. But, it is also envisioned that vector s can be (partially) reset or reinitialized by adjusting α to a specific value 0<α<1, to not completely alleviate the influence of all past correlation values.
In one embodiment, an average energy coefficient is determined for the elements of the stacked correlation vector to further aid in the determination of the correct starting position of the symbol. An average energy coefficient E(r) is specified for example as
A maximum value of the value θ(r) of the stacked correlation vector s(r) is also determined over its length L, which may for example be expressed as
wherein the operator “arg max” denotes the argument or the element index associated with the maximum value.
Utilizing E(r) and θ(r), the width of a correlation “peak” is determined. When a “peak” exists that has a width greater than zero, it may be referred to as a “plateau.” In one embodiment, the “width” of a plateau is determined by an algorithm that first determines two integers l1 and l2 such that
sθ−q
for all 0≦q1≦l1 and
sθ+q
for all 0≦q2≦l2, wherein “mod” denotes the modulo operator. Subsequently, the energy of a “peak” is determined by
Note that in equations (6) and (7), it is not necessary to calculate the square root of E(r) exactly. Depending on the embodiment, an approximation of appropriate order of magnitude or suitable other threshold that produces an acceptable margin of error, will be sufficient in many cases.
In one embodiment, a threshold value T(N,G) for a given N and G is predefined, such that below T(N,G), a value of Epeak(r) is considered to not have sufficient energy relative to the rest of the correlation vector to indicate that a cyclic extension location has been established. That is
The stacking procedure continues until a value of Epeak (r) equal to or above T(N,G) is reached, indicating a cyclic extension location has been established, or
In one embodiment, the conditions of inequality (10) being met indicate that the next most likely starting position is at or near θ (and receiver synchronization can-be/has-been established), assuming l1≈l2. Otherwise, an expected starting position is assumed to be at θ+(l2−l1)/2, or near the middle of the region where the correlation values are above T(N,G).
Thus, it follows from equations/inequalities (1) through (10) that a synchronization module such as synchronization module 130 of
To summarize, an exemplary algorithm represented by equations (1) through (10) stacks a configurable number of correlation vectors to detect the size and location of a cyclic extension. An “observation window” (e.g., an estimated size of N and G) is configured to check all or several possible combinations of symbol lengths in a predefined order. It will be shown later with respect to various embodiments that this can be performed for one particular choice of N and G at a time, or all possible values thereof contemporaneously. The stacking algorithm amplifies a correlation peak and mitigates noise and other undesirable propagation effects by averaging. Once the peak becomes sufficiently distinct, symbol synchronization is achieved. That is the length of the symbol and the position of the cyclic extension are deemed to have been detected and the resulting information may be passed to a cyclic extension removal module for further processing.
By adjusting the number of stacked correlation vectors, various embodiments have been shown to be very robust under adverse channel conditions such as inter-symbol interference (ISI) and multi-path distortion. In a multi-path environment, a receiver detects a signal that is the weighted sum of several delayed copies of each OFDM (or DMT, etc.) symbol, which widens a correlation peak width. In one embodiment, an algorithm measures the width of the correlation peak in order to locate a position for which the corresponding sample is the weighted sum of sample points of a cyclic extension, identifying instances of multi-path.
As mentioned, equations/inequalities (1) through (10) describe an algorithm for achieving receiver synchronization for fixed values for N and G.
Method 200 begins at block 210 and proceeds to block 220, wherein a stream of samples having unknown lengths of N and G is received. At block 230, multiple respective amounts of samples from the received stream are extracted according to multiple possible lengths of N and G. The multiple extracted amounts of samples according to the possible lengths of N and G are then contemporaneously compared to the received stream of samples at block 240 (e.g., utilizing equations/inequalities (1) through (7)). In various embodiments, “comparison” in block 250 includes iteratively stacking correlation coefficients between the extracted and received samples until N and G are identified, or other period of time as will be explained in more detail with respect to
By contemporaneously extracting and comparing multiple sample amounts of possible lengths N and G to a received stream, method 200 eliminates the need for time consuming synchronization methods based on “guessing” the lengths of N and G and performing synchronization operations in series. Rather, method 200 (and hardware to be discussed with respect to
In various embodiments, once the boundaries of a symbol are deemed to have been detected, it is contemplated that further operations can be performed by module 140. These modules can provide feedback to module 130. If correct synchronization is indeed obtained, it is likely to successfully perform an FFT, equalize and extract the payload. If, on the other hand, synchronization has not been obtained, it will become obvious when processing the signal in module 140 that payload extraction is not possible, and method 200 must be performed or repeated.
It is also contemplated that in various embodiments, after synchronization has been obtained, it will be sufficient to monitor the obtained cyclic extension position in the received stream, rather than performing the entire method 200. For such monitoring, a portion of the same hardware utilized to perform method 200 can be utilized, while the remainder thereof can be put into a “sleep” or standby mode and “wake-up” when synchronization is lost.
In the case of a non-exactly selected cyclic extension size (and/or adverse channel conditions), correlation curves 300B and 300C such as those depicted in
It is fully envisioned however, that a threshold metric for ascertaining whether cyclic extension size and position have been accurately determined (e.g., correlation values such as in
It should be noted that
In various embodiments, if the symbol starting position was assumed to occur at a position where it does not, random data will be correlated at N positions apart. If, on the other hand, we are less than G positions away from the correct starting position, a triangle-like correlation begins to occur, which maximizes at the right position. In case of multi-path and noise, the shape of the correlation may be more blurred. As will be shown in
As an example, for each stacking iteration 351-355, correlation is performed over approximately L samples between the extracted and received amount of samples per block 240 of method 200. If after a given correlation iteration, a sufficiently strong peak 310 (e.g., sufficient to satisfy equation (10)) is not located, correlation is repeated and those subsequent correlation values (cumulatively) stacked on top of each preceding value, to amplify any correlation that might exist but was not sufficiently pronounced due to adverse channel conditions or other reasons.
If correlation was present but suppressed due to a poor channel, the peak 310 will grow after stacking of the subsequent iteration—e.g., peak 352 compared to 351. In various embodiments, if a peak 310 does not grow after a particular number of stacking iterations, it can be deduced that a likely location 305 of cyclic extension a cyclic extension was not able to be located. In this situation, the stacking operation may be reset and/or other possible values of N and G may be considered if all were not being contemporaneously evaluated already.
Stacking iteration profile 360 is similar to profile 350, but demonstrates iterative stacking occurring in the presence of channel multi-path, which is a realistic channel condition. As with stacking iteration profile 350, stacking iteration profile 360 include stacking iterations 1 through 5 (361 through 365 respectively). However, compared to iterations 351-355, the correlation peaks of iterations 361-365 have been widened due to multi-path. Yet, iterative stacking improves the peak definition with each iteration, providing a clear indication of correlation even in the presence of such conditions. Stacking iteration profile 360 is an example of where procedures such as those discussed with respect to equations (9) and (10) may be utilized to ascertain if proper cyclic extension selection has occurred.
As an example, synchronization module 400 depicts an embodiment wherein it is assumed that N has two permissible values (e.g., {N1, N2}) where N1<N2. However, various embodiments as a whole should in no way by virtue of the present example be construed as limiting N to have only two permissible values. To the contrary, various embodiments are fully contemplated that permit N (as well as G) to assume any value. To provide a correct delay for the CVC unit 420, synchronization module 400 includes (as an example) B(2) having a length N1 and N2=B(1)+B(2)+B(3). Those skilled in the art and informed by the teachings herein will readily appreciate that alternate buffer lengths B(1), B(2), B(3) . . . B(i) may be implemented and combined to facilitate processing of symbols having of any length L=N+G. In various embodiments, the overall sum of buffer lengths (B(1)+B(2)+B(3)+B(i)) may generally (but not necessarily) be chosen so as to be the largest possible value of as in
The output of each CVC unit 420 is processed by a time-delayed multiple moving correlation averaging (TD-MMCA) module 430. In one embodiment, TD-MMCA module 430 is specifically designed to process a given value of N and (N), wherein as has been mentioned with respect to equations/inequalities (1) through (10), G is related to (N) such that Gε(N). The respective outputs of TD-MMCA modules 430 are processed by control unit 440, which provides an output signal indicating synchronization has been achieved, the cyclic extension can be removed and information-carrying portion of the symbol processed (e.g., via modules 134 and 140 or other suitable devices). The detected length N of the information carrying part of the symbol is conveyed to subsequent modules.
qt=fq(yt,yt−N), (11)
wherein fq denotes the sample-by-sample correlation function. It should be noted that a cyclic extension length value G is no longer included as an initial argument of the time shifted function tt−N, since a symbol is being detected wherein G is unknown. Similar to equation (2), the elements qt may generally be expressed as
fq(yt,yi−N)=ytyt−N*. (12)
However, fq may also be expressed as
fq(yt,yt−N)=|yt−yi−N|2. (13)
wherein equation (13) returns a minimum correlation rather than a maximum.
It is fully contemplated that other and further correlation parameters may also be utilized beyond those thus far mentioned. The correlation function may for example comprise more than two arguments and the resolution of the result reduced in embodiments where appropriate. Depending upon a specific application, various embodiments may also be able to tolerate a reduction in numerical precision (e.g., by reducing buffer size) if the reduction does not lead to a significant loss in system performance. It will thus be appreciated that any suitable means of comparing an extracted amount of samples with an incoming signal may be performed without departing from the general scope.
TD-MMCA module 500 includes a plurality of buffers 510(−2) . . . 510(2) of varying respective delays D(−2) . . . D(2) to collectively process all possible delays of the correlated signal yt−N. In general (but not necessarily in all cases), the element yt−N may be discarded as soon as qt has been determined. As such, buffers 510 are configured in various embodiments to provide storage for at least N elements. It may also in some embodiments be sufficient to utilize lookup tables to perform a coarse mapping for a given yt and yt−N, in certain cases circumventing the need of multipliers.
In various embodiments, correlation coefficients q, obtained per equations (11)-(13) are combined at time t for a single symbol with a cyclic extension of length G according to a sequence
having a value that may be expressed as
st=st−1+(qt−qt−G), (15)
where qt=0 for t<0. The stacking process represented by equations (14) and (15) is performed by respective Moving Correlation Averaging (MCA) modules 520(0) . . . 520(2). It follows from equations (14) and (15) that a buffer length of G is required to hold the values ct−G . . . ct−1, which in one embodiment may be implemented as a cyclic buffer (RAM having with a counter modulo the size of a buffer) or suitable alternative. Correspondingly, the MCA modules 520(0)-(2) are configured to stack coefficients qt for all possible delay values. In the embodiment with respect to TD-MMCA module 500 embodiment, as an example, MCA module 520(0) stacks correlation values including a delay value D(0), MCA module 520(1) stacks correlation values including a delay value D(−1)+D(0)+D(1), and MCA module 520(1) stacks correlation values including a delay value D(−2)+D(−1)+D(0)+D(1)+D(2). A control unit 530 interfaces with the MCA modules 520 and identifies the maximum correlation value st for each delay.
By storing G coefficients ct, it is only necessary to store N input values yt−N . . . yt−1, as opposed to embodiments discussed with respect to equations/inequalities (1) through (10), which would require that N+G input values be stored. The correlation output ct is quantized/rounded and stored in a buffer 510(−2) that holds D(−2) values. The output of the buffer is processed by both a MCA module 520 and a next buffer 510(−1) which holds values D(−1), etc. In various embodiments, buffer size is typically chosen such that D(0)=G1 and
D(−i)+D(i)=Gi−Gi−1, (16)
wherein (N){G1, G2, . . . } is an ordered set and G1 is the smallest possible cyclic extension value.
mentioned above as an example, and/or ΣD(i) (in embodiments including additional delays). In one embodiment with respect to
The minimum value observed in the respective MCA units (620, 622, 624, 626) give an indication of a correlation value when it is very unlikely that the correlation window contains the cyclic extension. In this respect, the observing of a minimum value performs a similar function to the calculation of E(r) in equation (4). In one embodiment, the output of one or more of the MCA units are used by a control unit such as 530 of
In embodiments with respect to
The control unit (e.g., control unit 530) measures the time between correlation peaks and the energy and width of the peaks to determine the values of N and G. Stacking may be performed with whatever degree of precision is required to suit an embodiment being implemented. In one embodiment, for example, stacking does not necessarily include all calculated correlation coefficient values. Instead, indices are stored where the correlation coefficient values exceed certain thresholds. This is particularly useful for low signal-to-noise (SNR) conditions or situations where there is severe multipath.
The described embodiments may be implemented within the context of methods, computer readable media and computer program processes. As such, it is contemplated that some of the steps discussed herein as methods, algorithms and/or software processes may be implemented within hardware (e.g., circuitry that cooperates with a processor to perform various steps), software or a combination of hardware and software.
The invention may be implemented as a computer program product wherein computer instructions, when processed by a computer, adapt the operation of the computer such that the methods and/or techniques described herein with respect to various embodiments are invoked or otherwise provided. Instructions for invoking the described methods may be stored in fixed or removable media, transmitted via a stream in a signal bearing medium such as a broadcast medium, and/or stored within a working memory or mass storage device associated with a computing device operating according to the instructions.
Generally speaking, a computing device including a processor, memory and input/output means may be used to process software instructions, store software instructions and/or propagate software instructions to or from a communications channel, storage channel or other computer/system.
While the foregoing is directed to various embodiments, other and further embodiments of the invention may be devised without departing from the basic scope thereof. As such, the appropriate scope of the invention is to be determined according to the claims, which follow.
This application claims benefit of U.S. provisional patent application Ser. No. 60/952,999, filed Jul. 31, 2007, which is herein incorporated by reference.
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20040228270 | Chen et al. | Nov 2004 | A1 |
20070086329 | Glazko et al. | Apr 2007 | A1 |
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Number | Date | Country | |
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20090034668 A1 | Feb 2009 | US |
Number | Date | Country | |
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60952999 | Jul 2007 | US |