METHOD AND APPARATUS FOR THERMAL-TO-ELECTRICAL ENERGY CONVERSION

Information

  • Patent Application
  • 20170207380
  • Publication Number
    20170207380
  • Date Filed
    April 04, 2017
    7 years ago
  • Date Published
    July 20, 2017
    7 years ago
Abstract
An improved method and apparatus for thermal-to-electric conversion involving relatively hot and cold juxtaposed surfaces separated by a small vacuum gap wherein the cold surface provides an array of single charge carrier converter elements along the surface and the hot surface transfers excitation energy to the opposing cold surface across the gap through Coulomb electrostatic coupling interaction.
Description
BACKGROUND

The present invention relates generally to the conversion of thermal energy to electric energy, being more particularly concerned with such conversion as affected by gap-separated juxtaposed hot-side radiator and cold-side charged carrier converter structures. The present invention is a novel combination of coherent excitation transfer through electrostatic coupling between a relatively hot-side surface and a small-gap-separated juxtaposed cold-side converter surface, wherein the latter is of a novel single-carrier cold side converter construction.


The implementation of practical devices through fabrication by now well-known solid-state chip manufacturing technologies is now achievable, promising thermal-to-electric converter arrays of this character offering high power potential.


SUMMARY

In summary, from one of its viewpoints, the invention embraces a method of converting thermal to electric energy, that comprises, juxtaposing relatively cold-side conversion and relatively hot-side surfaces separated by a small gap; providing lower state electrons on or near the cold surface; Coulomb-coupling the lower state electrons to charges on the hot surface; transferring energy from the hot-side surface to said cold-side surface lower state electrons to excite them to a higher state; collecting the higher state electrons at or near the cold surface to generate a higher potential; and extracting the converted electric energy in response to said higher potential. The juxtaposed surfaces are positioned and/or adjusted to be sufficiently close in the surface electric field such that the dipole interaction there between is dominated by Coulomb interaction which transfers energy in the conversion directly by quantum state element (well, wire or dot) interactions along the cold surface.


In its structure or device aspect, the invention embodies in a thermal-to-electric conversion apparatus, relatively hot and cold juxtaposed surfaces separated by a small gas or vacuum gap, the cold surface providing a chip array of single charge carrier converter elements, and the hot surface electrostatically transferring excitation energy to the opposing cold surface converter elements across the gap through Coulomb electrostatic coupling interaction. The gap may be a vacuum gap, however the gap should not comprise a solid or liquid. It may be a gas, and more preferably, it may be a diluted gas with the electron mean-free-path longer than the gap separation.


It is thus a primary object of the invention to provide a new and improved thermal-to-electric energy conversion method and novel apparatus or device structure utilizing the same, embodying an improved hot surface and a juxtaposed relatively cold converter surface separated by a small gap. It is thus a primary object of the invention to provide a new and improved quantum-coupled single electron thermal-to electric energy conversion method and novel apparatus or device structure utilizing the same, functioning as a refrigerator where the load is a power source providing energy into a system to cool the cold-side and to heat the hot-side. In refrigeration mode, power is applied to the quantum dot structure cold side. The electrostatic coupling draws thermal power from the hot side. The quantum element structures may be heat sunk to maintain their temperature. The hot side may be cooled to a lower temperature or thermal power is extracted when the hot side is at an elevated temperature.


A further object is to provide such an apparatus and method employing novel excitation transfer through electrostatic coupling between the relatively hot and cold surfaces together with a new single-carrier cold-side converter chip-like structure.


Still another object is to provide novel chip arrays of such structures.


The invention discloses a thermal-to-electric conversion apparatus comprising a relatively hot surface and a relatively cold surface juxtaposed and separated by a gap selected from the group consisting of a vacuum gap and a gas gap. The cold surface carries a chip array of pairs of closely adjacent single-level and higher-level excitation quantum state elements that serve as an array of single-charge carrier converter elements. The hot surface electrostatically transfers excitation energy to the juxtaposed cold surface converter elements across the gap with the juxtaposed surfaces adjusted to be sufficiently close in a near surface electric field that the dipole interaction there between is dominated by a Coulomb electrostatic coupling interaction whereby the Coulomb interaction transfers the thermal energy in the conversion directly by quantum state element interactions along the cold surface. The apparatus further provides that the gap between the hot surface and the cold surface may be adjusted to be sufficiently small so as to minimize the effects of transverse photon generation relative to the amount of thermal energy transferred by Coulomb-coupling interactions. The converted power per unit area is improved as the gap becomes smaller at very small distances due to Coulomb-coupling interactions. The amount of power converted per unit area is important since it fundamentally impacts the cost of power conversion. In order to maximize the Coulomb-coupled energy transfer, the gap between the hot surface and the cold surface may also be adjusted to be very small.


The apparatus further comprises an electron from a first electron reservoir that is introduced into a lower level excitation state of each of the converter elements on the cold surface, and then Coulomb-couples across the gap to a carrier charge on the hot surface, producing a quantum correlation there between that leads to excitation transfer from the hot surface to the cold surface that promotes said electron to a higher level excitation state. The apparatus of further comprises that the excited higher level state electron thereupon tunnels to a second cold-surface electron reservoir maintained at an elevated potential relative to said first reservoir, and an electrical load is connected between the reservoirs and driven by the current caused by the promoted electron(s). The apparatus may promote only a single type carrier charge is at a time. The single carrier charge may be either electrons or holes, that is, one or the other but not both.


The converter elements may comprise an array of semi-conductor elements that are chip-integrated along the cold surface in a matrix substrate and interconnected by a network, selected from the group consisting of electron reservoir conductors and buses, interleaved within the chip substrate to provide the appropriate connections, selected from the group consisting of series and parallel connections, amongst and between the elements of the array. The arrays of said respective first and second electron reservoir conductors and buses in the array may be commonly connected to opposite sides of said load. The semi-conductor elements may be of InSb material and/or Ga0.31 Ino.69 Sb material or of other materials, including but not limited to cadmium selenide (CdSe), cadmium sulfide (CdS) and cadmium telluride (CdTe) and the like. The material of the hot surface may be selected from the group consisting of flat metal, metallic copper, semi-metal, and highly doped semiconductor material. The election reservoir conductors and buses may be of doped n-type InSb. The chip matrix substrate on the cold side may be GaSb. Other materials, including but not limited to cadmium selenide, cadmium sulfide and cadmium telluride and the like may be used. The hot surface may be about 1300K and the relatively cold surface may be about 300K. However, if the hot surface is to contain quantum elements (dots, wires or wells) the hot surface temperature will need to be lower than 1300K. For higher temperature operation (at or near 1300K) the surface could be an unstructured flat surface comprising materials such as aluminum oxide and the like. The carrier converter elements may be in the form of an array of one or more of semi-conductor elements of varied geometry, selected from the group consisting of dots, bars, semi-conductor short cylinders, semi-conductor short wires, and small sheets providing quantum wells integrated within the chip substrate. The semi-conductor elements and the interconnecting network may be integrated in the substrate, with some oriented parallel to the cold surface, and some oriented horizontally and/or vertically oriented to the cold surface. The dimensions of the dots or bars may be of the order of about 10 to 120 Å.


The invention also comprises a method of converting thermal to electric energy by juxtaposing relatively cold-side conversion and relatively hot-side radiating surfaces separated by a small gap, providing lower state electrons on or near the cold surface, Coulomb-coupling the lower state electrons to the carrier charges on the hot surface, transferring heat from the hot-side surface through the Coulomb coupling to said cold-side surface lower-state electrons to excite them to a higher state, collecting the higher state electrons at or near the cold surface to generate a higher potential and extracting the resulting converted electric energy in response to said higher potential. The conversion cold-side surface comprises an array of interconnected converter elements each having respective quantum wells supporting the lower and higher electron states, and maintained at a ground potential. The collecting of the higher state electrons is effected by tunneling between such ground wells and higher potential wells on the cold side. The converter elements are caused to promote only a single type of carrier charge at a time. The single carrier type charge is one of either electrons or holes.


The thermal-to-electric conversion apparatus comprises relatively hot and cold juxtaposed surfaces separated by a small vacuum gap. The gap may range from less than 0.05 microns (50 nanometers) with a lower limit as small as practically possible such as 0.001 microns (1 nanometer). An array, selected from the group consisting of interconnected quantum elements, may be provided at the cold surface. The quantum elements may be disposed in pairs of 1-excitation level and 2-excitation level quantum element. An array, selected from the group consisting of interspersed grounded higher voltage reservoirs and buses, may be connected to the respective quantum elements of each pair and interconnected through a load. The quantum elements may be selected from the group consisting of quantum dots and quantum wells. Each 1-excitation level quantum dot of the pair may be positioned adjacent the 2-excitation level quantum dot of the pair to allow for tunneling. One of the electron reservoirs and buses may be grounded and the electron excited in the adjacent 2-excitation level well and dot may subsequently tunnel into the 1-excitation level well and dot. The invention may further comprise a set of reservoirs and busses connected to a higher voltage than ground so that electrons excited through Coulomb energy transfer subsequently tunnel in to the 1-excitation level quantum well and dot before relaxing into the higher voltage bus to do work on the load. The electric fields established between the electrons on the hot and cold sides may be such that excitation transfer occurs across the gap. The quantum elements may have various dimensions, in one embodiment quantum elements may have dimensions 10 Angstroms while in other embodiments may range to 120 Angstroms but they may also be larger. The single level quantum elements may have various dimensions, in various embodiments they may range from about 10 to about 100 Angstroms but may also be larger. The 1-excitation level quantum dot may be made of Ga0.31In0.69Sb. Quantum elements may be made of various materials, including but not limited to cadmium selenide, cadmium sulfide and cadmium telluride and the like. In one embodiment, the distance between the quantum well dots may be of the order of about 100 Angstroms. In one embodiment, the electron reservoirs or busses may be positioned about 50 Angstroms from the quantum dots at or near the cold surface but other larger and smaller distances from the quantum elements are possible.


The invention further comprises a method of converting thermal-to-electric energy comprising juxtaposing relatively cold-side conversion and relatively hot-side radiating surfaces separated by a small gap; providing lower state electrons along the cold surface in an array of 1-excitation level quantum elements positioned next to an interleaving array of 2-excitation level quantum elements to allow for tunneling there between; grounding an adjacent bus array to provide an electron for the ground states of the 2-excitation level quantum elements; promoting an electron to an excited state in the 2-excitation level quantum elements by Coulomb energy transfer from the hot-side; and permitting the excited electrons subsequently to tunnel into the corresponding 1-excitation level quantum elements before relaxing into any array of higher voltage reservoirs or busses to do work on a load connected between the array of buses.


The invention also comprises a method of converting thermal-to-electric energy of juxtaposing a relatively hot surface and a relatively cold surface and separating the surfaces by a small gap, selected from the group consisting of a vacuum gap and a gas gap; carrying a chip array of pairs on the cold surface of closely adjacent single-level and higher-level excitation quantum state elements that serve as an array of single-charge carrier converter elements; electrostatically transferring excitation energy from the hot surface to the juxtaposed cold surface converter elements across the gap; adjusting the juxtaposed surfaces to be sufficiently close in a near surface electric field that the dipole interaction there between is dominated by a Coulomb electrostatic coupling interaction whereby the Coulomb interaction transfers the thermal energy in the conversion directly by quantum state element interactions along the cold surface.


The thermal-to-electric conversion apparatus also comprises relatively hot and cold juxtaposed surfaces separated by a small vacuum or gas gap. The cold surface provides a chip array of single charge carrier converter elements. The hot surface electrostatically transfers excitation energy to the opposing cold surface converter elements across the gap through Coulomb electrostatic coupling interaction.


Other and further objects will be described hereinafter and will be more particularly pointed out in connection with the appended claims. Preferred designs and embodiments, including a best mode design, are hereinafter more fully presented.


The invention disclosed herein is, of course, susceptible of embodiment in many different forms. Shown in the drawings and described herein below in detail are preferred embodiments of the invention. It is to be understood, however, that the present disclosure is an exemplification of the principles of the invention and does not limit the invention to the illustrated embodiments.





BRIEF DESCRIPTION OF THE DRAWINGS

These and other features, aspects and advantages of the present invention will become better understood with regard to the following description and accompanying drawings wherein:



FIG. 1 of which is a basic schematic diagram of an idealized conception underlying the invention;



FIG. 2 is an expanded isometric schematic view of a preferred device for practicing the methodology of the invention embodying solid state conversion arrays as implementation;



FIG. 3 is a similar diagram of such an array of the novel thermal-to-electric converter elements of the type shown in FIG. 2; and



FIGS. 4 and 5 are respective load power density and efficiency of performance graphs attainable with such an embodiment of the invention.





DETAILED DESCRIPTION

Turning first to the roadmap of our said FIG. 1, this involves an idealized theoretical explanatory scheme consisting of a hot-side surface SH and a juxtaposed cold-side carrier charge-to-electricity converter surface SC separated by a small vacuum gap g. On the cold side, there is schematically shown a first quantum well WC1 having a lower electron potential level 1 and an upper level 2 and wherein an electron is introduced or supplied into the lower level or state 1 from a source of electrons called a reservoir r1, which may be at relative ground potential. As later explained, in practical implementation, the well WC1 may be inherently provided in a quantum dot, such as an appropriate semi-conductor dot, and the electron reservoir r1 may be a conductor of a conducting network interconnecting such dots in an array or matrix of dots distributed along the cold-side SC as later more fully described in connection with the embodiments of FIGS. 2 and 3.


Electrostatic coupling to charges on the hot side surface SH produces a quantum-correlation. This appears schematically in FIG. 1 as a well WH with two levels connected to an electron reservoir ra. As an electron is supplied from the cold-side reservoir r1 to the cold-side level 1 of the well WC1, accordingly, Coulomb electrostatic coupling between that electron and a charge on the hot side produces a quantum correlation between the cold side electron and such carrier, providing electrostatic interaction U that leads to excitation energy transfer from the hot side to the cold side, thereby elevating the electron in the cold-side well WC1 up to higher potential level or state 2, as indicated by the upward arrow portion shown below the symbol U. From this upper state 2, the electron may tunnel, as shown schematically at V, through a potential barrier PB to a matched level 21 in a second quantum dot well Wcr on its way to a second reservoir r2 which is at elevated voltage relative to ground, as schematically illustrated at +. The well Wcr permits only one level—level 21. The two cold-side reservoirs r1 and r2 are connected together through an electrical load, so-labeled. Thus, when elections are promoted in the first quantum well WC1, they have the possibility of tunneling to the second well Wcr and then continuing on to do electrical work before ending up in the first reservoir r1 at ground.


The levels of the hot-side relax to an electron reservoir rA comprising a continuum of excitation levels, wherein the level “a” is coupled to each level in the reservoir with matrix element m2 and m3.


Electric fields between an electron on the hot side well WH and an electron on the cold side, couple the product states |b>|1> and |a>|2> with coupling U such that excitation transfer can occur across the gap g. Level 1 of the well WC1, in turn, relaxes to reservoir r1 with matrix element m1 and level 21 of well Wcr relaxes to reservoir r2 with matrix element m4.


In Coulomb-coupling energy is transferred from a hot-side electron to a cold-side electron through the Coulomb force between the two electrons. The basic mechanism of the device is that high temperature on the hot side results in excited electrons in the hot-side image, with excitation transferred via electrostatic interaction coupling U (between the hot-side charge, which is itself coupled to excited electrons and phonon modes, and the cold-side electron) to promote a cold-side electron from level 1 to level 2 in well WC1. The invention of FIG. 1 can also functions as a refrigerator where the load is a power source providing energy into the system to cool the cold-side down and to heat up the hot-side.


In summary, thus, an electron reservoir on the cold side supplies an electron to a lower state; and coupling with the hot side causes the electron to be promoted to an excited state, and then the electron proceeds to a second electron reservoir at elevated potential. An electrical load connected between the two reservoirs can be driven from the electrical current caused by the promoted electrons. Such a scheme can work with either electrons or holes. We have called it a “single carrier converter” since, in accordance with the invention, it is only a single carrier that is promoted at a time (either an electron or a hole but not both), as opposed to a photovoltaic in which electron-hole pairs are created and photon exchange coupling occurs, namely an electron on the hot side emits a photon and an electron on the cold side accepts the photon. This photon exchange coupling is in contrast to Coulomb coupling. The magnitude of the photon exchange coupling and the Coulomb coupling have different distance dependencies (that is, the distance between the hot-side and the cold-side) where Coulomb coupling has a 1/R3 dependence on distance while the photon exchange coupling has a 1/R dependence. Coulomb coupling dominates over the photon exchange coupling at narrow distances roughly shorter than the wavelength corresponding to the energy separation of the cold-side single level and higher level excitation quantum state elements divided by 2π or at distances roughly shorter than λ/2π. At larger distances, the Coulomb coupling decays rapidly.



FIG. 2 presents an exploded view of a preferred physical structure of a thermal-electric converter constructed in accordance with the invention to operate in accordance with the methodology thereof as outlined in FIG. 1. As explained previously, the cold-side surface Sc of the device is shown juxtaposed to the hot-side heat emitter surface SH with a small vacuum gap g there between. The cold-side converter comprises an array of appropriate semi-conductor small elements or dots, two of which are shown as “Dot 1” and “Dot 2”, implemented as by well-known chip technology and in a chip substrate matrix schematically illustrated by S. In practice, these semi-conductor converter dots may assume any desired geometry, such as the rectangular boxes or bar elements shown, supporting and serving as quantum-confined electron energy excitation state wells (WC1 and Wcr, FIG. 1) along (at or near) the surface Sc. Other forms of these semi-conductor elements may include small cylinders or wires, small quantum-well sheets or even molecules. The array of dot elements or the like will be conductor-interconnected, as earlier mentioned by, a network of conductors feeding and outputting electrons to and from the respective elements (reservoir r1, r2, etc. in FIG. 1) interconnecting the array of dot elements in series and/or in parallel fashion, as appropriate, and also formed into the substrate matrix S of the converter chip side of the device. In the device of FIG. 2, moreover, segments of these electron “reservoir” conductors are shown at “Reservoir 1” (r1 in FIG. 1) and at “Reservoir 2” (r2 in FIG. 1) as rectangular cross-section bus portions.


In accordance with the invention, in an appropriately dimensioned structure, the charge in the quantum dot on the cold side surface Sc will couple to a charge on the nearby conductive hot-side surface SH, providing a coupling to surface currents, resulting in the two-level system model of the invention herein presented.


In the device of FIG. 2, the hot side surface SH may accordingly be a simple flat surface comprising aluminum oxide or a metal, semi-metal or highly doped semiconductor. The metal surface has surface charges and the charges act as an effective dipole with zero energy separation that is coupled to thermally excited electrons and phonons. Across the gap g, the cold-side is shown as comprising the before-mentioned two quantum dots on the surface SC; Dot 1 having two levels (well WC1 of FIG. 1) and they couple to the hot-side dipole via the electrostatic Coulomb coupling interaction before described. Dot 2 has one level (in well Wcr of FIG. 1) and it couples to the excited upper level of Dot 1 (state 2 in well WC1 of FIG. 1) through the tunneling (V). The lower level of Dot 1 (level 1 in well WC1), as before stated, relaxes to the ground voltage conductor Reservoir 1 (r1 in FIG. 1). The Dot 2 level relaxes to conductor Reservoir 2 which is at the elevated voltage +. Reservoir conductor 1 is shown having a horizontal branch bus portion extending from the vertical leg of the bus conductor in order to couple the lower level of Dot 1, the branch being oriented horizontally to Dot 1 and facing the center of Dot 1, with a distance. Reservoir conductor 2 is shown parallel to Dot 1 and it runs parallel along the surface SC next to Dot 2, with a distance. Where desired, these dot and conductor elements may also be oriented at other angles, including substantially perpendicular to the plane of the surface SC.


The converter elements may comprise an array of semi-conductor elements that are chip-integrated along the cold surface in a matrix substrate and interconnected by a network of electron reservoir conductors or buses, interleaved within the chip substrate to provide the appropriate series and/or parallel connections amongst and between the elements of the array.


The cold-side structure is repeated as an array over the surface SC as shown in FIG. 3, with the Reservoir 1 conductor buses linked together, and the Reservoir 2 conductor buses linked together, and within Reservoirs 1 and 2 connected through the load as in FIG. 1.


In one embodiment, a simulated specific structural design of this implementation, we obtained the following exemplary results. The temperature on the hot-side is 1300K, and that on the cold-side, 300K. Dot 1 has x×y×z dimension 120 Å×100 Å×100 Å and is of the preferred material InSb. The energy separation of the Dot 1 levels is 0.2 eV. The relaxation time of InSb at 0.2 eV is 1 .ps. The hot-side is metallic copper, in this equipment, of which relaxation time at 0.2 eV is 0.57 fs. In one embodiment, Dot 2 has dimension 50 Å×100 Å×100 Å and is horizontally pointing to the top part of Dot 1. (FIG. 2 is not drawn to scale). Dot 2 is of material Ga0.31In0.69Sb but may also be comprised of other materials as described herein. The distance between Dot 1 and Dot 2 is 100 Å. Reservoir 1 branch is horizontally positioned 50 Å away from the center of Dot 1. Reservoir 2 is located 50 Å next to Dot 2. Both reservoirs are preferably made up of n-type InSb doped such that its relaxation time at 0.2 eV is 10 ps. The relaxation time for an n-type InSb with doping level 3×1017cm−3 at 0.2 eV is 52 ps, and it is expected that the relaxation time will decrease to zero as the doping increases, since this is the behavior at DC. Therefore there exists a doping level with any desired relaxation time. The surrounding matrix material substrate on the cold side may be GaSb. In other embodiments, the quantum element dimensions, spacing there between and materials may differ as described herein.


Electrostatic interaction increases with smaller vacuum gap thickness. Radiative heat transport occurs between the hot and cold region, however, if two surfaces are close together, the amount of useful power transferred from the hot to cold side increases much more rapidly because of the effects of Coulomb coupling. In a vacuum, Coulomb coupling dominates over photon contribution by the absorption wavelength in the divided by 2π. For example, the absorption wavelength corresponding to 0.2 eV is 6.2 μm, and hence the gap should be below about 1 μm for that case in a vacuum. In the calculations, Coulomb coupling dominates below about 500 Angstroms because of the dielectric constants. Therefore if the gap between the hot surface and the cold surface is sufficiently small, the effects of transverse photon generation are minimized relative to the amount of thermal energy transferred by the Coulomb interaction. The converted power per unit area is improved as the gap becomes smaller at very small distances due to Coulomb-coupling interactions. The amount of power converted per unit area is important since it fundamentally impacts the cost of power conversion. If the gap between the hot surface and the cold surface is sufficiently small the converted power per unit area will be increased due to Coulomb-coupling interactions. Gaps below 50-100 nanometers with a lower limit as small as practically possible such as 1 nanometer may facilitate the maximization of the amount of thermal energy transferred by the Coulomb interaction.


Shown in FIG. 4 and FIG. 5 are the power on load density and efficiency, respectively, as a function of voltage for the device. An initial estimate for maximum power per unit active area is 202 W/cm2 occurring at voltage 107 mV. FIG. 5 shows that the maximum efficiency 49.8% occurs at voltage 129 mV.


While the invention has been described with references to its preferred embodiment, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the true spirit and scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teaching of the invention without departing from its essential teachings.

Claims
  • 1-57. (canceled)
  • 58. A thermal-to-electric conversion apparatus comprising: a hot side element juxtaposed to a cold side element separated by a small gas-filled or vacuum gap, wherein the hot side element comprises hot side dipoles transferring excitation energy across the gap to promote cold side carriers, andwherein the cold side element comprises an array of one or more cold side converter elements, each cold side converter element comprising one or more a cold side carriers supplied from one or more first cold side reservoirs to one or more first cold side quantum wells being promoted from a lower energy level to a higher energy level by the transferred excitation energy.
  • 59. The Apparatus of claim 58, wherein the hot side element comprises a simple surface.
  • 60. The apparatus of claim 59, wherein the simple surface is selected from the group consisting of metal, semi-metal, semiconductor, and insulator.
  • 61. The apparatus of claim 58, wherein the hot side element comprises one or more hot side quantum wells with one or more excited energy levels supplied with one or more excited carriers by one or more hot side reservoirs.
  • 62. The apparatus of claim 58, wherein the one or more cold side carriers is selected from the group consisting of electrons and holes.
  • 63. The apparatus of claim 58, wherein only one cold side carrier is promoted at a time.
  • 64. The apparatus of claim 58, wherein the one or more promoted cold side carriers that tunnel through one or more cold side potential barriers are received by one or more second cold side reservoirs at elevated voltage.
  • 65. The apparatus of claim 58, wherein the one or more promoted cold side carriers tunnel through one or more cold side potential barriers to one or more second cold side quantum wells connected to the one or more second cold side reservoirs at elevated voltage.
  • 66. The apparatus of claim 64, wherein the one or more second cold side reservoirs are connected to the one or more first cold side reservoirs through one or more electrical loads.
  • 67. The apparatus of claim 58, wherein the one or more first and/or second cold side quantum wells is selected from the group consisting of dots, cylinders, wires, quantum well sheets, molecules, rectangular boxes and bar elements.
  • 68. The apparatus of claim 58, wherein the one or more cold side converter elements are connected by a chip-integrated network of conductors.
  • 69. The apparatus of claim 68, wherein the conductors at the inputs of the one or more first cold side reservoirs are commonly connected to first sides of the one or more electrical loads and the outputs of the one or more second cold side reservoirs are commonly connected to second sides of the one or more electrical loads.
  • 70. A method for thermal-to-electric conversion comprising the steps of: juxtaposing a hot side element to a cold side element separated by a small gas-filled or vacuum gap;providing the hot side element comprising hot side dipoles transferring excitation energy across the gap to promote cold side carriers;providing the cold side element comprising an array of one or more cold side converter elements; andsupplying one or more cold side carriers from one or more first cold side reservoirs to one or more first cold side quantum wells within each of the one or more cold side converter elements, the one or more cold side carriers being promoted from a lower energy level to a higher energy level by the transferred excitation energy.
  • 71. The method of claim 70, wherein the hot side element comprises a simple surface.
  • 72. The method of claim 71, wherein the simple surface is selected from the group consisting of metal, semi-metal, semiconductor, and insulator.
  • 73. The method of any one of claim 70, wherein the hot side element comprises one or more hot side quantum wells with one or more excited energy levels supplied with one ore more excited carriers by one or more hot side reservoirs.
  • 74. The method of claim 70, wherein only one cold side carrier is promoted at a time.
  • 75. The method of claim 70, wherein the one or more promoted cold side carriers tunnel through one or more cold side potential barriers to one or more second cold side quantum wells connected to one or more second cold side reservoirs at elevated voltage.
  • 76. The method of claim 75, wherein the one or more second cold side reservoirs are connected to the one or more first cold side reservoirs through one or more electrical loads.
  • 77. The method of claim 70, wherein the one or more cold side converter elements are connected by a chip-integrated network of conductors.
Parent Case Info

This application is a divisional of U.S. patent application Ser. No. 12/821,698 filed on Jun. 23, 2010. U.S. patent application Ser. No. 12/821,698 is incorporated herein by reference.

Divisions (1)
Number Date Country
Parent 12821698 Jun 2010 US
Child 14690996 US
Continuations (2)
Number Date Country
Parent 14690996 Apr 2015 US
Child 15478343 US
Parent 11500062 Aug 2006 US
Child 12821698 US