Patent Application
20070016027
This invention relates generally to diagnostic imaging systems and methods, and more particularly, to imaging systems and methods configured to transfer imaging information via a high speed serial data bus (HSSDB).
At least some known ultrasound systems experience problems with transmitting large amounts of data from one receiver component to a next receiver component, and ultimately to a radio frequency interface (RFI) and/or host computer of the ultrasound system. More than one beam of imaging data may be constructed substantially simultaneously at the plurality of receiver components. The collecting and processing of echo information along multiple scan lines within a subject is known as multi-line acquisition (MLA). Thus, large amounts of ultrasound information acquired and produced through MLA have to be processed and communicated in the ultrasound system.
Data reduction and/or filtering of data provides one way to accommodate the rapid communication of large amounts of data. Through use of data reduction and/or filtering techniques, non-critical data may be filtered and deleted from the more critical data. However, once data reduction and filtering are performed at the receiver components, the data eliminated cannot be recovered at the RFI or host computer. Some ultrasound applications would be improved by use of all the raw data. For example, the communication of all of the raw imaging data results in producing better quality images. The use of parallel data buses provides another way to communicate large amounts of information rapidly. However, the use of parallel buses typically requires the costly addition of hardware, and synchronicity of the data is near impossible to maintain.
Thus, known methods and systems may not and adequately transmit large amounts of imaging data through a plurality of receiver components and to an RFI and/or host computer of the imaging system.
In one embodiment, a medical imaging system is provided. A scan portion is configured to acquire signals. A plurality of interconnected components are configured to receive the signals and communicate information asynchronously.
In another embodiment, an ultrasound system is provided that includes a plurality of receiver components configured to receive synchronous ultrasound signals and process the received ultrasound signals to output asynchronous ultrasound information. Each of the plurality of receiver components is further configured to receive the asynchronous ultrasound information from at least one other of the plurality of receiver components and combine the asynchronously received ultrasound information with the received synchronous ultrasound signals to output asynchronously combined ultrasound information. The ultrasound system also includes a processor configured to receive asynchronously the combined ultrasound information and process the combined ultrasound information to produce ultrasound image information.
In yet another embodiment, a receiver component for an ultrasound system is provided. The receiver component includes a plurality of inputs configured to receive synchronous ultrasound signals from an ultrasound scan. An interface of the receiver component is configured to receive asynchronous ultrasound information from another receiver component. A processor of the receiver component is configured to combine the received synchronous ultrasound information with the asynchronous received ultrasound information.
In still another embodiment, a method for communicating information within an ultrasound system is provided. The method includes receiving ultrasound signals from an ultrasound scan. Ultrasound information based at least in part on the received ultrasound signals is asynchronously. The method also includes communicating the asynchronous ultrasound information between ultrasound system components. The communicated ultrasound information is combined with the received ultrasound signals to asynchronously provide combined ultrasound information.
Each of the receiver components 42-48 in the plurality of receiver components 40 has a similar architecture. Thus only one receiver component 48 is described in detail with corresponding structure present in each of the other receiver components. The receiver component 48 includes a plurality of Application Specific Integrated Circuit (ASIC) component groups, namely an ASIC group 50, an ASIC group 51, an ASIC group 52, and an ASIC group 53. Each of the ASIC component groups has a similar architecture, and thus only one ASIC group 50 is described in detail with corresponding structure present in each of the other ASICs. ASIC group 50 includes an A/D converter group 54 and an ASIC 61, the A/D converter group 54 provides inputs 64 to the ASIC 61.
The operator of these components including the flow and processing of information will now be described. The RFI board 110 receives commands from a backend control processor/controller (BEP) 122 over an RFI-BEP controller bus 115 to control the formation of an ultrasound pulse to be emitted into a region of interest (e.g., region of interest of an object to be scanned). The RFI board 110 generates transmit parameters from the received commands that define a transmit beam of a certain shape and size from a certain point or points at the surface of the transducer array 14. The transmit parameters are communicated over a connection 160 (e.g., serial link) from the RFI board 110 to the transmit boards group 100. The transmit boards group 100 generates transmit signals from the received transmit parameters. The transmit signals are provided at certain levels and are phased with respect to each other to steer and focus a transmit beam into one or more transmit pulses or firings.
The transmit boards group 100 communicates the transmit signals via a connection (e.g., communication link) 180 through the transducer interface board 20 to drive the plurality of transducer elements 12 within the transducer array 14 as is known. The connection 180, in one embodiment, includes a plurality of individual channels or communication lines that correspond to the number of transducer elements 12 or to groups of transducer elements 12. The transmit signals excite the transducer elements 12 to emit ultrasound pulses. The ultrasound pulses may be phased to form a focused beam along a desired scan line. Ultrasound echoes, which are backscattered ultrasound waves from, for example, tissue and blood samples within the scanned structure, are received at the transducer elements 12 at different times depending on the distance into the tissue from which the signals are backscattered the angle at which the signals contact the surface of the transducer array 14. The transducer array 14 is a two-way transducer and converts the backscattered waves (ultrasound echoes) of energy into received signals.
The received signals are communicated in separate channels from the transducer array 14 via a connection 16 (e.g., communication links) to the transducer interface board 20, which communicates the received signals over a connection 130 to the preamplifier boards 30. The preamplifier boards 30 perform time gain compensation (TGC) (e.g., swept gain), to increase the amplitude of the received signals from increasing depths in the body to compensate for the progressive attenuation of the deeper echoes. The amplified received signals from the preamplifier boards 30 are communicated over a connection 140 (e.g., communication link) to the plurality of receiver components 40. In the illustrated example, the connections 16, 130, and 140, each include 256 channels and the channels in the connection 140 are divided into four groups of 64 channels. Each of the receiver components 42-48 in the plurality of receiver components 40 receives a group of 64 channels from the preamplifier boards 30.
The group of 64 channels received at receiver component 48 is subdivided into 4 groups of 16 channels. Each group of 16 channels is processed by one of the ASIC groups 50, 51, 52, and 53. For example, a group of 16 channels is received by the A/D converter group 54 of ASIC group 50. The A/D converter group 54 converts the analog signals of the 16 received channels into digital signals providing digital inputs 64 to the ASIC 61. The ASIC 61 processes the received digital signals into beam information and communicates the beam information to a bus 68 then to an ASIC 63. The ASIC group 51 receives a group of 16 channels and uses an A/D converter group 55 to convert the received analog signals into digital signals for use by the ASIC 63. The ASIC 63 processes the received digital signals into processed beam information, and may combine the beam data received over the bus 68 with the processed beam information. The combined beam information is then communicated from the ASIC 63 to an ASIC 65 via a bus 70.
In like manner as described for the ASIC group 51, the ASIC group 52 receives a group of 16 channels at an AID converter group 56. The A/D converter group 56 converts the analog signals of the 16 received channels into digital signals for use by the ASIC 65. The ASIC 65 processes the received digital signals into processed beam information, and may combine the beam data received over the bus 70 with the processed beam data. The combined beam data is then communicated from the ASIC 65 to an ASIC 67 via a bus 72. In similar fashion as described for the ASIC group 52, the ASIC group 53 receives a group of 16 channels at an A/D converter group 57. The A/D converter group 57 converts the analog signals of the 16 received channels into digital signals for use by the ASIC 67. The ASIC 67 processes the received digital signals into processed beam information, and may combine the beam data received over the bus 72 with the processed beam data. The combined beam data is then communicated from the ASIC 67 to a bus 74. The bus 74 communicates the combined beam data from receiver component 48 to a processing chip (e.g., a field programmable gate array (FPGA) 75). The FPGA 75 may combine processed beam data received from another receiver board (e.g. receiver board 46) with the processed beam data received via bus 74. The combined resulting beam data is communicated from FPGA 75 to the RFI board 110 via a high speed serial data bus (HSSDB) 150. The RFI board 110 may further process the received beam data and communicate the resulting processed image information to the BEP 122 over a data bus 76. The BEP 122 may then produce and display ultrasound images from the received image information as is known.
Each of the receiver components 42, 44, 46, and 48 has a corresponding group of ASICs, groups 302, 304, 306, and 308, respectively. Each group 302, 304, 306, and 308 receives and processes a set of 64 synchronous signals from the transducer elements 12. Each of the ASICs of the group 302 processes the synchronous signals into beam data and may sum the beam data with beam data from a previous ASIC of the group 302. The resulting beam data from the group 302 is transmitted serially and synchronously to an FPGA 316. The FPGA 316 packetizes the received beam data into a data packet 330 and transmits the data packet 330 asynchronously over an HSSDB 310 to an FPGA 320 of the receiver component 44.
Each of the ASICs of the group 304 processes synchronous signals received by the receiver component 44 into beam data, and may sum the beam data with beam data from a previous ASIC of the group 304. The FPGA 320 unbundles the received data packet 330 of beam data. The FPGA 320 realigns (e.g., re-synchronizes) and interleaves the unbundled beam data with processed beam data received from the group 304 of ASICs. The FPGA 320 packetizes the realigned and interleaved beam data into a data packet 332 and transmits the data packet 332 asynchronously via an HSSDB 312 to an FPGA 324 of the receiver component 46.
Each of the ASICs of the group 306 processes synchronous signals received by the receiver component 46 into beam data, and may sum the beam data with beam data from a previous ASIC of the group 306. The FPGA 324 unbundles the received data packet 332 of beam data. The FPGA 324 realigns (e.g., re-synchronizes) and interleaves the unbundled beam data with processed beam data received from the group 306 of ASICs. The FPGA 324 packetizes the realigned and interleaved beam data into a data packet 334 and transmits the data packet 334 asynchronously via an HSSDB 314 to an FPGA 75 of the receiver component 48.
Each of the ASICs of the group 308 processes synchronous signals received by the receiver component 48 into beam data, and may sum the beam data with beam data from a previous ASIC of the group 308. The FPGA 75 unbundles the received data packet 334 of beam data. The FPGA 75 realigns (e.g., re-synchronizes) and interleaves the unbundled beam data with processed beam data received from the group 308 of ASICs. The FPGA 75 packetizes the realigned and interleaved beam data into a data packet 336 and transmits the data packet 336 asynchronously via an HSSDB 150 to an FPGA 75 of the RFI 110.
Specifically, using the method 400, synchronous ultrasound signals from an ultrasound scan (e.g. inputs 64 shown in
The next receiver component (e.g., the receiver component 44) receives at 410 the packet 330. At 412, the ultrasound information received asynchronously in the packet 330 is combined with ultrasound information processed from the synchronous ultrasound signals received at receiver component 44 to produce a packet (e.g., the packet 332) of combined ultrasound information. For example, the group 304 of ASICs receive synchronous input signals and processes the signals into ultrasound information. The ultrasound information is communicated to the FPGA 320 for packetizing. The combining 412 further may include realigning the ultrasound information from the asynchronously received packet 330 with the processed ultrasound information for inclusion in the packet 332. The combined ultrasound information may include inserted idles, as described herein. Processing flow then returns to the determination at 406.
If more ultrasound information is to be added by a next receiver component (e.g. the receiver component 46 or 48 of
Each of the plurality of receiver components 540 is configured to transmit asynchronously a packet of the ultrasound information 580 concurrently with receiving the ultrasound signals 502 to produce the ultrasound information 580 for inclusion in the packet. The transceivers 504, 506, 508 and 510 are configured to communicate ultrasound information 580 bi-directionally and may include FPGAs. An RFI 521 is configured to receive asynchronously the combined ultrasound information 580. The RFI 521 processes the combined ultrasound information 580 to produce ultrasound image information. The ultrasound image information is transmitted via a bus 523 to a host computer/controller 522 for use in producing an ultrasound image. Although the RFI 521 and the host computer 522 are shown in
The processing of ultrasound signals 502 into ultrasound information at a receiver component 542-548 may be performed by a group of ASICs, (e.g., ASICs 561, 563, 565, and 567) of the receiver component 548. In an alternative embodiment, a group of processing elements other than ASICs may be used to perform the same functionality. The processing of the ultrasound information produced by a group of ASICs to form packets of ultrasound information 580 may performed by an FPGA transceiver (e.g., transceiver 510). In an alternative embodiment, a processing element other than an FPGA may be used in the transceivers 504-510.
While the invention has been described in terms of various specific embodiments, those skilled in the art will recognize that the invention can be practiced with modification within the spirit and scope of the claims.
