This invention relates to data processing in communication systems, and particularly though not exclusively to Coded Composite Transport Channel (CCTrCH) processing in packet-based UTRA TDD (UMTS—Universal Mobile Telecommunication System—Terrestrial Radio Access systems operating in Time Division Duplex mode).
In a UMTS Terrestrial Radio Access Network (UTRAN) there are two modes of operation Frequency Division Duplex (FDD) and Time Division Duplex (TDD). In UTRA TDD, which is packet-based, users are separated in both the code domain and time domain. The time domain UTRA framing has 4096 radio frames which make up a super frame with each radio frame consisting of 15 timeslots. A timeslot can be allocated to either Uplink (UL) or downlink (DL) transmission.
In a typical TDD system the UL and DL transmissions have to be synchronized to reduce interference. In addition DL broadcast signaling and UL random access signaling has to be supported. This leads to a partitioning of the radio frame with individual timeslots being dedicated for use either for DL or UL. UTRA specifies the processing that is applied to Transport Channel (TrCH) data by Layer 1 (L1) to build up CCTrCHs. These CCTrCHs are mapped onto timeslots.
Each CCTrCH has a particular set of characteristics, which change dynamically for each CCTrCH that is processed. Possible configuration parameters that may be applied dynamically to each CCTrCH include: number of TrCHs in a CCTrCH; CRC length; transport block size; type of channel coding; Transmission Time Interleave (TTI) period; and amount of physical resource.
An implementation of a CCTrCH processing stack may contain a mixture of hardware and software implementations of individual processing steps. Each processing step requires configuration information.
The conventional approach has been to use a centralized controller for this processing. However this approach has the following disadvantages:
This conventional approach becomes complex when the configuration data changes dynamically for each CCTrCH as it is processed and the latency through each process changes depending on the configuration itself.
A need therefore exists for processing of data in a communication system wherein the above-mentioned disadvantage(s) may be alleviated.
In accordance with a first aspect of the present invention there is provided a method for processing data in a communication system, the method comprising:
providing a configuration header containing configuration data for use in processing data through a plurality of processes including a first process and a second process; and
passing the configuration header with inter-process data from the first process to the second process,
whereby the second process extracts configuration data from the configuration header passed from the first process.
In accordance with a second aspect of the present invention there is provided an arrangement for processing data in a communication system, the arrangement comprising:
means for providing a configuration header containing configuration data for use in processing data through a plurality of processing means including a first process means and a second processing means; and
means for passing the configuration header with inter-process data from the first processing means to the second processing means,
whereby the second processing means is arranged to extract configuration data from the configuration header passed from the first processing means.
In accordance with a third aspect of the present invention there is provided a communication system including means for processing data comprising:
means for providing a configuration header containing configuration data for use in processing data through a plurality of processing means including a first process means and a second processing means; and
means for passing the configuration header with inter-process data from the first processing means to the second processing means,
whereby the second processing means is arranged to extract configuration data from the configuration header passed from the first processing means.
One method and arrangement for processing of CCTrCH data in a packet data UTRA TDD system incorporating the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:
In a UMTS Terrestrial Radio Access Network (UTRAN) there are two modes of operation: UTRA Frequency Division Duplex (FDD) and UTRA Time Division Duplex (TDD). In UTRA TDD users are separated in both the code domain and time domain. In the time domain employed in UTRA framing, illustrated in
In a typical TDD system the UL and DL transmissions have to be synchronized to reduce interference. In addition DL broadcast signaling and UL random access signaling has to be supported. This leads to a possible partitioning of the radio frame as shown below:
UTRA specifies the processing that is applied to the Transport Channel (TrCH) data by Layer 1 (L1), as shown in
Transport Blocks (blocks of a defined number of bits) are submitted by the media access control (MAC) to L1 for processing. A Transport Block typically corresponds to a MAC protocol data unit (PDU) or corresponding unit. Layer 1 processes each Transport Block as shown in
Each CCTrCH has a particular set of characteristics. These characteristics change dynamically for each CCTrCH that is processed. The following lists examples of some of the possible configuration parameters that may be applied dynamically to each CCTrCH:
In practice, an implementation of a CCTrCH processing stack may contain a mixture of hardware and software implementations of the individual processing steps shown in
The conventional approach is to use a centralized controller. However, this approach has a number of disadvantages:
This approach becomes complex when the configuration data changes dynamically for each CCTrCH as it is processed, and the latency through each process changes depending on the configuration itself.
The present invention, at least in the preferred embodiment described below, utilises a method for simplifying the problem of control of configuration parameters in a CCTrCH processing stack, though it can equally be applied to any processing stack that has dynamic configuration parameters.
Referring now to
At each stage or processing element of the processing stack or arrangement 300 the header 310 is read along with the input data 320 by the process in order to gain the configuration data the process requires.
The same header 310 is then attached to its output data 320 (to form an integral CCTrCH data block 330) for use by the next process in the CCTrCH processing stack. The processing stage may also add extra configuration data (e.g., output data size) to the configuration header, that can save recalculation of certain parameters.
Thus, it will be understood, in employing the configuration headers 310, in the above method:
It will be understood and appreciated that the method and arrangement utilising configuration headers described above provides the advantages that the controlling entity does not need to store the configuration parameters for the CCTrCH, since they are passed in the configuration header; nor does the controlling entity need to keep track of the CCTrCH as it is processed by each of the processing steps; nor does the controlling entity need to calculate and control a following process with data output from a previous process, since the processing proceeds methodically from one process to another using the configuration headers.
It will also be understood and appreciated that the method and arrangement described above allows CCTrCH processing to be performed, without the need for central control, by proceeding methodically from one processing step to another without prior knowledge of the processing latencies of each processing step.
It will be appreciated that the method described above for processing of CCTrCH data may be carried out in software running on a processor (not shown), and that the software may be provided as a computer program element carried on any suitable data carrier (also not shown) such as a magnetic or optical computer disc.
It will be also be appreciated that the method described above for processing of CCTrCH data may alternatively be carried out (in part or in whole) in hardware, for example in the form of an integrated circuit (not shown) such as an FPGA (Field Programmable Gate Array) or ASIC (Application Specific Integrated Integrated Circuit).
It will further be appreciated that although the method described above for processing of CCTrCH data has been presented in the context of processing CCTrCH data for transmission, the same technique of using configuration headers passed between successive processing stages may equally be performed in processing received CCTrCH data. Referring now also to
It will further be appreciated that although the invention has been described above in the context of processing CCTrCH data in a UTRA TDD system, the invention may be generally applied to data processing in any communication system.
In conclusion, therefore, it will be understood that the use of configuration headers in a data processing in a communication system as described avoids the disadvantages of using a central controller and allows processing to proceed from one processing step to another without requiring prior knowledge of the processing latencies of each processing step.
Number | Date | Country | Kind |
---|---|---|---|
0129103.8 | Dec 2001 | GB | national |
Number | Name | Date | Kind |
---|---|---|---|
5249292 | Chiappa | Sep 1993 | A |
5341369 | Langer | Aug 1994 | A |
5363315 | Weiss et al. | Nov 1994 | A |
5701479 | Venable et al. | Dec 1997 | A |
5995517 | Tomida et al. | Nov 1999 | A |
6807192 | Terry | Oct 2004 | B2 |
7009973 | Cao et al. | Mar 2006 | B2 |
7221657 | Bergenlid et al. | May 2007 | B2 |
20010008838 | Toskala et al. | Jul 2001 | A1 |
20010043576 | Terry | Nov 2001 | A1 |
20020071407 | Koo et al. | Jun 2002 | A1 |
20050185651 | Rinne | Aug 2005 | A1 |
Number | Date | Country |
---|---|---|
0572865 | Dec 1993 | EP |
2369006 | May 2002 | GB |
WO-0010297 | Feb 2000 | WO |
WO 0010302 | Feb 2000 | WO |
WO-0010302 | Feb 2000 | WO |
WO-02052777 | Jul 2002 | WO |
WO-03049385 | Jun 2003 | WO |
Number | Date | Country | |
---|---|---|---|
20050018710 A1 | Jan 2005 | US |