Method and arrangement for noise rejection in a receiver circuit

Abstract

Method for interference suppression by means of a quality-adjustable bandpass filter in a receiver circuit for carrier-modulated received signals (SIN), in which the bandpass filtered received signal (Bout) is demodulated, and a switching process is triggered with the demodulated received signal (Dout). Known receiver circuits, however, have the disadvantage, due to small dimensions of the circuit surface area, that interferences, for example in the form of oscillator oscillations due to capacitive couplings, are caused by switching processes in the output portion of the receiver, especially by driving transistors. These interferences cannot be eliminated by an amplifier regulation provided in the circuit. According to the invention, such internal or self-induced interferences or disturbances are eliminated in that a quality reduction of the bandpass filter is correlated with the switching process that causes the interference. The method according to the invention is especially suitable for the construction of circuits for infrared receivers, which can thereby be manufactured in a small size, without external components, and thus economically.

Description

[0001] The invention relates to a method for interference suppression by means of a quality-adjustable bandpass filter in a receiver circuit for carrier-modulated received signals according to the preamble of the patent claim 1, as well as a circuit arrangement for carrying out this method.

[0002] Known integrated circuits (IC) for such receiver circuits, especially remote control receivers, such as, for example, the U2548 from Temic Semiconductor GmbH, have larger dimensions due to their technology, and therefore have a small interference coupling. Their size amounts to approximately 1.8 mm2. On the useful surface, these circuits comprise connection devices for the input signal, the output signal, the supply voltage, the ground connection and several adjusting or tuning devices. The functional operation of such a circuit consists in that the signal received from a photodetector, generally a photodiode—the received signal—is fed into an input circuit. The input circuit comprises a transimpedance amplifier, which amplifies pulsing input current signals and transforms them into voltage signals. These voltage signals are then processed in a signal preparation or processing device. The signal processing device comprises a regulating amplifier, a limiter, and a bandpass filter. In this context, the purpose of the regulating amplifier is to amplify the output voltage of the transimpedance amplifier according to the prescribed regulation. The limiter has the purpose of limiting the signal level swing or range, in order to avoid overdriving the bandpass filter. The bandpass filter enables the selectivity of the receiver and limits its bandwidth. The signals at the output of the bandpass filter are evaluated in a demodulator as an evaluating circuit. This demodulator consists of comparators, an integrator and a Schmitt trigger, and generates a switching signal for a driving transistor functioning as a switch, whereby a digital control signal is provided, for example to a microcontroller for further processing.

[0003] This known circuit further includes an amplification regulation, by means of which the amplification of the receiver is regulated or adjusted to correspond to an interference field, whereby a high sensitivity for the received signals is achieved, while nonetheless simultaneously, interfering influences, which may for example arise due to extraneous light, are suppressed to a great extent, so that hereby as far as possible no output pulses are generated by the driving transistor.

[0004] This known circuit, however, has the disadvantage, that its circuit surface area is reduced through the application of new technologies, whereby, due to switching processes in the output portion of the receiver, especially through the driving transistor, interferences or disturbances are caused, for example in the form of oscillator oscillations due to the capacitive couplings and ground potential reduction that are now effective within the circuit, whereby these interferences or disturbances cannot be removed by the amplification regulation.

[0005] To solve such problems, it is known from a Toshiba Data Sheet regarding the monolithic integrated photo circuit TPS831, to connect an external capacitor of the size 1000 pF between the output terminal or connection V0 and ground terminal or connection GND, in order to prevent oscillations—as it is termed therein. The evident disadvantage of this solution is that additional costs are caused in addition to the chip costs, due to the additional component, and that the demodulated output pulse is corrupted or falsified through this capacitor.

[0006] Therefore, it is an object of the invention, to specify a method of the initially mentioned type, in which the mentioned internal or self-induced interferences can be suppressed, without comprising the disadvantages described from the prior art.

[0007] This object is achieved by the characterizing features of the patent claim 1. According to this, an active interference suppression of internal or self-induced interferences due to switching processes at the output of the receiver circuit is achieved by a time-limited reduction of the quality of the bandpass filter in the moment at which the interference arises, namely during the switching and directly following the switching process. Preferably, the time duration of the quality reduction is limited at least to the duration of the interference triggered by the switching process, namely so long until the interference has decayed or been damped.

[0008] According to an advantageous further development of the invention, a control signal tqr for the quality reduction of the bandpass filter is derived dependent on the output signal of the demodulator, which, as the first rectangular or square pulse, corresponds to the envelope curve of the carrier-modulated received signal, and, as a switching signal, is provided to a driving transistor as an output transistor of the receiver. This is achieved in that, dependent on the edges or flanks of the first rectangular pulse, a further phase shifted rectangular or square pulse is generated, whereby this further phase shifted rectangular pulse preferably joins or immediately follows in time on the first rectangular pulse. Since a switching process, for example switching-on of an abovementioned switch, is initiated with the first edge or flank of the first mentioned rectangular pulse, and with its second edge or flank, the switching process is ended, for example by switching-off this switch, one can thereby achieve a correlation of the interference with the quality reduction in a simple manner.

[0009] Moreover, the rectangular pulse generated by the demodulator is derived from the bandpass filtered received signal in that, first, pulse trains are generated from this received signal by means of quantization, and these pulse trains are then integrated up to an integrated value, whereby the missing or omission of pulse trains leads to a restoring or return of this integral value.

[0010] In a further advantageous example embodiment, an automatic amplification regulation or automatic gain control of the received signal is provided by means of a regulating amplifier, to which the received signal is provided before the bandpass filtering. The regulation is carried out dependent on the signal magnitude of the received signal and the ambient or environmental conditions—namely especially the surrounding interference field—of the receiver circuit. In order to also prevent an interference that is possibly caused by this regulation, this amplification regulation is switched to inactive during the demodulation of a bandpass filtered received signal—namely during the reception of a valid data bit. Preferably, for switching the automatic amplification regulation to inactive, a third rectangular pulse that is phase shifted relative to the first rectangular pulse (output signal of the demodulator) is generated, whereby the pulse width of this third rectangular pulse is longer than that of the first rectangular pulse.

[0011] Finally, the output signal of the demodulator (first rectangular pulse), the control signal for the quality reduction of the bandpass filter (second rectangular pulse) and the control signal (third rectangular pulse) for switching the automatic amplification regulation to inactive are derived preferably dependent on the integral values, both during the integration as well as during the restoring or return.

[0012] An advantageous circuit arrangement for carrying out the method according to the invention arises according to the characteristic features of the claims 12 to 15.

[0013] Such a receiver circuit for carrying out the method according to the invention is manufactured as a monolithic circuit, which simply requires a photodiode in order to be able to operate as a receiver for infrared remote controls, and can already demodulate very small currents in the range of a few hundred pikoamps, whereby this, however, requires a high transimpedance on the order of magnitude of 300 mΩ. On the other hand, the driving transistor at the output of the demodulator switches the full logic level swing or range (for example 5 V) at a maximum current of up to several mA. In a realization of this circuit with new technologies leading to smaller dimensions of the chip, for example with a chip surface area of 1 mm2, the described internal or self-induced interferences or disturbances (oscillations) will arise due to the now smaller spacing distances and due to the couplings to the input of the receiver circuit caused by the high voltage swing or range of the driving transistor. Independent of the chip size, such a circuit also tends toward oscillations due to the ground potential reduction caused by the driving current. With the method according to the invention, all of the described interferences or disturbances are suppressed, and in fact independently of the dimensions of the chip, so that the invention will still be advantageously applicable in connection with future technologies, which lead to further size reductions.

[0014] The method according to the invention shall be described in the following with respect to an example embodiment in connection with the drawings, wherein:

[0015] FIG. 1 shows a block circuit diagram of a receiver circuit according to the invention,

[0016] FIG. 2 shows a block circuit diagram of a demodulator used in the receiver circuit according to FIG. 1,

[0017] FIG. 3 shows a logic diagram for explaining the functional operation of the demodulator according to FIG. 2,

[0018] FIG. 4 shows a block circuit diagram of an integrator used in the receiver circuit according to FIG. 1,

[0019] FIG. 5 shows a logic diagram for explaining the functional operation of the integrator according to FIG. 4, and

[0020] FIG. 6 shows a basic principle circuit diagram of a gyrator bandpass filter used in the receiver circuit according to FIG. 1.

[0021] FIG. 1 shows a block diagram of a receiver circuit 10 and its surrounding environment. The carrier-modulated data radiated or emitted by an optical transmitting diode 6 are received as infrared pulse packets by a photodiode 5. These infrared pulse packets with a carrier frequency of e.g. 38 kHz, which impinge on the photodiode 5, are converted into electrical current signals SIN. They are present at the input terminal or connection 11 of the receiver circuit 10. These electrical current signals SIN are provided to an input circuit 1 functioning as a transimpedance amplifier, which amplifies the current signals SIN and converts them into voltage signals. In this context, the converted voltage must be large enough to make the noise component negligible in the following signal processing stages. In the following signal preparation or processing element 2, these voltage signals are again amplified by means of a regulating amplifier 21, limited by means of a limiter 22, and then filtered in a bandpass filter 23, whereby this bandpass filter 23, in addition to its analog input, additionally has a control input, with which the quality of the bandpass filter is switchable between two values.

[0022] The signal limiting by means of the limiter 22 is therefore necessary, in order to avoid an overdriving of the following bandpass filter 23 and to suppress pulse-form interferences or disturbances, which get into the receiver, for example, through a supply connection Vs. In an evaluating element 3 connected to and following the signal processing element 2, the bandpass filtered signal Bout is demodulated by means of a demodulator 31, and then provided as an output signal SOUT over a driving transistor 32 with an associated load resistor 32, to a microcontroller 7 for further processing. The demodulator 31 also generates a control signal tqr, which is provided via a line 72 to the control input of the bandpass filter 23. Hereby, the quality of the bandpass filter 23 is reduced temporarily for a short time in connection with and following a switching process of the driving transistor 32, in order to prevent the triggering of an oscillator oscillation due to the switching process carried out with the driving transistor 32, in order to thus counteract an interference coupling in the receiver circuit embodied as an integrated circuit. Thus, the bandpass filter 23, which operates on a carrier frequency of the useful signals and enables the selectivity of the circuit, has a quality of, for example 10, which can be reduced to 1 due to the control signal tqr, as will be explained further below.

[0023] In order to optimize the amplification of the useful signal emitted by the transmitting diode 6 and therewith the sensitivity of the receiver, the receiver circuit 10 comprises a regulating circuit 4, which provides regulating signals to the regulating amplifier 21, and which on its part receives as input signals the output signal Bout of the bandpass filter 23 via a line 75 as well as a signal Dstop-agc generated by the demodulator via a line 74. The purpose of this regulating circuit 4 is to optimize the signal to noise ratio in that the amplification of the input signal SIN is varied dependent on the magnitude of the input signal. The regulating circuit 4 is built of a regulating logic element (AGC) 41 and a digital-to-analog converter (DAC) 42. The regulating logic element 41 separates the useful signal from the interference signals and adjusts the amplification for the useful signals to a highest possible level, whereby a high sensitivity for the useful signals is achieved. Simultaneously, interfering influences from, for example, extraneous light, are reduced. The digital-to-analog converter 42 converts the digital amplifier information generated by the regulating logic element 41 into an analog control voltage for the regulating amplifier 21.

[0024] In the following, the functional operation of the demodulator 31 will be described in detail in connection with the FIG. 2 and the associated pulse diagram according to FIG. 3, especially the correlation between the output signal DOUT of the demodulator 31 which switches the driving transistor 32 and the control signal Dtqr which reduces the quality of the bandpass filter 23 shall be illustrated.

[0025] According to FIG. 2, the output signal BOUT coming from the bandpass filter 23 is digitized with a comparator 311, whereby the threshold voltage 319 represents a fixedly set reference value, which, however, in comparison to the band filter idle or quiescent level, can also be adjusted and set over several steps or stages in a signal dependent manner. The digital signals of the comparator 311 as pulse trains Compsig (see pulse diagram 311 in FIG. 3) are integrated in an analog integrator circuit 313. This integrator 313 recognizes the conditions charging or discharging out to the overload limits 0% or 100%, whereby a limited integral voltage course (see pulse diagram 313 in FIG. 3) is generated as an output signal Intout. Three Schmitt triggers 316, 317, 318 with different hysteresis characteristics are connected in circuit at the output of the integrator 313. In the application example, the switching-on and switching-off processes lie at 80% and 40% for the Schmitt trigger 316 (see pulse diagram 316 in FIG. 3), at 85% and 10% for the Schmitt trigger 317 (see pulse diagram 317 in FIG. 3), and at 50% and 25% for the Schmitt trigger 318 (see pulse diagram 318 in FIG. 3). The control signals Dtqr (72), Dstop-agc (73) and 76 are obtained from the time overlap of the three Schmitt trigger output signals Dout, Dstop-agc and 318 with the aid of the logical connections L2 and L3.

[0026] It can be seen from the pulse diagram of FIG. 3, that the positive edge of the rectangular demodulator output signal Dout is generated at an increasing integrator value of 80% of the maximum value (100%), and the negative edge is generated at a resetting or returning value of the integrator value of 40%. In a corresponding manner, using the above named values, the rectangular signal Dstop-agc (317) is generated, which is provided to the regulating logic element 41, in order to hold the regulation of the regulating element 4 inactive during and a short time after the transmission of a valid data bit. Thereby, also an influence of the interference from the driving transistor on the regulating circuit 4 shall be avoided. The rectangular signal 318, the signal Dstop-agc (317) and the inverted signal Dout are anded together with a NAND gate L3 for generating the control signal Dtqr (72). Thereby the positive edge of the rectangular signal 72 is generated if the Dout signal takes its low level, whereas its negative edge corresponds in time with that of the rectangular signal 318.

[0027] A further rectangular signal 76 is generated with the inverted Dout signal 316 and the Dstop-agc signal 317 by means of a NAND gate L2, which further rectangular signal 76 is provided together with the Compsig pulse trains 311 generated by the comparator 311 to an AND gate L1. The pulse duration of this rectangular pulse 76 corresponds to the time duration from the pulse end of the Dout signal 316 to the pulse end of the Dstop-agc signal 317. Thereby an after-triggering of the comparator 311 during the inactive-switching of the regulating circuit 4 is prevented.

[0028] The analog integrator 313 used in the demodulator 31 integrates the digitized pulse trains Compsig, and can be realized in this context in a simple manner as will be described in the following, by way of example, in connection with the FIG. 4 and the associated pulse diagram according to FIG. 5. The pulse train Compsig shown as an example in FIG. 5 contains pulses of varying duration with varying pulse pauses, and is provided to a trigger and holding element T, which switches on a current source Q with the occurrence of a first pulse, which current source Q charges an integration capacitor Cint with a current I1. Thereby, incomplete pulse trains must be recognized by the demodulator 31 as being incomplete, and may not lead to an output signal. The holding function of the trigger and holding element T serves for this purpose, with which, after completion of a certain time duration, which can be selected in a frequency dependent manner according to 1.6/f0, the upwards integration is interrupted due to a lack of a pulse, and a negative or downwards integration with the same speed is started, in that the current sink S is now switched on for discharging the integration capacitor Cint. Such a holding function is shown with the pulse diagram Hold 1.6/f0 and shows that the pulse pause between the first two pulses at the time points t1 and t2 is bridged over, i.e. the integration is further continued during these pulse pauses, however, this is not the case completely for the one following the second pulse, namely between the time points t2 and t3. Therefore, the upwards integration is carried out only until the expiration of the holding time 1.6f0, i.e. until the time point t3. Thereafter, the trigger and holding element T switches to the current sink S for the purpose of discharging the integration capacitor Cint with a current I2 until the time point t4, at which the next pulse arrives for the upward integration, which is carried on until reaching the maximum integration value of 100% at the time point t5, despite that still further pulses are present and the holding time 1.6f0 only ends at the time point t6. Thereafter, a negative or downward integration is carried out until the time point t7, at which the integration value of the integrator output signal Intout has again reached its output value of 0%.

[0029] An exemplary construction of a quality-adjustable bandpass filter 23 is shown in FIG. 6 and can be used in the receiver circuit according to FIG. 1. This illustrated bandpass filter represents a gyrator filter of the second order, of which the general transfer function F(s) is given by the following formula:

F (s)=(s/ω0)/(1+(s/(ω0Q)+(s2/ω02),

[0030] whereby s represents the Laplace transform, ω0 represents the resonance frequency, and Q represents the quality. The circuit described next realizes or carries out this transfer function.

[0031] According to FIG. 6, the analog signal limited by the limiter 22 is provided via the input terminal or connection E of the bandpass filter to the positive input of a summer 231 having three inputs (two positive inputs and one negative input). The sum signal formed from the signals present at the three inputs is amplified by the factor ω0 with an amplifier 232, and is provided further to a limiting integrator 233 which represents or simulates a capacitance. Next, the integrated signal is formed by a signal former 234 that represents or simulates a transistor characteristic function, and forms the output signal Bout of this bandpass filter 23. Simultaneously, this output signal Bout is provided on the one hand to the second positive input of the summer 231 via a feedback coupling, consisting of a further amplifier 235 with the amplification factor −ω0 and a further integrator 236 connected thereafter, which integrator 236 has a construction corresponding to the integrator 233, and on the other hand respectively via an amplifier 237 and 238 to a change-over switch 239, which, dependent on the control signal Dtqr delivered thereto, connects either the amplifier 237 with an amplification factor 0.1 (=1/Q1)—corresponding to a quality value 10—or the amplifier 238 with an amplification factor 1 (=1/Q2)—corresponding to a quality value 1—to the negative input of the summer 231.

[0032] Through the reduction of the quality during the high level of the Dtqr signal—thus, during the moment of switching off the driving transistor 32 and for a short time thereafter—the filter is shifted to a condition of smaller energy take-up capacity, so that the interference caused by the driving transistor 32 in the form of a step or discontinuity at the bandpass input can decay more quickly. The time duration in which the control signal Dtqr is active must be as long as the interference of the driving transistor 32 continues in the circuit components connected before the bandpass filter 23. A negative influence of the demodulation of useful signals is hereby excluded, because the time for the interference suppression is substantially shorter than the pause time of a bit sequence of the useful signals.

[0033] The characteristics of such a bandpass filter 23 necessary for the general function of the receiver are essentially that the bandwidth of the receiver is limited, whereby a minimization of the noise of the preceding stages and of the photodiode, and therewith a higher sensitivity for the useful signal, results, and that finally also interference signals outside of the center frequency are suppressed.

Claims

1. Method for interference suppression by means of a quality-adjustable bandpass filter (23) in a receiver circuit for carrier-modulated received signals (Sin), in which the bandpass filtered received signal (Bout) is demodulated, and a switching process is triggered with the demodulated received signal (Dout), characterized in that a quality reduction of the bandpass filter (23) is correlated with the switching process.

2. Method according to claim 1, characterized in that the time duration of the quality reduction is limited at least to the duration of the interference triggered by the switching process.

3. Method according to claim 1 or 2, characterized in that, as the demodulated received signal (Dout), a first rectangular pulse corresponding to the envelope curve of the carrier-modulated received signal (Sin) is generated for triggering the switching process, and in that, dependent on one of the edges of the first rectangular pulse (Dout), a phase shifted second rectangular pulse (Dtqr) is derived as a control signal (72) for the quality reduction of the bandpass filter (23).

4. Method according to claim 3, characterized in that the second rectangular pulse (Dtqr) follows in time directly after the first rectangular pulse (Dout).

5. Method according to one of the claims 3 or 4, characterized in that the switching process is initiated with the first edge of the first rectangular pulse (Dout) and the switching process is ended with the second edge of the first rectangular pulse (Dout).

6. Method according to one of the preceding claims, characterized in that for the demodulation, the bandpass filtered received signal (Bout) in the form of pulse signals (Compsig) is quantized and these pulse trains are integrated up over their pulse pauses to an integral value.

7. Method according to claim 6, characterized in that upon missing of pulse trains (Compsig), after a certain time duration, the upward integration is ended and the integral value is returned back or reduced.

8. Method according to one of the preceding claims, characterized in that, before the bandpass filtering, the received signal is subjected to an automatic gain control dependent on a regulating value determined by the signal magnitude of the received signal and the surrounding ambient environmental conditions.

9. Method according to claim 8, characterized in that the automatic gain control is switched to inactive during the demodulation of a bandpass filtered received signal.

10. Method according to one of the claims 5 to 9, characterized in that, for switching the automatic gain control to inactive, a third rectangular pulse (Dstop-agc) that is phase-shifted relative to the first rectangular pulse (Dout) is generated, of which the pulse width is longer than that of the first rectangular pulse (Dout).

11. Method according to one of the claims 7 to 10, characterized in that the first, second and third rectangular pulse (Dout, tqr, Dstop-agc) is generated dependent on integral values both during the upward integration as well as during the return back or reduction.

12. Circuit arrangement for carrying out the method according to one of the preceding claims, characterized in that the receiver circuit comprises an input amplifier (1), to which a regulating amplifier (21) and the bandpass filter (23) are connected thereafter in circuit, whereby the bandpass filter (23) is constructed as a filter of the second order according to the following transfer function F(s):

13. Circuit arrangement according to claim 12, characterized in that, for the demodulation, a comparator (311) is connected after the bandpass filter (23) for generating pulse trains (Compsig), these pulse trains (Compsig) are provided to an analog integrator (313) and the integrator values are provided further to several Schmitt triggers (316, 317, 318) with various different hysteresis values.

14. Circuit arrangement according to claim 13, characterized in that the outputs of the Schmitt triggers (316, 317, 318) are connected with an AND-element (L4) for generating the control signal (Dtqr) for the quality reduction of the bandpass filter (23).

15. Circuit arrangement according to one of the claims 12 to 14, characterized in that, for the automatic gain control by means of the regulating amplifier (21), a regulating logic element (41) and a digital-to-analog converter (42) connected thereafter are provided, whereby, for providing the bandpass filtered received signal (Bout) and the third rectangular signal (Dstop-agc), the regulating logic element (41) is connected with the output of the bandpass filter (23), and with one of the comparators (317) of the demodulator (31) respectively via a separate line (73, 75).