1. Field of the Invention
The present invention generally relates to complementary metal-oxide semiconductor (CMOS) imager devices, and more particularly to a method and circuit for driving active pixels in a CMOS imager device.
2. Description of the Related Art
Unless otherwise indicated herein, the approaches described in this section are not prior art to the claims in this application and are not admitted to be prior art by inclusion in this section.
A CMOS imager device is typically formed of an array of active pixels that are operable to capture the image of an object in an electrical signal form. Each active pixel has a pixel circuit that comprises a photodiode for converting light into an electrical signal representative of an image signal, and a readout circuit adapted to amplify and retrieve the electrical signal from the active pixel. Ideally, the active pixel should have a large photodiode surface area that is unobstructed to capture incident light in an efficient manner. However, for products that require small form factors, such as small digital cameras, the pixel size is restricted to be as small as possible.
A practical approach to reduce the pixel size is to reduce the size of the readout circuit and to overlap parts of the physical structures and metal interconnects of the readout circuit over the photodiode surface area. However, such an approach results in an actual light sensitive area of the photodiode that is smaller than the surface of the photodiode. In other words, the size of the readout circuit and its structure significantly influences the amount of light that reaches the photodiode.
Some typical CMOS pixel circuit configurations include 4-transistor and 3-transistor configurations. In the 4-transistor configuration, one active pixel circuit comprises one photodiode for collecting integrated charges generated in response to incident light, and four transistors through which the integrated charge is transferred to read out an image signal. In the 3-transistor configuration, the active pixel circuit comprises one photodiode and three transistors through which the integrated charge is transferred to read out the image signal. Compared to the 4-transistor configuration, the 3-transistor configuration provides a higher pixel fill factor. However, to replace the function of the extra transistor of the 4-transistor configuration, the 3-transistor pixel circuit requires a driving method in which concurrent charging of a selected row of active pixels and discharging of unselected rows of active pixels are required to enable signal readout from the selected row of active pixels. As a result of the frequent charging and discharging of the array of active pixels during operation, more power is consumed, and undesirable noises may be generated due to power line coupling.
What is needed in the art is thus a method and circuit that can drive CMOS active pixels in a more efficient manner and address at least the problems set forth above.
The present application describes a method and circuit for driving active pixels in a CMOS imager device. Specifically, one embodiment of the present invention sets forth a pixel circuit that comprises at least one photodiode, a first transistor coupled between the photodiode and a floating diffusion node, a second transistor coupled between the floating diffusion node and a modifiable driving voltage source, and a third transistor having a gate coupled to the floating diffusion node, a source coupled to a signal output, and a drain coupled to a constant voltage.
In another embodiment, an imager device is disclosed. The imager device comprises an array of active pixels arranged in rows and columns, a row driver circuit configured to provide control signals to each row of active pixels, and a signal output circuit configured to receive analog signals issued by each column of active pixels, wherein each active pixel in a same row has a pixel circuit that comprises at least one photodiode, a first transistor coupled between the photodiode and a floating diffusion node, a second transistor coupled between the floating diffusion node and a driving voltage signal commonly coupled to all active pixels in the row, and a third transistor having a gate coupled to the floating diffusion node, a source coupled to a signal output, and a drain coupled to a constant voltage.
In still another embodiment, a method for driving the pixel circuit is disclosed. The method comprises resetting the photodiode and the floating diffusion node, exposing the photodiode to light to accumulate charges, selecting the pixel circuit by switching the driving voltage signal from a first voltage level to a second voltage level, retrieving a reference voltage from the selected pixel circuit, and retrieving an image signal from the selected pixel circuit corresponding to the accumulated charges.
At least one advantage of the present invention disclosed herein is the ability to provide a pixel circuit that has a reduced number of transistors and can be selected and unselected for signal readout by simply modifying a driving voltage to which the pixel circuit is coupled. As a result, less power is consumed during operation and undesirable noises induced by power line coupling can be reduced.
So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the drawings. It is to be noted, however, that the drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
In conjunction with
Specifically, in step 206, after the floating diffusion node FD is turned high and the source follower transistor 110 enabled by setting the driving voltage line VRG and the gate voltage RG of the reset transistor 108 to high voltage levels, the gate voltage RG of the reset transistor 108 is then turned low to read out a reference voltage from the reset floating diffusion node FD to the signal output column 112. In step 208, while the gate voltage RG of the reset transistor 108 is low, the gate voltage TG of the transfer transistor 104 is set to a high voltage level to turn on the transfer transistor 104 and transfer the accumulated charges from the photodiode node PD to the floating diffusion node FD. In following step 210, after the charge transfer has been completed and the transfer transistor 104 turned off, an image signal voltage corresponding to the charges received at the floating diffusion node FD can then be read out at the signal output column 112 via the source follower transistor 110 in the ON state. The difference between the reference voltage and the image signal voltage retrieved at the signal output column 112 corresponds to the light signal sensed by the photodiode 104. After the image signal readout operation is completed, steps 202-210 may be repeated to capture and retrieve a next image signal.
Compared to a conventional 4-transistors pixel circuit, some advantages of the pixel circuit 102 described above include, without limitation, a reduced number of transistors, reduced power consumption, and reduced noises. Particularly, the pixel circuit 102 has only three transistors, which improves the fill factor. Also, the pixel circuit 102 can be selected and unselected for signal readout by simply modifying the single driving voltage line VRG to which it is coupled. As a result, less power is consumed during operation, and power line coupling noises are reduced.
It is worth noting that while the above pixel driving method has been described with respect to a single photodiode pixel embodiment, the same driving method may also be advantageously applied for driving multiple pixels coupled in one common pixel circuit.
In conjunction with
After image exposure has been initiated for all the pixel blocks, steps 408-414 are performed to selectively retrieve image signals from each pixel block 308i in a sequential manner. More specifically, in step 408, after the floating node FD has been turned high and the source follower transistor 306 enabled by setting the driving voltage line VRG and the gate voltage RG of the reset transistor 304 to high voltage levels, the gate voltage RG of the reset transistor 304 is then turned low to read out a reference voltage from the reset floating diffusion node FD to the signal output column 314. While the gate voltage RG of the reset transistor 304 is low, the transfer transistor 312i of a selected pixel block 308i is then turned on in step 410 by raising its gate voltage TGi to transfer the accumulated charges from the photodiode node PDi to the floating diffusion node FD. In step 412, after completion of the charge transfer from the selected pixel block 308i to the floating diffusion node FD, the transfer transistor 312i is then turned off by setting a low gate voltage TGi and consequently the image signal voltage is retrieved at the signal output column 314. In step 414, the gate voltage RG of the reset transistor 304 is then turned high and VRG turned low to reset the floating diffusion node FD. After the floating diffusion node FD is reset, subsequent step 416 determines whether all the pixel blocks have been processed to retrieve image signals. If it is not the case, steps 408-414 are repeated until all pixel blocks are processed. Once image signal readout is completed for all the pixel blocks, steps 402-414 may be repeated to capture next image signals.
By providing a pixel circuit in which multiple pixel blocks share a common reset transistor and source follower transistor, the effective number of transistors per pixel block is reduced. To illustrate, the example illustrated in
As has been described above, the provided method and circuit is thus able to select each row of active pixels independently of adjacent pixel rows by coupling the drain of the reset transistor to a driving voltage signal whereas the drain of the source follower transistor is coupled to a constant voltage. As a result, power consumption and coupling noise can be reduced.
The above description illustrates various embodiments of the present invention along with examples of how aspects of the present invention may be implemented. The above examples, embodiments, instruction semantics, and drawings should not be deemed to be the only embodiments, and are presented to illustrate the flexibility and advantages of the present invention as defined by the following claims.