Method and circuitry for demodulating a digital frequency modulated signal

Information

  • Patent Grant
  • 6810092
  • Patent Number
    6,810,092
  • Date Filed
    Wednesday, October 11, 2000
    24 years ago
  • Date Issued
    Tuesday, October 26, 2004
    20 years ago
Abstract
A method and a circuitry for demodulating a digital frequency-modulated signal. After demodulating the digital frequency-modulated signal for generating the signal's amplitude and differential phase value φ, the amplitude of the demodulated signal is compared with a constant at determined sampling times. The phase value of each sampling time is multiplied by a factor, the factor (c) being the product of the amplitude of the determined sampling time and the amplitude of a preceding sampling time, if the amplitude is less than the constant.
Description




BACKGROUND INFORMATION




The present invention relates to a method and a circuitry for demodulating a digital frequency-modulated signal to improve the signal within the small signal range.




Many methods are known for digitally demodulating a frequency-modulated (FM) signal, for example the CORDIAL algorithm. These demodulators present the problem that the signal-noise ratio decreases disproportionately at the demodulator output when the signal-noise ratio of the input signal falls below a certain threshold. This threshold is normally called the FM threshold. This critical point is reached approximately when the noise amplitude is of the same order of magnitude as the signal amplitude. Phase jumps then occur in the demodulated signal.




SUMMARY OF THE INVENTION




It is therefore an object of the present invention to create a method and a circuitry for digitally demodulating a frequency-modulated signal, with which signal the aforementioned drawbacks are largely avoided and the FM reception is improved.




The object is achieved in that, after demodulating the digitized frequency-modulated signal for generating the signal's amplitude A(n) and differential phase value φ′(n), the following steps are performed:




comparing the amplitude A(n) of the demodulated signal with a constant K at determined sampling times n,




multiplying the differential phase value φ(n) of each sampling time n by factor c, factor c being the product of amplitude A(n) of the determined sampling time and amplitude A(n−1) of a preceding sampling time, if amplitude A(n) is less than constant K.




According to the present invention, therefore, instantaneous amplitude value A(n) is additionally provided at the demodulator output and the frequency-modulated signal is modified by this amplitude value. Signal correction occurs only when the signal amplitude drops below a specific value, so that the pulse spikes are reduced in the signal. It has been established that a preceding amplitude value is also advantageously considered in the signal correction and that the demodulator output signal to be corrected, namely differential phase φ(n), is multiplied by the product of amplitude value A(n) and preceding amplitude value A(n−1).




When amplitude value A(n) is greater than or equal to chosen constant K, then the factor should be equal to 1, so that the demodulator output signal remains unchanged.




Advantageously, the method should be performed continuously, amplitude A(n) being compared with constant K and the demodulator output signal being multiplied with the appropriate factor c at each sampling time n. It is advisable that preceding amplitude value A(n−1) to be considered be amplitude value A(n−1) directly preceding instantaneous amplitude value A(n).




In particular, the method is suitable for FM receivers, the following steps being performed before demodulating the digital frequency-modulated signal:




converting an analog high-frequency signal into a digital signal,




mixing the digital signal into a base band,




filtering the base band signal.




The circuitry according to the present invention correspondingly has




a time delay element at the output of the demodulator for the digital amplitude value A(n),




a comparator at the output of the demodulator and time delay element for comparing instantaneous amplitude value A(n) with constant K,




a multiplier for forming the product of instantaneous amplitude value A(n) and preceding amplitude value A(n−1), factor c being equal to the product, if instantaneous amplitude value A(n) is less than constant K,




a multiplier for multiplying differential phase signal φ′(n) by factor c, for generating a demodulated output signals MAX.




Advantageously, the time delay element is designed so that the product is formed from instantaneous amplitude value A(n) and directly preceding amplitude value A(n−1).




When instantaneous amplitude value A(n) is greater than or equal to constant K, factor c should be set equal to 1.











BRIEF DESCRIPTION OF THE DRAWING




The drawing shows a block diagram of the circuitry for digitally demodulating a frequency-modulated signal.











DETAILED DESCRIPTION




High-frequency receiver (


1


) is coupled to an antenna to receive a frequency-modulated signal. Unit (


2


) having an analog-digital converter for converting the analog high-frequency signal into a digital signal, and a mixer for mixing the digital signal into the base band are at the output of high-frequency receiver (


1


). The resulting digital base band signal is preferably low-pass filtered using filter (


3


) and sent to demodulator (


4


). In the demodulator the filtered base band signal is demodulated by known methods.




The input signal of demodulator (


4


) can be described by two signal components (x) and (y) orthogonal to one another:








x


(


n


)=


a


(


n


)*cos (


s


(


n


))+


r




1


(


n


)=:


A


(


n


)*cos (φ(


n


)),










y


(


n


)=


a


(


n


)*sin (


s


(


n


))+


r




2


(


n


)=:


A


(


n


)*sin (φ(


n


)).






Where:




a(n): amplitude at nth sampling time




s(n): modulation at nth sampling time




r


1


(n): real part of noise component at nth sampling time




r


2


(n): imaginary part of noise component at nth sampling time




A(n): amplitude value at nth sampling time




φ(n): phase value at nth sampling time.




Demodulator (


4


) generates differential phase φ′(n) as a demodulator output signal, i.e., the derivative of phase value φ(n). For large signal noise ratios, noise components r


1


(n) and r


2


(n) are negligible. For the derivative of modulation at nth sampling time s' (n) and differential phase φ′(n) then the following applies:








s


'(


n


)≈φ′(


n


)≈φ(


n


)−φ(


n


−1)






It is clear from the above equations that there are phase jumps in the demodulated signal, as soon as the noise amplitude reaches the order of magnitude of the signal amplitude.




Demodulator (


4


) has a second output for amplitudes A(n) of the demodulated signal at each sampling time n. Time delay element (


5


) and also comparator-multiplier element (


6


) having a comparator and a multiplier are provided at the second output in order to calculate factor (c) as the product of instantaneous amplitude value a(n) and delayed amplitude value a(n−1) at the output of time delay element (


5


), if instantaneous amplitude value A(n) is less than a constant. The output of comparator-multiplier element (


6


) is connected to multiplier (


7


) in order to form demodulator output signal (MAX) as a product of calculated factor (c) and differential phase value φ′(n). If amplitude value A(n) is greater than or equal to the constant, the output of the comparator-multiplier element is set at logical “1”. Demodulator output signal (MAX) is then equal to differential phase value φ′(n). Pulse spikes in the demodulator output signal are reduced and the FM reception is improved by correcting differential phase value φ′ (n) at low amplitudes A(n) by multiplying by instantaneous amplitude value A(n) and directly preceding amplitude value A(n−1), as the phase jumps are compensated for in the demodulated signal.



Claims
  • 1. A method for demodulating a digital frequency-modulated signal, comprising the steps of:demodulating the digital frequency-modulated signal; generating an amplitude of the digital frequency-modulated signal as a first output signal; generating a differential phase value of the digital frequency-modulated signal as a second output signal; comparing the amplitude of the demodulated digital frequency-modulated signal with a constant at established sampling times; and multiplying the differential phase value of each sampling time by a factor that is a product of the amplitude at one of the established sampling times and the amplitude at a preceding established sampling time, if the amplitude is less than the constant.
  • 2. The method according to claim 1, wherein:the factor is equal to 1, if the amplitude is one of greater than and equal to the constant.
  • 3. The method according to claim 1, wherein:the step of comparing and the step of multiplying are executed at every established sampling time.
  • 4. The method according to claim 3, further comprising the step of:calculating the factor as a product of the amplitude at one of the established sampling times and the amplitude at a directly preceding established sampling time, if the amplitude is less than the constant.
  • 5. The method according to claim 1, wherein before an execution of the demodulating step, the method comprises the steps of:converting an analog high-frequency signal into a digital signal; mixing the digital signal into a base band signal; and filtering the base band signal.
  • 6. A circuit for digitally demodulating a frequency-modulated signal, comprising:a demodulator including a first output for outputting a digital amplitude value and a second output for outputting a differential phase signal; a time delay element arranged at the first output of the demodulator; a comparator-multiplier element including a comparator arranged on the first output of the demodulator and on an output of the time delay element for comparing the digital amplitude value with a constant; a first multiplier for forming a product of the digital amplitude value and a preceding amplitude value, a factor being equal to the product, if the digital amplitude value is less than the constant; and a second multiplier for multiplying the differential phase signal by the factor for generating a demodulated output signal.
  • 7. The circuit according to claim 6, wherein:the time delay element is designed so that the product of the digital amplitude value and the preceding amplitude value is formed.
  • 8. The circuit according to claim 7, wherein:the factor is equal to 1 if the digital amplitude value is one of greater than and equal to the constant.
  • 9. The circuit according to claim 6, further comprising:a high-frequency receiver; a unit including a mixer and an analog-digital converter for performing a digital conversion of the frequency-modulated signal; and a filter for the digital frequency-modulated signal connected upstream from the demodulator.
Priority Claims (1)
Number Date Country Kind
198 60 402 Dec 1998 DE
PCT Information
Filing Document Filing Date Country Kind
PCT/DE99/03372 WO 00
Publishing Document Publishing Date Country Kind
WO00/39975 7/6/2000 WO A
US Referenced Citations (6)
Number Name Date Kind
4309772 Kloker et al. Jan 1982 A
4397036 Hirade et al. Aug 1983 A
5185609 DeBord Feb 1993 A
5550869 Gurantz et al. Aug 1996 A
6075410 Wildhagen Jun 2000 A
6664849 Taura et al. Dec 2003 B1
Non-Patent Literature Citations (2)
Entry
Modified CORDIC demodulator implementation for digital IF-sampled receiver□□Chen, A.; McDanell, R.; Boytim, M.; Pogue, R.; Global Telecommunications Conference, 1995. GLOBECOM '95., IEEE , vol.: 2 , Nov. 13-17, 1995□□pp.: 1450-1454 vol. 2.*
Chen et al., Reduced Complexity Cordic Demodulator Implementation For D-Amps and Digital IF-Sampled Receiver, IEEE Global Telecommunications Conference, US, New York, 1998.