Claims
- 1. In a communications system for transmitting forward and reverse signals, the reverse signals represented as an analog waveform, the reverse signals including carrier signals and noise signals, a method for detecting at least one carrier signal comprising the steps of:
detecting a peak voltage of the analog waveform during a detection period and for providing a power level envelope signal; digitizing the power level envelope signal to provide a digitized signal; comparing the digitized signal to a threshold power level signal; counting the instances during the detection period that the digitized signal exceeds the threshold power level signal; and providing an enable signal when the number of instances exceeds a threshold number.
- 2. The method of claim 1, wherein providing the enable signal allows further transmission of the reverse signals.
- 3. In a communications system for transmitting forward and reverse signals, the reverse signals including carrier signals and noise signals, the communications system including a dynamic switch, the dynamic switch comprising:
an input port for receiving a first reverse signal from a first portion of the communications system, wherein the first reverse signal is represented as an analog waveform; an analog-to-digital converter for converting the first reverse signal to a digital signal, the digital signal including a plurality of digital bits; a carrier-detect device coupled to the input port for detecting the presence of at least one carrier signal, the carrier-detect device comprising:
a peak detector for detecting a peak level of the analog waveform and for providing a peak envelope signal; an analog-to-digital converter for digitizing the peak envelope signal; and a carrier-detect logic circuit for determining whether the digitized peak envelope signal includes the at least one carrier signal by comparing the digitized peak envelope signal to a threshold power level during a detection period and for providing an enable signal when the at least one carrier signal is detected; and a buffer for temporarily storing the plurality of digital bits and for outputting the plurality of digital bits when the enable signal is received; a digital-to-analog converter for receiving the plurality of digital bits from the buffer and for converting the plurality of digital bits into a second reverse signal corresponding to the first reverse signal; and an output port for providing the second reverse signal to a second portion of the communications system.
- 4. The dynamic switch of claim 3, the carrier-detect logic circuit comprising:
a threshold detector for comparing the digitized peak envelope signal to the threshold power level; a counter for providing a number in accordance with the digitized peak envelope signal above the threshold power level during the detection period; and a carrier output enable circuit for providing the enable signal when the number of the digitized peak envelope signal above the threshold power level exceeds a predetermined number.
- 5. In a communication system having forward and reverse paths for transmitting forward and reverse signals, respectively, the reverse signals including carrier signals and noise signals, the communications system including a communications device, the communications device including:
a first diplex filter having a high pass filter and a low pass filter, the high pass filter for isolating the forward signals, and the low pass filter for isolating the reverse signals; forward path elements coupled to the high pass filter of the first diplex filter for processing; a second diplex filter having a high pass filter and a low pass filter, the high pass filter coupled to the forward path elements for providing the processed forward signals to the forward path, and the low pass filter for receiving reverse signals; a dynamic switch coupled to the low pass filter of the second diplex filter, the dynamic switch comprising:
digitizing means for converting a reverse signal to a digital signal having a predetermined number of digital bits; detecting means for detecting when at least one reverse carrier signal is present in the reverse signal, wherein the reverse signal is represented as an analog waveform, the detecting means comprising:
a peak detector for detecting a peak level of the analog waveform and for providing a peak envelope signal; an analog-to-digital converter for digitizing the peak envelope signal; and a carrier-detect logic circuit for determining whether the digitized peak envelope signal includes the at least one carrier signal by comparing the digitized peak envelope signal to a threshold power level during a detection period and for providing an enable signal when the at least one carrier signal is detected; and a buffer for delaying the plurality of digital bits and for releasing the delayed plurality of digital bits in response to the enable signal; and converting means for converting the delayed plurality of digital bits back to the reverse signal; and reverse path elements coupled to the dynamic switch for processing and for providing the processed reverse signal to the low pass filter of the first filter, whereby upon detection of the at least one reverse carrier signal, the reverse signal is provided to the reverse path elements.
- 6. The communications system of claim 5, wherein the carrier-detect logic circuit comprises:
a threshold detector for comparing the digitized peak envelope signal to the threshold power level; a counter for providing a number in accordance with the digitized peak envelope signal above the threshold power level during the detection period; and a carrier output enable circuit for providing the enable signal when the number of the digitized peak envelope signal above the threshold power level exceeds a predetermined number.
RELATED APPLICATIONS
[0001] The subject matter of this invention is related to application Ser. No. 10/026,283 entitled “HFC Reverse Path using an Intelligent Dynamic Switch” of which was filed on Dec. 21, 2001, application Ser. No. 09/840,753 entitled “Burst-Mode Analog Transmitter” of which was filed on Apr. 23, 2001, and application Ser. No. 09/840,767 entitled “Burst-Mode Digital Transmitter” of which was filed on Apr. 23, 2001, all of which are assigned to the assignee hereof, and the teachings of which are hereby incorporated by reference herein in their entirety.