The present invention concerns a method for colour printing and magnetic encoding of plastic cards, in particular pre-paid cards, smart cards and the like.
The invention comprises also a compact, reliable, efficient, low-cost machine embodying said method.
There is a huge and fast development and commercial use in every field of the so called smart-cards.
Consequently there has been a parallel development of processes, systems and machines for the plastic cards identification, implementing the different technologies that have been brought about in the last 20 years.
The field of said methods, systems, machines and the like is now-a-day a so-called patent crowded field.
Among the most important aspects of this recent and continuously improving technology we have to emphasize the following:
About aspect 1), there is a large number of patents, such as WO/0016235 and U.S. Pat. No. 5,941,522 that mostly concern the mechanical complexity of the design of a Plastic Card Printer including a Magnetic Encoder. Generally, however, the encoding is carried out after (downstream along the card path) the Printing, whereby there is the drawback that cards that are printed well may nevertheless be poorly downloaded because they have undergone a bad encoding with a non-negligible card waste.
As to item 2) we limit ourselves to cite U.S. Pat. No. 5,486,057.
European Patent Application Publication n. 0 299 653 A2 concerns a Method and Apparatus for the Thermal Printing and the relevant Thermal Heat feeding.
Several systems and methods for the Ribbon Colour Detection have been proposed and implemented, such as those described in WO 00/34050, EP Publications N. 0189574 A2 and N. 0 624 480 A2 and French Pat. Pub. N. 2 783 460 A1.
UK Patent Application N. 2 258 550 A, International Patent Publication WO 96/06739 and EP Publication 0 573 336 A1, concern the Thermal Printing Control through the control of the Heat feed to the Printing Head.
Moreover, up to now, the overall printing, encoding, colour detecting, and printing thermal control have been managed by an electronic system based on a CPU (Central Processing Unit), that implements for each control aspect a SW (Software) driver which has to execute its function at the same time, all together and in real time.
The computational complexity of all these drivers, executed in multitasking, has required the use of CPUs with increasing performances and resources, which generally are expensive and difficult to manage.
Accordingly, the methods and apparatus described in the Published Patent Literature show, together with several merits, also many decisive and conditioning inconveniences. Just to mention a major drawback, the conventional apparatus must have a longitudinal length of at least four times the major dimension of a card.
First object of the present invention is to provide a general method which eliminates the drawbacks and insufficiencies of the Prior Art, in particular of the Art according to the above mentioned Patents.
Another object of the present invention is to provide a compact, reliable, efficient and low cost machine implementing said method.
The present invention concerns a method for ribbon colour thermal printing and/or encoding cards particularly pre-paid-, smart-, chip-cards and the like, by detecting the printing ribbon colour, controlling the thermal printing energy feed and driving said printing encoding and detecting.
According to a first feature of the invention, a) said encoding is carried out spacially upstream to said thermal printing and b) detection takes place spacially between said encoding and printing and contemporaneously to said printing.
Typically step a) is carried out by critically coordinating encoding and printing, in particular by encoding at a distance from the printing lower then card major dimension. Characteristically for step b) the detection is positioned in a plane vertically superposed to the plane containing aligned encoding and printing, so to minimize both the length between encoding and printing and the height of the detection over printing.
Advantageously encoding, printing and detection are controlled by hardware (HW) reprogrammable i.e. with FPGA) while the thermal printing is controlled by controlling the thermal energy feed with the aid of a space-time convolution algorithm.
The invention comprises a compact, reliable, efficient and low-cost machine characterized in that along the card path from the card feeder to the card unloader, the encoder is spatially upstream from the thermal printer at a distance not greater than the major dimension of the card; the colour sensor is positioned between said encoder and printer but in a plane superposed to the plane of said encoder and printer containing also the card path line; and the spatial distance between sensor and printer, minimizing both the length and the height of the machine, is equal to the major dimension of the ribbon colour panel.
Further features of the invention are recited in the claims at the end of the specification, which are however considered herein incorporated.
The various features and advantages of the invention will better appear from the following description of the embodiments represented in the accompanying drawings, in which:
a: is the explosion of the Transmission Sequence represented in the Flow Chart of
b: is the decisional table used by the colour detector driver for interpreting the information obtained during the transmission sequence.
The first feature of the invention is that the encoding (1) is upstream the printing (3) with which is spacially aligned while the colour detection (2) is in the space between said encoding and printing but in a plane vertically different from the plane containing printer and encoder.
This is possible by critically coordinating the magnetic encoding (1) and the thermal printing (3), in the sense that the magnetic encoding and the thermal printing share a common portion of the machine longitudinal dimension, both referring to the same alignment photocell (not represented).
In contrast, in the conventional positioning, the total machine longitudinal dimension is at least four times the length of a card. In fact one card length is reserved to the card feeder (CF), two card lengths are reserved to the thermal printing and one card length is reserved to the magnetic encoding.
Accordingly with the new general spacial disposition of the three elements of the invention, the total length of the machine is not over 3 times the card length, which represents a space saving of 25%
At the same time, and as shown in
The positioning of the colour detector (2) with respect to the thermal printer (3) is shown in
As shown in the top portion of
It can be immediately anticipated that, according to an advantageous feature of the invention, all Drivers are implemented in Reprogrammable HW (Hardware) and fitted into Devices, well known with the name of Field Programmable Gate Array (FPGA), and particularly the ones based onto the SRAM (Static Random Access Memory) technology.
Returning to the Overall System OS of the invention (
The Ribbon (R) from the Ribbon Feeder (RF) arrives through line RF—2 to Colour Detector (2) and through line R2—3 arrives to Printer (3) from which goes to the Ribbon Recovery (RR).
At the START point of the Process the Card C coming from the Card Feeder CF can follow two different paths, depending on the fact that it has to undergo the Magnetic Encoding (1) or not.
Path CF—1
Via path CF—1 the Card undergoes the phase corresponding to the Magnetic Data Encoding (1A) (Data are written on the tracks selected by the User), and immediately thereafter undergoes the Magnetic Data Decoding (1B) (The written data are Read and Verified); thereafter if the read data are correct in IC, the card is ready for the possible Thermal Printing (3). In case the verifying phase (1B) of the written data doesn't succeed, further attempts of Encoding (1A) and Decoding (1B) are attempted up to a predefined maximum number, after which it is decided that the card is defective and has to be ejected.
Path CF—3
When Magnetic Encoding is not required the card can directly and rapidly proceed to the Thermal Printing phase, bypassing thus the unnecessary encoding and enhancing the efficiency.
After the Magnetic Encoding two more paths are possible for the Card.
Path C1—3
Through path C1—3 the Card enters the Thermal Printing (3) process all together with the Colour Ribbon (R). The card processing and the Ribbon processing are synchronized at the beginning of each Colour Panel Printing, when the Card has to reach the Start of Printing Position and the Ribbon, under the control of the Colour Detector (2), has to reach the beginning of the next Colour Panel to be Printed.
When all the colour panels of the Ribbon have been Printed, the Card can reach the Unloader position (CU), through the C3—U path.
Path C1—U
Through the path C1—U, the card, after Magnetically Encoding (1), (a Thermal Printing phase being unnecessary), is directly discharged into the Unloader (CU).
As it can be appreciated also from the flow chart of
Reprogrammable HW Implementing the Process Drivers
The prior art in the electronic system implemented for the control of Plastic Cards Thermal Printers and/or Encoders, has as unique flexibility's element, the one related to the SW (Software) code executed by the Central Processing Unit. In those electronic systems, once the HW (Hardware) resources are defined, the only functional improvement can be obtained by working on the Execution Code.
This conventional architecture is knowingly unsuitable to give a reprogrammable HW: indeed it is absolutely lacking flexibility to allow functional upgrading or debugging.
Such a kind of architecture does not allow the possibility of adding, improving, or correcting the HW functionalities over time.
This aspect represents a great limitation in particular for the following reasons:
An aspect of the present invention is that the structures of the overall system (OS) and of the Overall Processing (OP) allow the implementation of the HW technology based on the use of components called Field Programmable Gate Arrays (FPGA), whose HW configuration can be defined in the so called “In System Programming” (ISP).
Such ISP configuration of the HW allows to configure the FPGA components under control of the Central Processing Unit, downloading via SW a bit-stream that can be previously stored into the system non volatile memory (41′ in
Summarizing, the reprogrammable HW of the invention is obtained simply by replacing the standard I/O peripherals with In System Programmable and reconfigurable devices (Static RAM based FPGA), and introducing in the prior block diagram a configuration memory (41′) and an appropriate interface between the FPGAs and the CPU.
The procedure to update the HW is composed of the following steps:
The major advantages of the HW reconfigurability are:
Accordingly a further advantage of the present invention, is the fact that the Overall Processing block (OP) has been based on the previously described technology, so that each critical operation is controlled by an HW Driver, implemented into SW reconfigurable FPGA.
What is really important to underline is that it is now possible to update the HW configuration of the drivers, also at the customer side, through a download operation that can happen using the standard connection port of the machine itself.
In the following paragraphs are described the single Driver Implementation, with more emphasis to the Color Sensor Control and the Thermal Energy Feeding for the monochromatic printing.
Colour Detection
Preferably the colour detector (2) structure is advantageously implemented as shown in
The Ribbon (R), before undergoing the Thermal Printing (3), enters the Colour Detector (2), passing in the space between a transmitting unit (Tx) and a receiving unit (Rx). The recognition of the ribbon colour, happens by interpreting the information given by receiver (Rx), relative to the components of the emitted light that is able to pass the filtering action given by the presence of the ribbon R.
A preferred and advantageous embodiment of the Colour Detector(2) is described in
As previously announced, the Colour Detector (2) is composed of a transmitter unit (Tx), a receiver unit (Rx), an HW interface towards the transmitter unit (Tx1), an HW interface towards the receiver unit (Rx1) and a driver (D2) that is internally divided into at least two sub-units, one controlling the Transmitter function (TxD) and the other controlling the Receiving function (RxD).
The Transmitter Unit (Tx) is composed of three LEDs (Light Emitting Diodes), respectively of colour Red (Tx#1), Green (Tx#2) and Blue (Tx#3).
Those LEDs are driven by power switches present into the Transmitter Interface, according to the control signals supplied by the transmitter driver (TxD).
The light intensity emitted by each LED is controlled through series trimmers, not represented, that are regulated through a calibration procedure using a particular calibration equipment, that are not described in the present document, as they can be considered persè known and requires no further details.
The Transmitter Driver (TxD) is composed by a Finite State Machine that is triggered by a periodic event to drive in sequence LEDs Tx#1, Tx#2, Tx#3, with an activation pulse, Tled, with a duration of 20 microseconds. Such activation time, Tied, has been determined as the characteristic response time of the photo-detectors.
The receiver unit (Rx) is composed by three equivalent large-band photo-detectors Rx#1, Rx#2, Rx#3, one for each transmitter, and mechanically faced to each relevant transmitter.
The receiver interface (RxI) acts as signal conditioning HW shown in the Block Diagram represented in
The signal outgoing the Receiver Unit (RX), named S—IN, at first enters block RX—F1, a Gain Amplifier (G), to generate a signal SI which is more significant with respect to the power supply range.
S1 then enters the block RX—F2, an AC Decoupler, that filters the signal over the frequency of 10 KHz, obtaining a signal S2. S2 enters block RX—F3, which is a Peak detector, to obtain a signal S3 that store the maximum value reached by S2.
Then S3 enters block RX—F4 (a Sample-and-Hold Stage,) that samples S3 in the period corresponding to the transmitter activation, obtaining signal S4. Thereafter S4 is compared with a threshold voltage (in RX—F5) positioned in the middle of the power supply voltage range and the result is stored into a detection result register (in RX—F6) at the end of the transmitter activation pulse.
Both RX—F4 (Sample and Hold) and RXJF6 (Detection result Register) are fed with the LED enabling signal.
A further aspect of the present invention is the critical control and coordination of the activities implemented by the Transmitter and the Receiver Units, to constantly keep the Central Processing Unit informed about the colour status during ribbon movement.
This activity of control and coordination of the overall Colour Detector (2) is assigned to the HW reprogrammable Driver (D2), that is preferably implemented as a Finite State Machine (FSM)(persè known).
The behaviour of such Colour Detector-FSM can be described through an Hardware Description Language, like VHDL (Very high speed integrated circuit Hardware Description Language), simply translating the behavioural flow chart shown in
In particular, the colour detection is periodically activated by a Trigger Generator (TG) that starts the Transmitter Activation Sequence (TC—SEQ), described in detail by the flow chart represented in
Following the Transmitter Activation Sequence (Tx—SEQ) comes a decoding phase (COL—DEC) in which the information stored during the previous sequence are interpreted to determine the ribbon colour present under the sensor.
In
In
Summarizing the ribbon colour information is obtained by a reprogrammable HW, that has a repetitive behaviour. This Driver, periodically activated, excites in sequence the three transmitting LEDs Tx#1, Tx#2 and Tx#3, and composing the three correspondent responses, obtains an information that is decoded using the Colour Detecting Table of
In conclusion, this section has presented an implementation of the preferred embodiment of the Colour Detector (2) Driver (D2) onto an HW reprogrammable device.
The behaviour of the control function of this driver, is well suited for an HW implementation, since it is a repetitive control cycle that can be easily described through a Finite State Machine.
Such FSM behaviour can be easily translated into such HW implementation using an Hardware Description Language.
The result of the implementation into an HW level of the Colour Detector Driver (D2) allows one to free the CPU of a hard duty, and at the same time allows one to have real time information of the ribbon colour.
Energy Feeding Control for a Thermal Printing Head
The core problem of a Thermal Card Printer is the heat control of the printing elements.
The thermal printing of plastic cards, uses the transfer of coloured pigments from a Ribbon (R) to the plastic card (C).
This ink transfer requires a flow of heating energy to the printing elements (DOTs), usually implemented as ceramic resistors, to carry the ink molecules to the separation temperature.
Once the transfer temperature is reached, it is needed to transfer to the DOT a further quantity of energy for modulating the quantity of pigment that it's needed to move from the ribbon to the card.
The device that allows the thermal transfer control, is a printing head (TPH in
In
The TPH is composed of a shift-register (SR) on which is the data that defines the DOTs activation enable to the heating for the next printing. This insertion can happen while a previously inserted DOT line is running the heating cycle.
When the previous heating cycle is completed, the data present on the shift-register (SR) are loaded on a latch register (LR) whose outputs enable the power switches that feed the DOT.
When the control signal STROBE is activated, the DOTs that are enabled by the signals coming from the latch register (LR), are powered for the time of activation (Tstrobe) of the STROBE (STR), developing an energy of
Ed={[(24V)^2/Rhead]*Tstrobe}.
In an ideal case in which the printing elements were without thermal memory and without thermal interference (each thermally isolated), the calculation of the energy necessary to get the desired thermal state would be extremely simplified.
However, this simplification is not admissible when it's desired to get printings of excellent quality also in conditions of high speed, that is of a minimum delay between the printing of one line and of the following one.
A complete mathematical model of the thermal behaviour of the Dots, should consider the effects deriving from their printing history and the Energy contributions coming from all the neighboring heating elements.
A simplified, but effective, model considers the contributions of the first adjoining heating element, and the DOT history departing from the medium head temperature and taking into account the activity of each element just on the row before the present.
The heating control system, implemented in the present invention considers the non-ideality of the Printing Head, that are the DOT thermal memory and the thermal contribution that influences one dot printing area coming from the neighboring heating elements.
For simplification, the system will be here described as limited to the monochromatic printing and be named “Spacial and Temporal Convolution for the Dot energy feeding computation”.
The Energy feeding for each printing line, corresponding to one image vertical row, is decomposed in four fundamental components, that are:
In this figure are evident the DATA0 input signal, the serializing CLOCK, the LACTH signal and the STROBE signal.
DATA0 is serially inserted into the Shift-Register (SR), then the SR outputs are stored into the Latch Register (LR), and finally the STROBE signal activate when low, the Dot energizing phase.
The four heating phases are shown:
Phase 2 (P2) corresponds to the Global Preheating, phase 1 (P1) corresponds to the Local Preheating, Phase 4 (P4) is the Convolution Heating and Phase 3 (P3) is the Printing Heating.
This complex system has been developed into the HW Driver (D3) of the Thermal Printing (3).
At each printing Row, corresponding to a image line or Bitmap row of a Graphic RAM, the previous line data, stored into the Current Row Register set (60), are shifted into the Previous Row Register set (61), during the phase PA, and the CPU (
The Arithmetic Logic Unit (ALU), computes the four data sequences to feed into the Thermal Printing Head, corresponding to the four Heating contributions previously described.
Each data sequence is fed into the TPH through a Serialize Unit (SU) that controls the TPH control signals, i.e. the Data, Clock and Latch.
The ALU unit feeds the Output Shift Register of the Driver (D3) performing the computations described in
In
In particular:
STEP 1 corresponds to the Global PreHeating phase, in which all Dots have to be energized. In this case the Thermal Print Head is fed with a constant row RC, composed by all ones.
STEP 2 corresponds to the Local PreHeating phase, in which it is necessary to activate the Dots that are lighted in the current row RB=Row (Row i), and were not lighted in the previous row RA=(Row i−1). In this case the Thermal Print Head is fed with a row RD, achieved with the following formula: RD=RB and (not RA).
STEP 3 corresponds to the Printing Heating phase, in which the current Row (RB=Row i) is transferred into the Thermal Printing Head (TPH) to be Printed.
STEP 4 corresponds to the Convolution Heating phase, in which it is necessary to activate the Dots that are lighted in the current Row (RB=Row i), that have at least one neighbour that is off.
In this case the Thermal Print Head is fed with a row RD, obtained with the following formula:
RD=(RB[k] xor RB[k]<<1) or (RB[k] xor RB[k]>>1)
After each step the Driver informs the CPU that the Head is ready for printing through an interrupt service routine, than the CPU pilots the STROBE signal to energize the selected Dots for the time required to each function to be performed.
In conclusion, in this paragraph an efficient system for the energy feeding of a thermal print head has been presented. This system considers the non idealities of the printing elements that are the thermal memory of each dot and the thermal interference that happens between neighboring dots.
This system for being efficiently implemented requires to demand a relevant part of the head control to an HW Driver.
An embodiment of such HW, that has been realized by means of a Field Programmable Gate Array, has been presented by describing its structure and basic working.
Once again the opportune system co-design, HW and SW, has allowed one to obtain an optimum trade-off between performance and printing quality, keeping a sufficient level of flexibility, so that this system is open to future improvements.
For illustrative clarity the invention has been described with particular reference to the embodiments represented in the accompanying drawings. It is obvious that all changes, alternatives, substitutions and the like to said embodiments which are in the reach of one skilled in the art are to be considered as falling within the scope and the spirit of the following claims.
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PCT/US02/24992 | 8/8/2002 | WO | 00 | 8/8/2003 |
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WO2004/019153 | 3/4/2004 | WO | A |
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