The present invention relates to read-write heads for mass storage devices, and particularly to methods and processes for manufacturing read sensors used in read heads of mass storage devices.
Magnetic recording is a mainstay of the information-processing industry. Memory storage devices, like magnetic disk drives, include a disk or platter covered by a thin layer of recording media on which magnetically-encoded data can be written, stored, and later retrieved for use. Generally, a write sensor in a write head writes discrete bits of magnetically-encoded data in radially-spaced, concentric circular tracks in the recording media. The magnetically-encoded data, which is stored by the recording media in a binary state given by the direction of the local magnetic field, is read using a read sensor in a read head. The read and write heads are connected to circuitry that operates under computer control to implement the writing and reading operations.
The areal recording density of the recording media is limited by the critical dimension or minimum feature size of the read-write head and by the constituent material forming the recording media. As the critical dimension of the read sensor and write sensor in the read-write head drive decreases, the areal recording density of the recording media rises. However, conventional longitudinal or current-in-plane (CIP) spin-valve read sensors used in read-write heads cannot produce an adequate output amplitude as the critical dimension of the read head is reduced into deep sub-micron critical dimensions. Consequently, read sensors having a current-perpendicular-to-plane (CPP) geometry have replaced the conventional CIP spin-valve read sensors in high-density memory storage devices with “perpendicular” recording media, which have been found to be superior to “longitudinal” recording media in achieving very high bit densities. Conventional CPP read sensors include exchange biased spin-valve or giant magnetoresistance (GMR), ferromagnetic/nonmagnetic ([FM/NM]n) multi-layer, and tunnel magnetoresistive (TMR) type architectures.
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The substrate supporting the bi-layer resist mask 23 and the read sensor 12 are then covered by blanket depositions of a hard biasing (HB) layer 20 (
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Common methods for depositing the electrical insulator to form isolation layer 22 include collimated deposition at room temperature by ion beam deposition (IBD) or physical vapor deposition (PVD) using dual collimated magnetron sputtering. Generally, the step coverage (i.e., the ratio of dimension “a” of isolation layer 22 to the dimension “b” of layer 22 as defined below) on a sidewall 24 of read sensor 12 using a collimated PVD process is limited to a range of about 15 percent to 30 percent, depending on the specific etch wall angles on the sidewall 24 as increasing the steepness of the sidewall 24 decreases the step coverage. In other words, the thickness of the isolation layer tapers along the height of the sidewall 24 and is significantly thicker in field regions than on the sidewall 24. Generally, depositing the isolation layer 22 by an IBD process improves step coverage on the sidewall 24 of the read sensor 12 than comparable depositions with a collimated PVD process. However, the step coverage available with IBD processes is still limited to a maximum of about 60 percent, again depending on the specific etch wall angles on the sidewall 24.
Because of the poor step coverage provided by either IBD or PVD processes, the electrical insulator in the deposited isolation layer 22 is significantly thicker in a field region distant from the read sensor 12 than on the sensor sidewall 24. A typical difference between the thickness, a, of isolation layer 22 on sidewall 24 in the vicinity of free layer 14 and the thickness, b, of isolation layer 22 in the field region is a factor of three or more. For instance, depositing a 50 Å isolation layer 22 on the sensor sidewall 24 often results in at least a 150 Å to 200 Å thick isolation layer 22 in the field region.
For a typical TMR sensor stack, the thickness difference of the isolation layer 22 in the field region and on the sensor sidewall 24 results in poor alignment of the HB layer 20 to the free layer 14. The geometrical offset due to the thickness difference gives rise to high surface topography with respect to the read sensor 12, resulting in an upward flaring of the read gap, which leads to poor read performance from side reading. The upward flaring of the read gap, generally indicated by reference numeral 26 and visible in
As the sidewall coverage improves, the thickness “b” decreases and the flaring of the read gap is reduced. Accordingly, the isolation layer 22 may be deposited by atomic layer deposition (ALD), which is capable of nearly 100 percent step coverage, so that the thickness “a” of the electrical insulator on the sidewall 24 is approximately equal to the thickness “b” in the field region. Although this improves the performance of the read head 10, deposition temperatures during the ALD process exceeding 130° C. hard bake the bi-layer resist mask 23 (
More significantly, the lift-off process used to form the isolation layer 22 sets a fundamental upper limit on the thickness of the isolation layer 22. Specifically, the lift-off process does not scale for forming sub-micron sized read sensors 10 and, in particular, smaller than about 250 nanometers, because the undercut beneath the upper resist layer 23a of bi-layer resist mask 23 becomes too small. Moreover, because of the characteristic 100 percent step coverage afforded by ALD, the electrical insulator in isolation layer 22 may completely fill the undercut beneath the upper resist layer 23a of bi-layer resist mask 23, which would render the lift-off process nearly impossible or, at the least, unreliable. Another limitation is that, with further reductions in the critical dimensions of the read sensor 12, the undercut beneath the upper resist layer 23a of bi-layer resist mask 23 will eventually become too small to support the overlayers of the HB layer 20 and isolation layer 22 and, therefore, result in unreliable lift-off.
What is needed, therefore, is an improved method and process for fabricating read sensors for read-write heads that overcomes these and other deficiencies of conventional fabrication methods and processes for such read sensors.
In accordance with the present invention, methods are provided for fabricating a device structure for a read head of a mass storage device. A planarization process is employed to remove a resist mask, which is used in a preceding fabrication stage as an ion milling mask, when forming a read sensor of the read head. A polish stop layer, which is formed of a relatively hard and/or wear-resistant material, is strategically positioned so as to eliminate the need to lift-off the bi-layer resist mask with a conventional chemical-based process. By eliminating the conventional chemical lift-off, an electrical isolation layer of a material such as Al2O3 may be formed on the read sensor using atomic layer deposition (AID) performed at a temperature exceeding 130° C.
In one embodiment of one aspect of the present invention, the method includes forming a layer stack including multiple layers capable of operating as a read sensor, forming a polish stop layer on the layer stack, and then defining a read sensor from the layer stack that is covered by a portion of the polish stop layer. After the read sensor is defined, an isolation layer including an electrical insulator is formed on the polish stop layer portion and the read sensor. A hard bias layer including a magnetic material is then formed on the isolation layer. The isolation layer and the hard bias layer are planarized using, for example, chemical mechanical polishing. The planarization stops vertically on the polish stop layer portion.
In an embodiment of another aspect of the present invention, the method includes forming a layer stack including multiple layers capable of operating as a read sensor, forming a polish stop layer on the layer stack, and forming a resist mask on the polish stop layer. A read sensor is formed from the layer stack at one of the locations masked by the resist mask. The read sensor and resist mask are separated by a residual portion of the polish stop layer. An isolation layer of an electrical insulator is formed on the polish stop layer portion, the resist mask, and the read sensor by an atomic layer deposition (ALD) process, which may be performed at a temperature exceeding 130° C.
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and, together with a general description of the invention given above and the detailed description of the embodiments given below, serve to explain the principles of the invention.
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A layer stack 32 including a plurality of thin films is formed on the insulating layer 30 in which each individual thin film is formed by a suitable conventional deposition process, such as sputter deposition or an ion beam deposition (IBD) process. The layer stack 32 is shaped by a subsequent process to define a plurality of read sensors 34 (
Each read sensor 34 (
A polish stop layer 40 is formed on the layer stack 32. The polish stop layer 40 includes a material having a hardness and/or wear resistance sufficient to operate as a polish stop during planarization, as understood by a person of ordinary skill in the art. The polish stop layer 40 may be any material having a removal rate under planarization slower than a removal rate of an isolation layer 46 and an HB layer 48 (
Suitable materials for polish stop layer 40 include diamond-like carbon (DLC) formed by a conventional process like methane direct IBD, dual ion beam sputtering, radiofrequency or direct current excited hydrocarbon glow discharges, IBD or hydrocarbon glow discharge on an underlying silicon seed layer, and a filtered cathode arc (FCA) process. Preferably, the DLC is either hydrogenated DLC formed by direct ion beam deposition IBD, dual ion beam sputtering, radiofrequency-excited hydrocarbon glow discharge, or direct current-excited hydrocarbon glow discharge, or tetrahedral amorphous (ta-C) DLC formed by a filter cathode arc (FCA) process. DLC is a relatively hard material with low wear under abrasion and is inert chemically when exposed to the slurries used in CMP.
The material constituting polish stop layer 40 has a lower wear (i.e., a greater wear resistance) and/or a greater hardness than the constituent materials forming the isolation and HB layers 46, 48. In one embodiment of the present invention, the hardness of the constituent material of polish stop layer 40 is greater than about 10 gigapascals (GPa). Depending upon the specific forming process, the hardness of DLC for use as the polish stop layer 40 may be in the range of 10 GPa to about 70 GPa.
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The ALD process, which may be used to form the isolation layer 46, may be performed at a relatively high temperature within a broad temperature window that may extend as high as an upper limit of about 230° C. and, preferably, that exceeds 130° C. In conventional processes that rely on resist lift-off, the upper temperature limit on ALD processes is significantly lower because of adverse thermal effects that negatively impact resist lift-off. The elevated temperatures for the ALD process used in the present invention, which does not rely on lift-off, permit the isolation layer 46 to be formed with a reduced impurity content, which improves the performance of the read sensor 34 by reducing leakage current. However, the invention is not so limited as the ALD process may be performed at a lower temperature if impurity content is not a concern and/or to gain the advantages offered by the presence of the polish stop layer 40. In addition, other deposition processes, preferably processes that are capable of conformal deposition, may be used to form the isolation layer 46 while gaining the advantages offered by the presence of the polish stop layer 40.
The hard bias (HB) layer 48 is deposited, preferably conformally, on the isolation layer 46. In the illustrated embodiment of the present invention, the HB layer 48 includes a seed layer 50 and a “hard” magnetic layer 52 formed on the seed layer 50. The seed layer 50 may be chromium (Cr), titanium (Ti), a titanium chromium alloy (TiCr), a titanium tungsten alloy (TiW), or any other suitable material capable of providing an appropriate epitaxial template for the overlying magnetic layer 52. The “hard” magnetic material constituting magnetic layer 52 may be a cobalt-chromium-platinum alloy (CoCrPt), a cobalt-platinum alloy (CoPt), or any other material with the magnetic properties appropriate for use in the read sensor 34. Generally, the “hard” magnetic material may be any material in which a magnetization orientation is maintained when exposed to relatively low magnetic fields used during operation of the read sensor 34. The invention contemplates that the HB layer 48 may be formed from a single material as one individual layer, as opposed to the bilayer construction shown in
An exposed surface 54 of the HB layer 48 is uneven after the isolation layer 46 and the HB layer 48 are applied, preferably conformally, across the projecting read sensors 34 and the recessed surface areas between adjacent read sensors 34 in which the insulating layer 30 is exposed after ion milling. This unevenness of the surface topography is reduced by a subsequent planarization process (
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The planarization stops vertically at the level of the polish stop layer 40 because the material constituting the polish stop layer 40 has a greater hardness and, preferably, a significantly greater hardness than the materials constituting the resist mask 42, the isolation layer 46, and the HB layer 48. The exposed surface 54 may retain some surface topography after planarization. The residual HB layer 48 longitudinally stabilizes the free layer 14 and the remnants of the isolation layer 46 define a gap layer in the completed read head 60.
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Because the isolation layer 46 has a substantially uniform thickness on the sidewall 44 of the read sensor 34 and in field regions remote from the read sensor 34, the midplane of the HB layer 48 is located at approximately the same horizontal level as the midplane and side edges of the free layer 38. In contrast to conventional read heads 10 (
In accordance with the principles of the invention, the RIBE, ALD, and IBD processes used to fabricate the read head 60 may be performed in a single process tool platform without breaking vacuum. The integration of these diverse processes has the benefit of reducing any oxidation of the metal layers in the sensor stack, which occurs in a non-integrated platform when the structure is exposed to atmosphere during chamber transfers between processes. This oxidation, which the present invention may minimize or eliminate, can lead to poor control of the track width and the hard bias/free layer spacing in deep sub-micron read sensors 34. A tool that integrates IBE, ALD and IBD processes is the NEXUS cluster tool platform commercially available from Veeco Instruments Inc. (Plainview, N.Y.).
The isolation layer 46 may be formed using ALD, which provides nearly 100 percent step coverage and, hence, results in excellent electrical isolation performance. The digitized atomic layer by atomic layer growth afforded by the ALD process permits precise control over the thickness of isolation layer 46 and, therefore, the spacing or relative verticality of the HB layer 48 relative to free layer 38. This permits effective biasing, minimizes flaring of read gap, and improves the performance of the read sensor 34. The isolation layer 46 is also free of any inboard/outboard asymmetries, as may be observed in many conventional IBD processes, due to the nature of the ALD process.
The presence of the polish stop layer 40 affords precise and reliable control of the planarization process of
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References herein to terms such as “vertical”, “horizontal”, etc. are made by way of example, and not by way of limitation, to establish a frame of reference. The term “horizontal” as used herein is defined as a plane parallel to the conventional plane or surface of the substrate, regardless of the actual spatial orientation of the substrate. The term “vertical” refers to a direction perpendicular to the horizontal, as just defined. Terms, such as “on”, “above”, “below”, “side” (as in “sidewall”), “higher”, “lower”, “over”, “beneath” and “under”, are defined with respect to the horizontal plane. It is understood that various other frames of reference may be employed for describing the present invention without departing from the spirit and scope of the present invention.
The fabrication of the device structure herein has been described by a specific order of fabrication stages and steps. However, it is understood that the order may differ from that described. For example, the order of two or more fabrication steps may be switched relative to the order shown. Moreover, two or more fabrication steps may be conducted either concurrently or with partial concurrence. In addition, various fabrication steps may be omitted and other fabrication steps may be added. It is understood that all such variations are within the scope of the present invention.
While the present invention has been illustrated by a description of various embodiments and while these embodiments have been described in considerable detail, it is not the intention of the applicants to restrict or in any way limit the scope of the appended claims to such detail. Additional advantages and modifications will readily appear to those skilled in the art. Thus, the invention in its broader aspects is therefore not limited to the specific details, representative apparatus and method, and illustrative example shown and described. Accordingly, departures may be made from such details without departing from the spirit or scope of applicants' general inventive concept.