| Authors: Clovis L. Tondo, Andrew Nathanson and Eden Yount; Title: Mastering Make—A Guide to Building Programs on DOS and Unix Systems; Date:1992; Publisher: PTR Prentice Hall, Inc.; Chapters: 1-5.* |
| Jack W. Davidson and David B. Whalley, “Reducing the Cost of Branches by Using Registers,” Proceedings of the 17th Annual Symposium on Computer Architecture, Seattle, Washington, May 28-31, 1990. |
| Jens Knoop, et al., “The Power of Assignment Motion,” ACM SIGPLAN '95 Conference on Programming Language Design and Implementation, La Jolla, California, Jun. 18-21, 1995. |
| Hiralal Agrawal, “Dominators, Super Blocks, and Program Coverage,” 21st ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages, Portland, Oregon, Jan. 17-21, 1994. |
| Tomas Lang and Miquel Huguet, “Reduced Register Saving/Restoring in Single-Window Register Files,” Computer Architecture News, vol. 14, No. 3, Jun. 1986. |
| Lal George and Andrew W. Appel, “Iterated Register Coalescing,” ACM Transactions on Programming Languages and Systems, vol. 18, No. 3, May 1996, pp. 300-324. |
| Fred C. Chow and John L. Hennessy, “The Priority-Based Coloring Approach to Register Allocation,” ACM Transactions on Programming Languages and Systems, vol. 12, No. 4, Oct. 1990, pp. 501-536. |
| Preston Briggs et al., “Coloring Heuristics for Register Allocation,” Department of Computer Science, Rice University, Houston, Texas, Jun. 1989. |
| Preston Briggs et al., “Coloring Register Pairs,” ACM Letters on Programming Languages and Systems, vol. 1, No. 1, Mar. 1992, pp. 3-13. |
| Ji Minwen et al., “Performance Measurements for Multithreaded Programs,” SIGMETRICS '98, ACM, 1998, pp. 168-170. |
| Jonathan E. Cook and Alexander L. Wolf, “Event Based Detection of Concurrency,” SIGSOFT '98, ACM, 1998, pp. 35-45. |
| Jenn-Yuan Tsai et al., “Performance Study of a Concurrent Multithreaded Processor,” IEEE, 1998, pp. 24-35. |
| “Method of Tracing Events in Multi-Threaded OS/2 Applications,” IBM Tech. Disclosure Bulletin, Sep. 1993, pp. 19-22. |
| Priyadarshan Kolte and Mary Jean Harrold, “Load/Store Range Analysis for Global Register Allocation,” ACM, Jun. 1993. |
| SangMin Shim and Soo-Mook Moon, “Split-Path Enhanced Pipeline Scheduling for Loops with Control Flows,” IEEE, Dec. 2, 1998. |
| David Callahan and Brian Koblenz, “Register Allocation via Hierarchical Graph Coloring,” Proceedings of the ACM SIGPLAN '91 Conference on Programming Language Design and implementation, Toronto, Canada, Jun. 26-28, 1991. |
| Tera MTA, Principles of Operation, Nov. 18, 1997. |
| Kenneth J. Goldman, “Introduction to Data Structures,” 1996 (retrieved from the Internet, http://www.cs.wustl.edu{kjg/CS101_SP97/Notes?DataStructures/structures.html. |
| Ashwin Ram and Janak H. Patel, “Parallel Garbage Collection Without Synchronization Overhead,” 12th Annual Symposium on Computer Architecture, Jun. 17, 1985. |
| H. Hayashi et al., “ALPHA: A High Performance Lisp Machine Equipped with a New Stack Structure and Garbage Collection System,” 10th Annual International Symposium on Computer Architecture, 1983. |