1. Field of the Invention
The present invention is generally in the field of electrical circuits. More specifically, the present invention is in the field of cable detection circuits.
2. Background Art
Optimizing the power efficiency of electrical devices provides several advantages such as reduced operational costs and reduced thermal dissipation requirements. In particular, it is desirable to optimize power consumption when portions of the electrical device are idle or not in use. One such situation is where a cable driver output is connected to a port that has no cable connection to another device. For example, audio/visual equipment may include several output ports for the transmission of data, such as audio or video to other devices, but some of these output ports may not be connected. It is inefficient to power the cable driver output for these unused and disconnected ports. Thus, it is desirable to provide cable detection capabilities for the electrical device so that driver outputs for unused ports can be disabled for energy efficiency.
Conventionally, cable connection status is detected by periodically sending a clock signal to the cable driver output. The cable driver output may be then disabled if the cable connection status is determined as disconnected. However, this approach generally requires an external component for generating the clock signal and a time delay to periodically wake-up the cable driver output. This undesirably increases the cost and complexity of the electrical device.
Accordingly, there is a need in the art for providing cable detection in a simplified and cost efficient manner.
There are provided systems and methods for cable detection, such as a video cable, substantially as shown in and/or described in connection with at least one of the figures, as set forth more completely in the claims.
The features and advantages of the present invention will become more readily apparent to those ordinarily skilled in the art after reviewing the following detailed description and accompanying drawings, wherein:
Although the invention is described with respect to specific embodiments, the principles of the invention can obviously be applied beyond the specifically described embodiments of the invention described herein. Moreover, in the description of the present invention, certain details have been left out to not obscure the inventive aspects of the invention. The details left out are within the knowledge of a person of ordinary skill in the art. The drawings in the present application and their accompanying detailed description are directed to merely example embodiments of the invention. To maintain brevity, other embodiments of the invention which use the principles of the present invention are not specifically described in the present application and are not specifically illustrated by the present drawings.
With reference to
The output of comparator 108 is also coupled to logic gates 110, which has outputs coupled to inputs of output stage 102 for forcing the output of output stage 102 to logic low or logic high, as described in conjunction with
The operation of cable detector 103 and output stage 102 will be discussed in reference to flowchart 200 in
At step 206, after a time period of, for example, approximately 100 nanoseconds (ns), the output of peak detector 104, which is coupled to the positive (non-inverting) input of comparator 108, is greater than a reference voltage (i.e. a threshold voltage), which can be, for example, approximately 1.4 volts, and comparator 108 switches to a logic high (i.e. a “1”) to detect that the cable has been disconnected. The time period of approximately 100 nanoseconds represents the time required for peak detector 104 to increase to a level greater than the reference voltage. In another embodiment, the time required for peak detector 104 to increase to a level greater than the reference voltage can be greater or less than approximately 100 nanoseconds.
The reference voltage can be provided by reference voltage selector 106, which has an input coupled to the output of comparator 108 and an output coupled to the negative (inverting) input of comparator 108. The reference voltage provided by reference voltage selector 106 can be lowered to, for example, approximately 1.3 volts to magnify hysteresis when detection of the disconnected cable has occurred. This increases the time until cable detector 103 checks to see if a cable has been connected to the output of output stage 102 by increasing the decay time of the peak detected voltage store in memory in peak detector 104. A logic low is forced at the output of output stage 102 via logic gates 110, which is coupled between the output of comparator 108 and output stage 102, and output stage 102 is turned off, thereby reducing power consumption.
At step 208, since output stage 102 has been turned off at step 206, the maximum output voltage at output stage 102 can be approximately 0.0 volts. Peak detector 104 senses the approximately 0.0 volt output of output stage 102 and the output of peak detector 104 slowly decays. The slow decay of the output of peak detector 104 occurs because the peak voltage that is stored in memory in peak detector 104 slowly decreases over time.
At step 210, after a predetermined time period has expired, which can be, for example, approximately 2.0 microseconds (μs), the output of peak detector 104 has decayed to a level that is less than the reference voltage of approximately 1.3 volts provided by reference voltage selector 106. In another embodiment, the time period required for the output of peak detector 104 to decay below the reference voltage can be less than or greater than approximately 2.0 microseconds. As a result, the output of comparator 108 switches to a logic low (i.e. “0”) and reference voltage selector 106 provides a higher reference voltage of approximately 1.4 volts to the negative input of comparator 108. At this point, data is not being transmitted by output stage 102, which has been turned off during the predetermined time period of approximately 2.0 microseconds. A logic high is slowly forced at the output of output stage 102 by logic gates 110, which receives the logic low output of comparator 108, and output stage 102 is turned on. If the cable remains unplugged, output stage 102 will output a maximum voltage of, for example, approximately 1.8 volts, since there is no load on output stage 102. If the cable is plugged into output stage 102, output stage 102 will output a maximum voltage of, for example, approximately 1.2 volts. If the cable is not plugged into output stage 102, flowchart 200 proceeds to step 212; and if the cable is plugged into output stage 102, flowchart 200 proceeds to step 214.
At step 212, if the cable is not plugged into output stage 102, peak detector 104 receives a peak voltage of approximately 1.8 volts from output stage 102 and the output of peak detector 104 increases. The approximately 1.8 volts received from output stage 102 is interpreted as a cable off condition. Flowchart 200 proceeds back to step 206.
At step 214, if the cable is plugged into output stage 102, peak detector 104 receives a peak voltage of approximately 1.2 volts from output stage 102. The approximately 1.2 volts received from output stage 102 is interpreted as a cable on condition. As a result of the approximately 1.2 volts received from output stage 102, the output of peak detector 104 remains less than the reference voltage provided by reference voltage selector 106. If the output of peak detector 104 remains less than the reference voltage provided by reference voltage selector 106 for a window time period of approximately 5.0 microseconds, the cable on condition is verified and flowchart 200 proceeds back to step 202. If, during the window time period, the output of peak detector 104 increases above the reference voltage, a cable off condition is indicated and flowchart 200 proceeds to step 206. In another embodiment, the window time period can be less than or greater than approximately 5.0 microseconds.
Thus, in an embodiment of the present invention, when a cable is unplugged from output stage 102, for a time period of approximately 100 nanoseconds, output stage 102 is turned on while cable detector 103 determines if the cable has been plugged in. If the cable has not been plugged in, output stage 102 is turned off for a time period of approximately 2.0 microseconds. After the time period of approximately 2.0 microseconds has expired, output stage 102 is turned on again for a time period of approximately 100 nanoseconds while cable detector 103 determines if the cable has been plugged in. The cycle discussed above can be repeated until the cable is plugged into output stage 102. Thus, an embodiment of the present invention's cable detector 103 can substantially reduce the power consumption of output stage 102 by turning output stage 102 off for a substantial portion of the time during which the cable is unplugged from output stage 102. For example, since according to one embodiment of the present invention, output stage 102 is only turned on about five percent of the time while the cable is disconnected, or 100 nanoseconds on for every 2 microseconds (2000 nanoseconds) off, a device integrating the described power stage can reduce power consumption by about 95% compared to a device with an always on power stage. By adjusting these time ratios within the limits imposed by peak detect curve 302 and reference voltage curve 304, even greater savings in power consumption can be achieved.
From the above description of the invention it is manifest that various techniques can be used for implementing the concepts of the present invention without departing from its scope. Moreover, while the invention has been described with specific reference to certain embodiments, a person of ordinary skills in the art would recognize that changes can be made in form and detail without departing from the spirit and the scope of the invention. As such, the described embodiments are to be considered in all respects as illustrative and not restrictive. It should also be understood that the invention is not limited to the particular embodiments described herein, but is capable of many rearrangements, modifications, and substitutions without departing from the scope of the invention.
This application claims priority to U.S. Provisional Application No. 61/211,882, filed Apr. 3, 2009, which is hereby incorporated by reference in its entirety.
Number | Date | Country | |
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61211882 | Apr 2009 | US |