Claims
- 1. A method of compressing data which is to produce an area feature in a display which is to be scanned in a predetermined direction, comprising the steps of:
- eliminating all points of the area feature except for those points which form the boundary thereof;
- eliminating the points which form that part of the boundary of the area feature which faces opposite said predetermined scanning direction; and
- storing an address of an initial point at one end of the remaining part of the boundary of the area feature along with at least one delta code value which identifies a further point on the remaining part of the boundary with respect to the direction of the boundary at said initial point.
- 2. A method according to claim 1, which further includes storing an initial direction code identifying an initial direction of said remaining part of the boundary at the initial point at said one end thereof.
- 3. A method according to claims 1 or 2, further including storing a feature identification code which identifies a characteristic said area feature is meant to depict.
- 4. A method according to claim 2, wherein a plurality of delta code values are stored which identify successive points on the boundary in relation to the direction of the boundary at each individual point.
- 5. A method according to claim 4, wherein said delta code values are selected from an elongated footprint pattern of points which is oriented so as to extend at each point on the boundary part being compressed away from that point in the direction of the boundary up to that point.
- 6. A method according to claim 5, wherein said elongated fqotprint pattern includes a major lobe and a contiguous minor lobe, the orienting of said footprint pattern so as to select said delta code values at each point including positioning said pattern so that the point on the boundary falls within said minor lobe and said major lobe extends away from said point in the direction of the boundary to that point.
- 7. A method of compressing cultural data which is to produce linear and area features in a moving map display of terrain which is generated through scanning of data in a predetermined direction, comprising the steps of:
- eliminating all points of each area feature except for those points which form a linear boundary thereof;
- eliminating the points of that part of the linear boundary of said area features which face opposite said predetermined scanning direction so that only linear boundary parts remain;
- storing an address of an initial point at one end of each of said linear features and said linear boundary parts; and
- storing a plurality of delta code values which identify respective points on said linear features and said linear boundary parts with respect to the direction of the corresponding linear feature or linear boundary part at the initial point thereof.
- 8. A method according to claim 7, wherein the addresses of the initial points and the delta code values of said linear boundary parts are stored prior to the storing of the addresses of the initial points and delta code values of said linear features.
- 9. A method according to claim 8, further including the step of storing a special code indicating the start of linear feature data between the stored linear boundary part data and the stored linear feature data.
- 10. A method according to claim 7 or 8, further including the step of storing with the addresses and delta code values of said linear boundary parts and linear features respective feature identification codes which identify a characteristic thereof which is to be depicted in said display.
- 11. A method according to claim 7, further including the step of storing initial direction codes identifying initial directions of said linear boundary parts and said linear features at the initial points thereof.
- 12. A method according to claim 11, in which a plurality of delta code values are stored for each linear boundary part and each linear feature, which delta code values identify successive points in relation to the direction of the linear boundary part or linear feature at the previous point thereof.
- 13. A method according to claim 12, wherein said delta code values are selected from an elongated footprint pattern of points which is oriented so as to extend at each of said successive points on said linear boundary part or said linear feature away from that point in the direction of the linear boundary part or linear feature at that point.
- 14. A method according to claim 13, wherein said elongated footprint pattern includes a major lobe and a contiguous minor lobe, the orienting of said footprint pattern so as to select said delta code values at each of said successive points including positioning said pattern so that the point on the linear boundary part or the linear feature falls within said minor lobe and said major lobe extends away from said point in the direction of the linear boundary part or the linear feature to that point.
- 15. A reconstruction processor for reconstructing compressed digital data which is derived from a linear feature in an image pattern to be displayed, said compressed digital data including an address for the initial point at one end of said linear feature, an initial direction code indicating an initial direction for the linear feature at the initial point and at least one delta code value identifying a further point on said linear feature on the basis of said initial direction comprising
- sequencer control means for producing a plurality of timing and control signals in response to stored instructions and applied status and direction signals to control reconsturction of said compressed digital data;
- address counter means for effecting selective incrementing and decrementing of a preset address in response to said sequencer control means so as to step through successive states corresponding to a plurality of memory addresses;
- means for presetting said address counter means to a preset state in accordance with the initial point address in said compressed digital data;
- footprint memory means responsive to said applied delta code value for producing direction signals indicating whether said address counter means is to increment or decrement said preset address as well as signals indicating the number of steps of incrementing or decrementing to be performed and the amount of the incrementing or decrementing to be performed at each step thereof;
- means for applying the output signals of said footprint memory means to said address counter means and said sequencer control means;
- data memory means for storing reconstructed digital data which is to be used to produce said linear feature in said display; and
- storing means for causing data to be stored in said data memory means at each memory location corresponding to the successive states of said address counter means including said preset state, said data stored in said data memory means corresponding to said reconstructed linear feature.
- 16. A reconstruction processor according to claim 15, wherein said sequencer control means includes a microsequencer providing control signals to said address counter means to effect successive incrementing or decrementing of the contents thereof by a specified amount for each of a designated number of steps according to the direction signals received from said footprint memory means.
- 17. A reconstruction processor according to claim 16, wherein said sequencer control means further includes a step counter which is preset under control of said microsequencer to a value equal to the number of steps indicated by the output signal from said footprint memory means and is decremented by said microsequencer in synchronism with each step of incrementing or decrementing by said address counter means, and zero detector means responsive to a zero state of said step counter for signaling said microsequencer to stop the incrementing or decrementing by said address counter means.
- 18. A reconstruction processor according to claim 17, further including multiplier means connected between said footprint memory means and said step counter for selectively multiplying the value to which said step counter is preset by a predetermined factor related to a selected scale factor of the resulting display.
- 19. A reconstruction processor according to claims 15 or 18, wherein said footprint memory means includes a memory having a plurality of storage locations which are unequally addressed by respective delta code values and which store data corresponding to points which form an elongated footprint pattern, the data stored in each storage location comprising a fractional value, a value equal to the number of steps of incrementing or decrementing to be performed and a change in direction value, the data stored in each storage location relating to the position of a respective point in said footprint pattern and the initial direction indicated by said initial direction code.
- 20. A reconstruction processor according to claim 19, wherein said footprint memory means further includes register means for storing said initial direction code, logic circuit means responsive to the content of said register means and the change in direction value produced by said memory in response to an applied delta code value for generating a new direction code value, and means for inserting said new direction code value into said register means in place of the previous contents thereof.
- 21. A reconstruction processor according to claim 15, wherein said compressed digital data further includes a feature identification code which identifies a characteristic which said linear feature is meant to depict in said display, and wherein said storing means includes means responsive to said feature identification code and the successive states of said address counter means for storing in said data memory means a data value related to said feature identification code at memory locations identified by the successive addresses generated by said address counter means.
- 22. A reconstruction processor according to claims 15 or 21, further including address modification means for modifying the addresses generated by said address counter means in accordance with a selected scale factor and means for applying said modified addresses to said storing means to control the storing of data in said data memory means in response thereto.
- 23. A reconstruction processor according to claim 22, wherein said address modification means includes a digital shifting circuit for selectively shifting the digital contents of said address counter means and means for adding or subtracting selected numerical values to the output of said digital shifting circuit.
- 24. A reconstruction processor for reconstructing compressed digital data which is derived from an area feature in an image pattern to be displayed, said compressed digital data representing a partial boundary of the area feature in the form of a line and including an address for the initial point at one end of said line, an initial direction code indicating an initial direction for the line at said initial point and at least one delta code value identifying a further point on said line on the basis of said initial direction, comprising
- sequencer control means for producing a plurality of timing and control signals in response to stored instructions and applied status and direction signals to control reconsturction of said compressed digital data;
- address counter means for effecting selective incrementing and decrementing of a preset address in response to said sequencer control means so as to step through successive states corresponding to a plurality of memory addresses;
- means for presetting said address counter means to a preset state in accordance with the initial point address in said compressed digital data;
- footprint memory means responsive to said applied delta code value for producing direction signals indicating whether said address counter means is to increment or decrement said preset address as well as signals indicating the number of steps of incrementing or decrementing to be performed and the amount of the incrementing or decrementing to be performed at each step thereof;
- means for applying the output signals of said footprint memory means to said address counter means and said sequencer control means;
- data memory means for storing reconstructed digital data which is to be used to produce said area feature in said display including a scratchpad memory having storage locations for the points in an area of said image pattern including said area feature;
- storing means for causing data having a preselected value to be stored in said data memory means at each memory location corresponding to the memory addresses generated by said address counter means; and
- means for filling in the remaining storage locations in said scratchpad memory subsequent to the storing operation of said storing means including means for scanning the storage locations of said scratchpad memory in successive lines and means for inserting into each storage location along a given scanning line which has zero value data therein a data value corresponding to that of the last storage location encountered on that line which had a non-zero data value.
- 25. A reconstruction processor according to claim 24, wherein said footprint memory means includes a memory having a plurality of storage locations which are unequally addressed by respective delta code values and which store data corresponding to points which form an elongated footprint pattern, the data stored in each storage location comprising a fractional value, a value equal to the number of steps of incrementing or decrementing to be performed and a change in direction value, the data stored in each storage location relating to the position of a respective point in said footprint pattern and the initial direction indicated by said initial direction code.
- 26. A reconstruction processor according to claim 25, wherein said footprint memory means further includes register means for storing said initial direction code, logic circuit means responsive to the content of said register means and the change in direction value produced by said memory in response to an applied delta code value for generating a new direction code value, and means for inserting said new direction code value into said register means in place of the previous contents thereof.
- 27. A reconstruction processor according to claims 24 or 26, wherein said compressed digital data further includes a feature identification code which identifies a characteristic which said linear feature is meant to depict in said display, and wherein said storing means includes means responsive to said feature identification code and the successive states of said address counter means for storing in said data memory means a data value related to said feature identification code at memory locations identified by the successive addresses generated by said address counter means.
- 28. A reconstruction processor according to claim 24, further including address modification means for modifying the addresses generated by said address counter means in accordance with a selected scale factor and means for applying said modified addresses to said storing means to control the storing of data in said data memory means in response thereto.
- 29. A reconstruction processor according to claim 28, further including step counter means which is operated under control of said sequencer control means to count the number of steps of incrementing or decrementing performed by said address counter means and for producing an output when said count reaches the value equal to the number of steps designated by said footprint memory means.
- 30. A reconstruction processor according to claim 29, further including multiplexer means for increasing the number of steps designated by said footprint memory means by an integral factor related to the selected scale factor.
- 31. A reconstruction processor for reconstructing compresssed digital data which is derived from linear and area features in an image pattern to be displayed, wherein said compressed digital data represents a line forming a linear feature or a partial boundary of an area feature and includes an X-Y address for the initial point at one end of said line, an initial direction code indicating an initial direction for the line at said initial point on the basis of coordinate X and Y directions in said image pattern and a plurality of delta code values identifying further points on said line on the basis of said initial direction, said reconstruction processor comprising:
- address counter means for effecting selective incrementing and decrementing of the X and Y components of said initial point address in unit and designated fractional amounts and for outputting X and Y memory address signals identifying generated points on said line in accordance with the successive states thereof;
- footprint memory means responsive to each successively-applied delta code value for producing a first output signal indicating the number of steps of incrementing or decrementing to be performed by said address counter means, a second output signal indicating a designated fractional amount of incrementing or decrementing to be performed by said address counter means, and a directional signal representing the extent of the change in direction to be attributed to the particular delta code value;
- logic means for logically combining said direction signal from said footprint memory means attributed to a first delta code value with said initial direction code to produce a new direction code and for logically combining successive directional signals with successively-produced new direction codes, said logic means including means for producing an output for each new direction code including a bit indicating whether unit incrementing is to be for the X or Y address component, another bit indicating whether the X address component is to be incremented or decremented and a bit indicating whether the Y address component is to be incremented or decremented;
- control means responsive to said first and second outputs of said footprint memory means and the output of said logic means for controlling operation of said address counter means to generate a plurality of X and Y memory address signals for each delta code value in said compressed digital data; and
- storage means for storing a data identification at coordinate locations identified by the X and Y memory address signals generated by said address counter means.
- 32. A reconstruction processor according to claim 31, further including address modification means for modifying the X and Y memory address signals generated by said address counter means in accordance with a selected scale factor and means for applying said modified X and Y memory addresses to said storage means to control the storing of data identifications at said coordinate locations.
- 33. A reconstruction processor according to claim 31, wherein said control means includes multiplier means for selectively multiplying the value of said first output signal of said footprint memory means by an integral value in accordance with a predetermined selected scale factor.
- 34. A reconstruction processor according to claim 31, wherein said storage means includes a data memory having coordinate storage locations for the points in an area of said image pattern including said area features represented by said compressed digital data and fill-in means operating subsequent to the storing of said data identifications at the coordinate locations identified by the X and Y addresses generated by said address counter means to reconstruct the partial boundaries of one or more area features, for filling in the remaining coordinate storage locations in said data memory in accordance with the data identifications already stored so as to reconstruct said area feature or features.
- 35. A reconstruction processor according to claim 34, wherein said fill-in means includes means for scanning said data memory in successive lines to read out the data stored therein, means for detecting whether data read from successive storage locations in each scanning line is zero or non-zero data, means for reinserting in those storage locations in which non-zero data is det ected the same data previously stored therein and for inserting in storage locations in which zero data is detected the data identification corresponding to that stored in the last storage location of the same scanning line which had non-zero data stored therein.
- 36. A reconstruction processor according to claim 31, wherein said footprint memory means includes a memory having a plurality of storage locations which are uniquely addressed by respective delta code values and which store data corresponding to points which form an elongated footprint pattern.
- 37. A reconstruction processor according to claim 31, wherein said logic means includes a register for storing said initial direction code and said new direction codes generated in response to each delta code value, adder means for adding the directional signal received from said footprint memory means to the content of said register to produce said new direction code and means for replacing the previous content of said register with the newly-generated new direction code.
- 38. A reconstruction processor according to claims 31, 36 or 37, wherein said compressed digital data represents a plurality of lines representing at least two different types of linear and/or area features and includes a feature identification code as part of the data representing each feature, further including means responsive to said feature identification code for supplying said data identification to said storage means to store at said coordinate locations a data identification which identifies a characteristic which the respective feature is to depict in a display.
- 39. A reconstruction processor according to claim 38, wherein said means for supplying said data identification to said storage means includes a preselection memory which is responsive to said feature identification codes for generating said data identifications and means responsive to a scale factor signal for inhibiting the generation of selected data identifications for certain predetermined scale factors.
- 40. A reconstruction processor according to claim 39, further including address modification means for modifying the X and Y memory address signals generated by said address counter means in accordance with a selected scale factor and means for applying said modified X and Y memory addresses to said storage means to control the storing of data identifications at said coordinate locations.
- 41. A reconstruction processor according to claim 40, wherein said control means includes multiplier means for selectively multiplying the value of said first output signal of said footprint memory means by an integral value in accordance with a predetermined selected scale factor.
- 42. A reconstruction processor according to claim 40, wherein said address modification means includes a digital shifting circuit for selectively shifting the X and Y addresses from said address counter means and means for adding or subtracting selected numerical values to the output of said digital shifting circuit in accordance with said selected scale factor.
- 43. A reconstruction processor accirding to claim 42, wherein said storage means includes means for comparing fractional bits of successive modified X address signals having the integral address values and for storing the data identification of that modified X address signal having the larger value fractional bits in the coordinate location of the integral address value.
Government Interests
The Government has rights in this invention pursuant to Contract No. DAAK80-80-C-0780 awarded by the Department of the Army.
US Referenced Citations (6)