1. Field of the Invention
The field of the invention relates to microelectromechanical systems (MEMS).
2. Description of the Related Technology
Microelectromechanical systems (MEMS) include micro mechanical elements, actuators, and electronics. Micromechanical elements may be created using deposition, etching, and or other micromachining processes that etch away parts of substrates and/or deposited material layers or that add layers to form electrical and electromechanical devices. One type of MEMS device is called an interferometric modulator. An interferometric modulator may comprise a pair of conductive plates, one or both of which may be transparent and/or reflective in whole or part and capable of relative motion upon application of an appropriate electrical signal. One plate may comprise a stationary layer deposited on a substrate, the other plate may comprise a metallic membrane separated from the stationary layer by an air gap. Such devices have a wide range of applications, and it would be beneficial in the art to utilize and/or modify the characteristics of these types of devices so that their features can be exploited in improving existing products and creating new products that have not yet been developed.
The system, method, and devices of the invention each have several aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope of this invention, its more prominent features will now be discussed briefly. After considering this discussion, and particularly after reading the section entitled “Detailed Description of Certain Embodiments” one will understand how the features of this invention provide advantages over other display devices.
A first embodiment includes a system that is configured to display video data on an array of bi-stable display elements, the system including a processor configured to receive video data, a display comprising an array of bi-stable display elements, a driver controller in data communication with the processor and configured to receive video data from the processor, and an array driver configured to receive video data from the driver controller and receive display signals from the processor, and further configured to display the video data on the array of bi-stable display elements using the display signals. In one aspect of the first embodiment, the array of bi-stable display elements comprises interferometric modulators. In a second aspect of the first embodiment, the display signals control a rate of displaying the video data on the array of bi-stable display elements. In a third aspect of the first embodiment, the display signals comprise instructions that are used by the array driver to control a drive scheme for the array of bi-stable display elements. In a fourth aspect of the first embodiment, the array driver receives region information from the processor that identifies a group of bi-stable display elements of the array of bi-stable display elements, and wherein the display signals are used to control a refresh rate for the identified group of bi-stable display elements. In a fifth aspect of the first embodiment, the driver controller is a non-bi-stable display driver controller. In a sixth aspect, the array driver is configured to partition the array into one or more regions based on the display signals. In a seventh aspect, the array driver is configured to display the video data in an interlaced format.
A second embodiment includes a system for displaying video data on an array of bi-stable display elements, the system including a processor, a display comprising an array of bi-stable display elements, a driver controller connected to the processor, the driver controller configured to receive video data from the processor and provide the video data and display signals for displaying the video data on the array of bi-stable display elements, and an array driver connected to the driver controller and the display, the array driver configured to receive the video data and display signals from the driver controller, and to display the video data on the array of bi-stable display elements using the display signals. In a first aspect of the second embodiment, the array of bi-stable display elements comprises interferometric display elements. In a second aspect of the second embodiment, the display signals control a rate of displaying the video data on the array of bi-stable display elements. In a third aspect of the second embodiment, the array driver receives region information from the processor that identifies a group of bi-stable display elements of the array of bi-stable display elements, and wherein the display signals are used to control a refresh rate for the identified group of bi-stable display elements. In a fourth aspect of the second embodiment, the display signals comprise instructions that are used by the array driver to control a drive scheme for the array of bi-stable display elements. In a fifth aspect, the array driver is configured to partition the array into one or more regions based on the display signals. In a sixth aspect, the array driver is configured to display the video data in an interlaced format.
A third embodiment includes a method of displaying data including transmitting display signals from a processor to a driver of an array of bi-stable display elements, and updating an image displayed on the array of bi-stable display elements, wherein the updating is based on signals from the driver and performed on a periodic basis that is based at least in part upon the transmitted display signals. In a first aspect of the third embodiment, the method also includes determining a display rate of video data, and generating display signals based at least in part upon the determined display rate. In a second aspect of the third embodiment, the method also includes executing at least part of the transmitted display signals, wherein the executed display signals operate to control the frequency at which the image displayed by the array of bi-stable display elements is updated. In a third aspect of the third embodiment, the method also includes partitioning the array into one or more groups of bi-stable display elements using information contained in the display signals, where updating an image displayed comprises updating the images displayed on the one or more groups of bi-stable display elements of the array, wherein each of the one or more groups is updated at a refresh rate using information contained in the display signals. In a fourth aspect of the third embodiment, the display signals are transmitted from a driver controller to an array driver. In a fifth aspect of the third embodiment, the display signals are transmitted from a processor to an array driver. In a sixth aspect of the third embodiment, the array of bi-stable display elements comprises interferometric modulators. In a seventh aspect of the third embodiment, updating an image displayed on the array comprises displaying the image in an interlaced format.
A fourth embodiment includes a system for displaying video data on a bi-stable display, including means for transmitting display signals from a processor to a driver of an array of bi-stable display elements, and means for updating an image displayed by the array of bi-stable display elements, wherein the updating is based on the transmitted display signals. In a first aspect of the fourth embodiment, the array of bi-stable display elements comprise interferometric modulators. In a second aspect of the fourth embodiment, the system additionally includes means for determining a display rate of video data, and means for generating display signals based at least in part upon the determined display rate. In a third aspect of the fourth embodiment, the system also includes means for transmitting region information identifying a group of the interferometric modulators, where updating the image that is displayed is performed for the group of bi-stable display elements. In a fourth aspect of the fourth embodiment, the display signals are transmitted from a driver controller to an array driver. A fifth aspect of the fourth embodiment additionally includes means for executing at least part of the transmitted refresh instructions, wherein the executed instructions operate to control the frequency at which the image that is displayed by the array of bi-stable display elements is updated. And in a sixth aspect of the fourth embodiment, the display signals are transmitted from a processor to an array driver.
The following detailed description is directed to certain specific embodiments. However, the invention can be embodied in a multitude of different ways. Reference in this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase “in one embodiment,” “according to one embodiment,” or “in some embodiments” in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Moreover, various features are described which may be exhibited by some embodiments and not by others. Similarly, various requirements are described which may be requirements for some embodiments but not other embodiments.
In one embodiment, a display array on a device includes at least one driving circuit and an array of means, e.g., interferometric modulators, on which video data is displayed. Video data, as used herein, refers to any kind of displayable data, including pictures, graphics, and words, displayable in either static or dynamic images (for example, a series of video frames that when viewed give the appearance of movement, e.g., a continuous ever-changing display of stock quotes, a “video clip”, or data indicating the occurrence of an event of action). Video data, as used herein, also refers to any kind of control data, including instructions on how the video data is to be processed (display mode), such as frame rate, and data format. The array is driven by the driving circuit to display video data.
The currently available flat panel display controllers and drivers (for example, for LCD's and plasma displays) have been designed to work with displays that need to be constantly refreshed in order to display a viewable image. Another type of display comprises an array of bi-stable display elements. Images rendered on an array of bi-stable elements are viewable for a long period of time without having to constantly refresh the display, and require relatively low power to maintain the displayed image. In such displays, a variety of refresh and update processes can be used that take advantage of the bi-stable display elements characteristics to decrease the power requirements of the display. If an array of bi-stable display elements are operated by the controllers and drivers that are used with current flat panel displays and are not configured to utilize the characteristics of a bi-stable display element, the advantageous refresh and update processes cannot be used and power requirements for driving the display may not be optimally reduced. Thus, improved controller and driver systems and methods for use with bi-stable displays are desired. For bi-stable display elements, including the interferometric modulators described herein, these improved controllers and drivers can implement refresh and update processes that take advantage of the unique capabilities of bi-stable display elements.
In one embodiment, a system is disclosed for displaying video data on a client device (for example, a mobile phone) that includes a display array of interferometric modulators. The system uses a typical driver controller to provide video data to an array driver. The array driver is also connected to a processor, which is configured to implement one or more specialized display processes for driving the array display, and send corresponding signals to the array driver. The array driver is configured to receive video data from the driver controller and display signals from the processor, and to display the video data on the array of interferometric modulators using the display signals. Display signals, as referred to herein, include instructions, information, data, or signals that are used by the array driver to display the video data. In another embodiment, a system is disclosed for displaying video data on an array of interferometric modulators using a bi-stable driver controller. In this system, the driver controller is configured to receive video data from the processor and provide the video data and display signals to an array driver for displaying the video data on the array of interferometric modulators. In alternative embodiments, the array driver can receive display signals from a server communicating with the client device. In some embodiments, the display signals from the server can be communicated to the array driver through a connection between the array driver and a network interface that communicates with the server. In other embodiments, the server communicates the display signals to the array driver via the processor in the client device.
In this description, reference is made to the drawings wherein like parts are designated with like numerals throughout. The invention may be implemented in any device that is configured to display an image, whether in motion (e.g., video) or stationary (e.g., still image), and whether textual or pictorial. More particularly, it is contemplated that the invention may be implemented in or associated with a variety of electronic devices such as, but not limited to, mobile telephones, wireless devices, personal data assistants (PDAs), hand-held or portable computers, GPS receivers/navigators, cameras, MP3 players, camcorders, game consoles, wrist watches, clocks, calculators, television monitors, flat panel displays, computer monitors, auto displays (e.g., odometer display, etc.), cockpit controls and/or displays, display of camera views (e.g., display of a rear view camera in a vehicle), electronic photographs, electronic billboards or signs, projectors, architectural structures, packaging, and aesthetic structures (e.g., display of images on a piece of jewelry). MEMS devices of similar structure to those described herein can also be used in non-display applications such as in electronic switching devices.
Spatial light modulators used for imaging applications come in many different forms. Transmissive liquid crystal display (LCD) modulators modulate light by controlling the twist and/or alignment of crystalline materials to block or pass light. Reflective spatial light modulators exploit various physical effects to control the amount of light reflected to the imaging surface. Examples of such reflective modulators include reflective LCDs, and digital micromirror devices.
Another example of a spatial light modulator is an interferometric modulator that modulates light by interference. Interferometric modulators are bi-stable display elements which employ a resonant optical cavity having at least one movable or deflectable wall. Constructive interference in the optical cavity determines the color of the viewable light emerging from the cavity. As the movable wall, typically comprised at least partially of metal, moves towards the stationary front surface of the cavity, the interference of light within the cavity is modulated, and that modulation affects the color of light emerging at the front surface of the modulator. The front surface is typically the surface where the image seen by the viewer appears, in the case where the interferometric modulator is a direct-view device.
The network 3 can be operatively coupled to a broad variety of devices. Examples of devices that can be coupled to the network 3 include a computer such as a laptop computer 4, a personal digital assistant (PDA) 5, which can include wireless handheld devices such as the BlackBerry, a Palm Pilot, a Pocket PC, and the like, and a cell phone 6, such as a Web-enabled cell phone, Smartphone, and the like. Many other devices can be used, such as desk-top PCs, set-top boxes, digital media players, handheld PCs, Global Positioning System (GPS) navigation devices, automotive displays, or other stationary and mobile displays. For convenience of discussion all of these devices are collectively referred to herein as the client device 7.
One bi-stable display element embodiment comprising an interferometric MEMS display element is illustrated in
The depicted portion of the pixel array in
The partially reflective layers 16a, 16b are electrically conductive, partially transparent and fixed, and may be fabricated, for example, by depositing one or more layers each of chromium and indium-tin-oxide onto a transparent substrate 20. The layers are patterned into parallel strips, and may form row electrodes in a display device as described further below. The highly reflective layers 14a, 14b may be formed as a series of parallel strips of a deposited metal layer or layers (orthogonal to the row electrodes, partially reflective layers 16a, 16b) deposited on top of supports 18 and an intervening sacrificial material deposited between the supports 18. When the sacrificial material is etched away, the deformable metal layers are separated from the fixed metal layers by a defined air gap 19. A highly conductive and reflective material such as aluminum may be used for the deformable layers, and these strips may form column electrodes in a display device.
With no applied voltage, the air gap 19 remains between the layers 14a, 16a and the deformable layer is in a mechanically relaxed state as illustrated by the interferometric modulator 12a in
Currently, available flat panel display controllers and drivers have been designed to work almost exclusively with displays that need to be constantly refreshed. Thus, the image displayed on plasma, EL, OLED, STN LCD, and TFT LCD panels, for example, will disappear in a fraction of a second if not refreshed many times within a second. However, because interferometric modulators of the type described above have the ability to hold their state for a longer period of time without refresh, wherein the state of the interferometric modulators may be maintained in either of two states without refreshing, a display that uses interferometric modulators may be referred to as a bi-stable display. In one embodiment, the state of the pixel elements is maintained by applying a bias voltage, sometimes referred to as a latch voltage, to the one or more interferometric modulators that comprise the pixel element.
In general, a display device typically requires one or more controllers and driver circuits for proper control of the display device. Driver circuits, such as those used to drive LCD's, for example, may be bonded directly to, and situated along the edge of the display panel itself. Alternatively, driver circuits may be mounted on flexible circuit elements connecting the display panel (at its edge) to the rest of an electronic system. In either case, the drivers are typically located at the interface of the display panel and the remainder of the electronic system.
The array driver 22 receives the formatted information from the driver controller 29 and reformats the video data into a parallel set of waveforms that are applied many times per second to the hundreds and sometimes thousands of leads coming from the display's x-y matrix of pixels. The currently available flat panel display controllers and drivers such as those described immediately above have been designed to work almost exclusively with displays that need to be constantly refreshed. Because bi-stable displays (e.g., an array of interferometric modulators) do not require such constant refreshing, features that decrease power requirements may be realized through the use of bi-stable displays. However, if bi-stable displays are operated by the controllers and drivers that are used with current displays the advantages of a bi-stable display may not be optimized. Thus, improved controller and driver systems and methods for use with bi-stable displays are desired. For high speed bi-stable displays, such as the interferometric modulators described above, these improved controllers and drivers preferably implement low-refresh-rate modes, video rate refresh modes, and unique modes to facilitate the unique capabilities of bi-stable modulators. According to the methods and systems described herein, a bi-stable display may be configured to reduce power requirements in various manners.
In one embodiment illustrated by
Still referring to
In one embodiment, video data provided by data link 33 is not stored in the frame buffer 28, as is usually the case in many embodiments. It will also be understood that in some embodiments, a second driver controller (not shown) can also be used to render video data for the array driver 22. The data link 33 may comprise a SPI, I2C bus, or any other available interface. The array driver 22 can also include address decoding, row and column drivers for the display and the like. The network interface 27 can also provide video data directly to the array driver 22 at least partially in response to instructions embedded within the video data provided to the network interface 27. It will be understood by the skilled practitioner that arbiter logic can be used to control access by the network interface 27 and the processor 21 to prevent data collisions at the array driver 22. In one embodiment, a driver executing on the processor 21 controls the timing of data transfer from the network interface 27 to the array driver 22 by permitting the data transfer during time intervals that are typically unused by the processor 21, such as time intervals traditionally used for vertical blanking delays and/or horizontal blanking delays.
Advantageously, this design permits the server 2 to bypass the processor 21 and the driver controller 29, and to directly address a portion of the display array 30. For example, in the illustrated embodiment, this permits the server 2 to directly address a predefined display array area of the display array 30. In one embodiment, the amount of data communicated between the network interface 27 and the array driver 22 is relatively low and is communicated using a serial bus, such as an Inter-Integrated Circuit (I2C) bus or a Serial Peripheral Interface (SPI) bus. It will also be understood, however, that where other types of displays are utilized, that other circuits will typically also be used. The video data provided via data link 33 can advantageously be displayed without a frame buffer 28 and with little or no intervention from the processor 21.
As shown in
For a display array having the hysteresis characteristics of
In typical applications, a display frame may be created by asserting the set of column electrodes in accordance with the desired set of actuated pixels in the first row. A row pulse is then applied to the row 1 electrode, actuating the pixels corresponding to the asserted column lines. The asserted set of column electrodes is then changed to correspond to the desired set of actuated pixels in the second row. A pulse is then applied to the row 2 electrode, actuating the appropriate pixels in row 2 in accordance with the asserted column electrodes. The row 1 pixels are unaffected by the row 2 pulse, and remain in the state they were set to during the row 1 pulse. This may be repeated for the entire series of rows in a sequential fashion to produce the frame. Generally, the frames are refreshed and/or updated with new video data by continually repeating this process at some desired number of frames per second. A wide variety of protocols for driving row and column electrodes of pixel arrays to produce display array frames are also well known and may be used.
One embodiment of a client device 7 is illustrated in
The display 42 of exemplary client 40 may be any of a variety of displays, including a bi-stable display, as described herein with respect to, for example,
The components of one embodiment of exemplary client 40 are schematically illustrated in
The network interface 27 includes the antenna 43, and the transceiver 47 so that the exemplary client 40 can communicate with another device over a network 3, for example, the server 2 shown in
Processor 21 generally controls the overall operation of the exemplary client 40, although operational control may be shared with or given to the server 2 (not shown), as will be described in greater detail below. In one embodiment, the processor 21 includes a microcontroller, CPU, or logic unit to control operation of the exemplary client 40. Conditioning hardware 52 generally includes amplifiers and filters for transmitting signals to the speaker 44, and for receiving signals from the microphone 46. Conditioning hardware 52 may be discrete components within the exemplary client 40, or may be incorporated within the processor 21 or other components.
The input device 48 allows a user to control the operation of the exemplary client 40. In one embodiment, input device 48 includes a keypad, such as a QWERTY keyboard or a telephone keypad, a button, a switch, a touch-sensitive screen, a pressure- or heat-sensitive membrane. In one embodiment, a microphone is an input device for the exemplary client 40. When a microphone is used to input data to the device, voice commands may be provided by a user for controlling operations of the exemplary client 40.
In one embodiment, the driver controller 29, array driver 22, and display array 30 are appropriate for any of the types of displays described herein. For example, in one embodiment, driver controller 29 is a conventional display controller or a bi-stable display controller (e.g., an interferometric modulator controller). In another embodiment, array driver 22 is a conventional driver or a bi-stable display driver (e.g., a interferometric modulator display). In yet another embodiment, display array 30 is a typical display array or a bi-stable display array (e.g., a display including an array of interferometric modulators).
Power supply 50 is any of a variety of energy storage devices as are well known in the art. For example, in one embodiment, power supply 50 is a rechargeable battery, such as a nickel-cadmium battery or a lithium ion battery. In another embodiment, power supply 50 is a renewable energy source, a capacitor, or a solar cell, including a plastic solar cell, and solar-cell paint. In another embodiment, power supply 50 is configured to receive power from a wall outlet.
In one embodiment, the array driver 22 contains a register that may be set to a predefined value to indicate that the input video stream is in an interlaced format and should be displayed on the bi-stable display in an interlaced format, without converting the video stream to a progressive scanned format. In this way the bi-stable display does not require interlace-to-progressive scan conversion of interlace video data.
In some implementations control programmability resides, as described above, in a display controller which can be located in several places in the electronic display system. In some cases control programmability resides in the array driver 22 located at the interface between the electronic display system and the display component itself. Those of skill in the art will recognize that the above-described optimization may be implemented in any number of hardware and/or software components and in various configurations.
In one embodiment, circuitry is embedded in the array driver 22 to take advantage of the fact that the output signal set of most graphics controllers includes a signal to delineate the horizontal active area of the display array 30 being addressed. This horizontal active area can be changed via register settings in the driver controller 29. These register settings can be changed by the processor 21. This signal is usually designated as display enable (DE). Most all display video interfaces in addition utilize a line pulse (LP) or a horizontal synchronization (HSYNC) signal, which indicates the end of a line of data. A circuit which counts LPs can determine the vertical position of the current row. When refresh signals are conditioned upon the DE from the processor 21 (signaling for a horizontal region), and upon the LP counter circuit (signaling for a vertical region) an area update function can be implemented.
In one embodiment, a driver controller 29 is integrated with the array driver 22. Such an embodiment is common in highly integrated systems such as cellular phones, watches, and other small area displays. Specialized circuitry within such an integrated array driver 22 first determines which pixels and hence rows require refresh, and only selects those rows that have pixels that have changed to update. With such circuitry, particular rows can be addressed in non-sequential order, on a changing basis depending on image content. This embodiment has the advantage that since only the changed video data needs to be sent through the interface, data rates can be reduced between the processor 21 and the display array 30. Lowering the effective data rate required between processor 21 and array driver 22 improves power consumption, noise immunity and electromagnetic interference issues for the system.
In the
The details of the structure of interferometric modulators that operate in accordance with the principles set forth above may vary widely. For example,
An embodiment of process flow is illustrated in
Again referring to
An embodiment of process flow is illustrated in
Starting at decision state 84, the client device 7 makes a determination whether an action at the client device 7 requires an application at the client device 7 to be started, or whether the server 2 has transmitted an application to the client device 7 for execution, or whether the server 2 has transmitted to the client device 7 a request to execute an application resident at the client device 7. If there is no need to launch an application the client device 7 remains at decision state 84. After starting an application, continuing to state 86, the client device 7 launches a process by which the client device 7 receives and displays video data. The video data may stream from the server 2, or may be downloaded to the client device 7 memory for later access. The video data can be video, or a still image, or textual or pictorial information. The video data can also have various compression encodings, and be interlaced or progressively scanned, and have various and varying refresh rates. The display array 30 may be segmented into regions of arbitrary shape and size, each region receiving video data with characteristics, such as refresh rate or compression encoding, specific only to that region. The regions may change video data characteristics and shape and size. The regions may be opened and closed and re-opened. Along with video data, the client device 7 can also receive control data. The control data can comprise commands from the server 2 to the client device 7 regarding, for example, video data characteristics such as compression encoding, refresh rate, and interlaced or progressively scanned video data. The control data may contain control instructions for segmentation of display array 30, as well as differing instructions for different regions of display array 30.
In one exemplary embodiment, the server 2 sends control and video data to a PDA via a wireless network 3 to produce a continuously updating clock in the upper right corner of the display array 30, a picture slideshow in the upper left corner of the display array 30, a periodically updating score of a ball game along a lower region of the display array 30, and a cloud shaped bubble reminder to buy bread continuously scrolling across the entire display array 30. The video data for the photo slideshow are downloaded and reside in the PDA memory, and they are in an interlaced format. The clock and the ball game video data stream text from the server 2. The reminder is text with a graphic and is in a progressively scanned format. It is appreciated that here presented is only an exemplary embodiment. Other embodiments are possible and are encompassed by state 86 and fall within the scope of this discussion.
Continuing to decision state 88, the client device 7 looks for a command from the server 2, such as a command to relocate a region of the display array 30, a command to change the refresh rate for a region of the display array 30, or a command to quit. Upon receiving a command from the server 2, the client device 7 proceeds to decision state 90, and determines whether or not the command received while at decision state 88 is a command to quit. If, while at decision state 90, the command received while at decision state 88 is determined to be a command to quit, the client device 7 continues to state 98, and stops execution of the application and resets. The client device 7 may also communicate status or other information to the server 2, and/or may receive such similar communications from the server 2. If, while at decision state 90, the command received from the server 2 while at decision state 88 is determined to not be a command to quit, the client device 7 proceeds back to state 86. If, while at decision state 88, a command from the server 2 is not received, the client device 7 advances to decision state 92, at which the client device 7 looks for a command from the user, such as a command to stop updating a region of the display array 30, or a command to quit. If, while at decision state 92, the client device 7 receives no command from the user, the client device 7 returns to decision state 88. If, while at decision state 92, a command from the user is received, the client device 7 proceeds to decision state 94, at which the client device 7 determines whether or not the command received in decision state 92 is a command to quit. If, while at decision state 94, the command from the user received while at decision state 92 is not a command to quit, the client device 7 proceeds from decision state 94 to state 96. At state 96 the client device 7 sends to the server 2 the user command received while at state 92, such as a command to stop updating a region of the display array 30, after which it returns to decision state 88. If, while at decision state 94, the command from the user received while at decision state 92 is determined to be a command to quit, the client device 7 continues to state 98, and stops execution of the application. The client device 7 may also communicate status or other information to the server 2, and/or may receive such similar communications from the server 2.
Starting at state 124 the server 2, in embodiment (1), waits for a data request via the network 3 from the client device 7, and alternatively, in embodiment (2) the server 2 sends video data without waiting for a data request from the client device 7. The two embodiments encompass scenarios in which either the server 2 or the client device 7 may initiate requests for video data to be sent from the server 2 to the client device 7.
The server 2 continues to decision state 128, at which a determination is made as to whether or not a response from the client device 7 has been received indicating that the client device 7 is ready (ready indication signal). If, while at state 128, a ready indication signal is not received, the server 2 remains at decision state 128 until a ready indication signal is received.
Once a ready indication signal is received, the server 2 proceeds to state 126, at which the server 2 sends control data to the client device 7. The control data may stream from the server 2, or may be downloaded to the client device 7 memory for later access. The control data may segment the display array 30 into regions of arbitrary shape and size, and may define video data characteristics, such as refresh rate or interlaced format for a particular region or all regions. The control data may cause the regions to be opened or closed or re-opened.
Continuing to state 130, the server 2 sends video data. The video data may stream from the server 2, or may be downloaded to the client device 7 memory for later access. The video data can include motion images, or still images, textual or pictorial images. The video data can also have various compression encodings, and be interlaced or progressively scanned, and have various and varying refresh rates. Each region may receive video data with characteristics, such as refresh rate or compression encoding, specific only to that region.
The server 2 proceeds to decision state 132, at which the server 2 looks for a command from the user, such as a command to stop updating a region of the display array 30, to increase the refresh rate, or a command to quit. If, while at decision state 132, the server 2 receives a command from the user, the server 2 advances to state 134. At state 134 the server 2 executes the command received from the user at state 132, and then proceeds to decision state 138. If, while at decision state 132, the server 2 receives no command from the user, the server 2 advances to decision state 138.
At state 138 the server 2 determines whether or not action by the client device 7 is needed, such as an action to receive and store video data to be displayed later, to increase the data transfer rate, or to expect the next set of video data to be in interlaced format. If, while at decision state 138, the server 2 determines that an action by the client is needed, the server 2 advances to state 140, at which the server 2 sends a command to the client device 7 to take the action, after which the server 2 then proceeds to state 130. If, while at decision state 138, the server 2 determines that an action by the client is not needed, the server 2 advances to decision state 142.
Continuing at decision state 142, the server 2 determines whether or not to end data transfer. If, while at decision state 142, the server 2 determines to not end data transfer, server 2 returns to state 130. If, while at decision state 142, the server 2 determines to end data transfer, server 2 proceeds to state 144, at which the server 2 ends data transfer, and sends a quit message to the client. The server 2 may also communicate status or other information to the client device 7, and/or may receive such similar communications from the client device 7.
As illustrated in
Bi-stable displays, as do most flat panel displays, consume most of their power during frame update. Accordingly, it is desirable to be able to control how often a bi-stable display is updated in order to conserve power. For example, if there is very little change between adjacent frames of a video stream, the display may be refreshed less frequently with little or no loss in image quality. As an example, image quality of typical PC desktop applications, displayed on an interferometric modulator display, would not suffer from a decreased refresh rate, since the interferometric modulator display is not susceptible to the flicker that would result from decreasing the refresh rate of most other displays. Thus, during operation of certain applications, the PC display system may reduce the refresh rate of bi-stable display elements, such as interferometric modulators, with minimal effect on the output of the display.
Similarly, if a display device has a refresh rate that is higher than the frame rate of the display feed, the display device may reduce power requirements by reducing the refresh rate. While reduction of the refresh rate is not possible on a typical display, such as a LCD, a bi-stable display (for example, an interferometric modulator display) can maintain the state of the pixel element for a longer period of time and, thus, may reduce the refresh rate when necessary. As an example, if a video stream being displayed on a PDA has a frame rate of 15 Hz and the bi-stable PDA display is capable of refreshing at a rate of 60 times per second (having a refresh rate of 1/60 sec=16.67 ms), then a typical bi-stable display may update the display with each frame of data up to four times. For example, a 15 Hz frame rate updates every 66.67 ms. For a bi-stable display having a refresh rate of 16.67 ms, each frame may be displayed on the display device up to 66.67 ms/16.67 ms=4 times. However, each refresh of the display device requires some power and, thus, power may be reduced by reducing the number of updates to the display device. With respect to the above example, when a bi-stable display device is used, up to 3 refreshes per video frame may be removed without affecting the output display. More particularly, because both the on and off states of pixels in a bi-stable display may be maintained without refreshing the pixels, a frame of data from the video stream need only be updated on the display device once, and then maintained until a new video frame is ready for display. Accordingly, a bi-stable display may reduce power requirements by displaying, without refresh until a new video frame is available.
In one embodiment, frames of a video stream are skipped, based on a programmable “frame skip count.” Referring to
In one embodiment, a user of the display array 30 determines the frame skip count that is to be stored in the array driver 22. The user may then periodically update the frame skip count, based upon the particular use of the bi-stable display, for example. In another embodiment, the processor 21 or the driver controller 29 is configured to monitor the use of the display array 30 and automatically modify the frame skip count. For example, the driver controller 29 may determine that sequential frames in a video feed have little variance and, thus, set the frame skip count at a value higher than 0. In the embodiment of
One of the controller's central functions it to format and send to the driver data representing the image to be shown on the display. This image data typically resides in a particular portion of the memory of the system in which the controller resides. Since the display array 30 does not require constant updates to maintain an image, in one embodiment the driver controller 29 or the processor 21 monitors changes in the relevant image-data portion of memory and sends to the bi-stable display only that portion of the image data associated with portions of the image that have changed. In this way, changes to the display array 30 may be reduced by only updating those portions of the display that have changed. Depending on the capabilities of the particular bi-stable display, these changes may be sent on a pixel-by-pixel basis, a rectangular area basis where both vertical and horizontal limits can be defined, or a rectangular area basis where only a vertical dimension is defined.
Similar to implementation of the frame-skip optimization discussed above, the area update optimization may be implemented via one or more registers in the array driver 22, where the registers are programmable either automatically by the driver controller 29 or the processor 21. In one embodiment, the array driver 22 includes registers that define a portion of the total display area. In operation, the array driver 22 can pass the display data for the portion defined by the registers to the display array 30. Thus, in addition to reducing the number of pixel changes required, thereby reducing the power requirements of the display array 30, further power reduction is achieved because only a reduced portion of the data bandwidth between the driver controller 29 and the display array 30 will be used. In one embodiment, for example, a bi-stable display on a cell phone may display a current time in a HH:MM:SS format in a corner of the display. The driver controller 29, or the processor 21, may automatically, and/or based upon input from the user, determine that only a small portion of the bi-stable display is being updated and adjust the values in the registers to define this area. Accordingly, only the portion of the display that is changing is refreshed. In this example, a frame skip register may also be set to work in conjunction with the area update. More particularly, the skip-rate register may be set so that the area defined in the area update registers is only updated once every second, for example. In this way, power savings may be reduced even further through a combination of optimizations.
Most images displayed as computer graphics are scanned from top to bottom in each frame time in a completely “progressive” manner, where progressive means that each row is scanned in turn from the top of the display to the bottom of the display. However, most entertainment content, such as the content displayed on TV receivers, VCRs, and other consumer electronic equipment, is received and displayed in an “interlaced” fashion. The term “interlaced,” as used herein, means that the 1st, 3rd, 5th, and all remaining odd numbered rows in the image are scanned in one video frame time, and the 2nd, 4th, 6th, and all remaining even numbered rows are scanned in the next video frame time. This alternation of what are commonly referred to as “fields” reduces by 50% the rate at which image data must move through the video system.
Because most modem computer graphic systems as well as essentially all flat panel consumer electronic display systems use only progressive scan, interlaced material is typically converted to a progressive scan format in order to be displayed on progressive scan displays. This is typically done in real-time by a powerful computing IC (or set of ICs) that interpolate odd-line data in each of the even-line frames and even-line data in each of the odd-line frames. However, because the rows of a bi-stable display can be scanned in any order, the display array 30 may directly receive and write to the appropriate lines in the bi-stable display device. Thus, interlaced video content may be displayed on the bi-stable display by selecting every other even row during the even-line frames and every other odd row during the odd-line frame. Accordingly, interlaced video may be displayed on the bi-stable display without requiring interpolation of the interlaced video and without the loss of image quality that would be incurred in other display types.
In one embodiment, the array driver 22 contains a register that may be set to a predefined value to indicate that the input video stream is in an interlaced format and should be displayed on the bi-stable display in an interlaced format, without converting the video stream to a progressive scanned format. In this way the display array 30 does not require interlaced-to-progressive scan conversion of interlaced data. In one embodiment, a bi-stable controller, for example the driver controller 29, working with bi-stable drivers, such as array driver 22, that do not have this feature built in would recognize this capability of the display array 30 and generate the proper row address pulses and sequence the image data properly to achieve the same result.
The three optimizations described above can be advantageously operated in parallel with one another, such that interlaced video data may be displayed on a portion of the display at reduced frame rates.
In some implementations control programmability resides, as described above in, a display controller which can be located in several places in the electronic display system. In some cases control programmability resides in an array driver located at the interface between the electronic display system and the display component itself. Those of skill in the art will recognize that the above-described optimization may be implemented in any number of hardware and/or software components and in various configurations.
While the above detailed description has shown, described, and pointed out novel features of the invention as applied to various embodiments, it will be understood that various omissions, substitutions, and changes in the form and details of the device or process illustrated may be made by those skilled in the art without departing from the spirit of the invention. As will be recognized, the present invention may be embodied within a form that does not provide all of the features and benefits set forth herein, as some features may be used or practiced separately from others.
This application claims priority to U.S. Provisional Application No. 60/613,407 titled “Method And System For Server Controlled Display Partitioning And Refresh Rate,” filed Sep. 27, 2004, which is incorporated by reference, in its entirety. This application is related to U.S. application Ser. No. 11/097,819, titled “Controller And Driver Features For Bi-Stable Display,” filed on even date herewith, U.S. application Ser. No. 11/096,546, titled “System Having Different Update Rates For Different Portions Of A Partitioned Display,” filed on even date herewith, and U.S. application Ser. No. 11/097,509, titled “System With Server Based Control Of Client Display Features,” filed on even date herewith, U.S. application Ser. No. 11/097,820, titled “System and Method of Transmitting Video Data,” filed on even data herewith, and U.S. application Ser. No. 11/097,818, titled “System and Method of Transmitting Video Data,” filed on even date herewith, all of which are incorporated herein by reference, in their entirety, and assigned to the assignee of the present invention.
Number | Name | Date | Kind |
---|---|---|---|
2534846 | Ambrose et al. | Dec 1950 | A |
3184600 | Potter | May 1965 | A |
3371345 | Lewis | Feb 1968 | A |
3410363 | Schwartz | Nov 1968 | A |
3439973 | Paul et al. | Apr 1969 | A |
3443854 | Weiss | May 1969 | A |
3653741 | Marks | Apr 1972 | A |
3656836 | de Cremoux et al. | Apr 1972 | A |
3746785 | Te Velde | Jul 1973 | A |
3813265 | Marks | May 1974 | A |
3955880 | Lierke | May 1976 | A |
3972040 | Hilsum et al. | Jul 1976 | A |
4099854 | Decker et al. | Jul 1978 | A |
4228437 | Shelton | Oct 1980 | A |
4347983 | Bodai | Sep 1982 | A |
4377324 | Durand et al. | Mar 1983 | A |
4389096 | Hori et al. | Jun 1983 | A |
4392711 | Moraw et al. | Jul 1983 | A |
4403248 | te Velde | Sep 1983 | A |
4441791 | Hornbeck | Apr 1984 | A |
4445050 | Marks | Apr 1984 | A |
4459182 | Te Velde | Jul 1984 | A |
4482213 | Piliavin et al. | Nov 1984 | A |
4500171 | Penz et al. | Feb 1985 | A |
4519676 | te Velde | May 1985 | A |
4531126 | Sadones | Jul 1985 | A |
4566935 | Hornbeck | Jan 1986 | A |
4571603 | Hornbeck et al. | Feb 1986 | A |
4596992 | Hornbeck | Jun 1986 | A |
4615595 | Hornbeck | Oct 1986 | A |
4662746 | Hornbeck | May 1987 | A |
4663083 | Marks | May 1987 | A |
4681403 | te Velde et al. | Jul 1987 | A |
4710732 | Hornbeck | Dec 1987 | A |
4748366 | Taylor | May 1988 | A |
4786128 | Birnbach | Nov 1988 | A |
4790635 | Apsley | Dec 1988 | A |
4798437 | Rediker et al. | Jan 1989 | A |
4856863 | Sampsell et al. | Aug 1989 | A |
4857978 | Goldburt et al. | Aug 1989 | A |
4859060 | Katagiri et al. | Aug 1989 | A |
4900136 | Goldburt et al. | Feb 1990 | A |
4900395 | Syverson et al. | Feb 1990 | A |
4922241 | Inoue et al. | May 1990 | A |
4954789 | Sampsell | Sep 1990 | A |
4956619 | Hornbeck | Sep 1990 | A |
4965562 | Verhulst | Oct 1990 | A |
4977009 | Anderson et al. | Dec 1990 | A |
4982184 | Kirkwood | Jan 1991 | A |
5018256 | Hornbeck | May 1991 | A |
5022745 | Zayhowski et al. | Jun 1991 | A |
5028939 | Hornbeck et al. | Jul 1991 | A |
5037173 | Sampsell et al. | Aug 1991 | A |
5044736 | Jaskie et al. | Sep 1991 | A |
5061049 | Hornbeck | Oct 1991 | A |
5075796 | Schildkraut et al. | Dec 1991 | A |
5078479 | Vuilleumier | Jan 1992 | A |
5079544 | DeMond et al. | Jan 1992 | A |
5083857 | Hornbeck | Jan 1992 | A |
5096279 | Hornbeck et al. | Mar 1992 | A |
5099353 | Hornbeck | Mar 1992 | A |
5124834 | Cusano et al. | Jun 1992 | A |
5126836 | Um | Jun 1992 | A |
5142405 | Hornbeck | Aug 1992 | A |
5142414 | Koehler | Aug 1992 | A |
5148157 | Florence | Sep 1992 | A |
5153771 | Link et al. | Oct 1992 | A |
5162787 | Thompson et al. | Nov 1992 | A |
5168406 | Nelson | Dec 1992 | A |
5170156 | DeMond et al. | Dec 1992 | A |
5172262 | Hornbeck | Dec 1992 | A |
5179274 | Sampsell | Jan 1993 | A |
5185660 | Um | Feb 1993 | A |
5192395 | Boysel et al. | Mar 1993 | A |
5192946 | Thompson et al. | Mar 1993 | A |
5206629 | DeMond et al. | Apr 1993 | A |
5214419 | DeMond et al. | May 1993 | A |
5214420 | Thompson et al. | May 1993 | A |
5216537 | Hornbeck | Jun 1993 | A |
5226099 | Mignardi et al. | Jul 1993 | A |
5228013 | Bik | Jul 1993 | A |
5231532 | Magel et al. | Jul 1993 | A |
5233385 | Sampsell | Aug 1993 | A |
5233456 | Nelson | Aug 1993 | A |
5233459 | Bozler et al. | Aug 1993 | A |
5244707 | Shores | Sep 1993 | A |
5254980 | Hendrix et al. | Oct 1993 | A |
5272473 | Thompson et al. | Dec 1993 | A |
5278652 | Urbanus et al. | Jan 1994 | A |
5280277 | Hornbeck | Jan 1994 | A |
5287096 | Thompson et al. | Feb 1994 | A |
5293272 | Jannson et al. | Mar 1994 | A |
5296950 | Lin et al. | Mar 1994 | A |
5304419 | Shores | Apr 1994 | A |
5305640 | Boysel et al. | Apr 1994 | A |
5311360 | Bloom et al. | May 1994 | A |
5312513 | Florence et al. | May 1994 | A |
5323002 | Sampsell et al. | Jun 1994 | A |
5324683 | Fitch et al. | Jun 1994 | A |
5325116 | Sampsell | Jun 1994 | A |
5326430 | Cronin et al. | Jul 1994 | A |
5327286 | Sampsell et al. | Jul 1994 | A |
5331454 | Hornbeck | Jul 1994 | A |
5339116 | Urbanus et al. | Aug 1994 | A |
5353114 | Hansen | Oct 1994 | A |
5358601 | Cathey | Oct 1994 | A |
5365283 | Doherty et al. | Nov 1994 | A |
5381253 | Sharp et al. | Jan 1995 | A |
5401983 | Jokerst et al. | Mar 1995 | A |
5411769 | Hornbeck | May 1995 | A |
5444566 | Gale et al. | Aug 1995 | A |
5446479 | Thompson et al. | Aug 1995 | A |
5448314 | Heimbuch et al. | Sep 1995 | A |
5450205 | Sawin et al. | Sep 1995 | A |
5452024 | Sampsell | Sep 1995 | A |
5454906 | Baker et al. | Oct 1995 | A |
5457493 | Leddy et al. | Oct 1995 | A |
5457566 | Sampsell et al. | Oct 1995 | A |
5459602 | Sampsell | Oct 1995 | A |
5459610 | Bloom et al. | Oct 1995 | A |
5461411 | Florence et al. | Oct 1995 | A |
5474865 | Vasudev | Dec 1995 | A |
5489952 | Gove et al. | Feb 1996 | A |
5497172 | Doherty et al. | Mar 1996 | A |
5497197 | Gove et al. | Mar 1996 | A |
5499037 | Nakagawa et al. | Mar 1996 | A |
5499062 | Urbanus | Mar 1996 | A |
5500635 | Mott | Mar 1996 | A |
5500761 | Goossen et al. | Mar 1996 | A |
5506597 | Thompson et al. | Apr 1996 | A |
5515076 | Thompson et al. | May 1996 | A |
5517347 | Sampsell | May 1996 | A |
5523803 | Urbanus et al. | Jun 1996 | A |
5526051 | Gove et al. | Jun 1996 | A |
5526172 | Kanack | Jun 1996 | A |
5526327 | Cordova, Jr. | Jun 1996 | A |
5526688 | Boysel et al. | Jun 1996 | A |
5530240 | Larson et al. | Jun 1996 | A |
5535047 | Hornbeck | Jul 1996 | A |
5546104 | Kuga | Aug 1996 | A |
5548301 | Kornher et al. | Aug 1996 | A |
5548329 | Klatt | Aug 1996 | A |
5550373 | Cole et al. | Aug 1996 | A |
5551293 | Boysel et al. | Sep 1996 | A |
5552568 | Onodaka et al. | Sep 1996 | A |
5552924 | Tregilgas | Sep 1996 | A |
5552925 | Worley | Sep 1996 | A |
5559358 | Burns et al. | Sep 1996 | A |
5563398 | Sampsell | Oct 1996 | A |
5567334 | Baker et al. | Oct 1996 | A |
5570135 | Gove et al. | Oct 1996 | A |
5576731 | Whitby et al. | Nov 1996 | A |
5579149 | Moret et al. | Nov 1996 | A |
5580144 | Stroomer | Dec 1996 | A |
5581272 | Conner et al. | Dec 1996 | A |
5583534 | Katakura et al. | Dec 1996 | A |
5583688 | Hornbeck | Dec 1996 | A |
5589852 | Thompson et al. | Dec 1996 | A |
5591379 | Shores | Jan 1997 | A |
5597736 | Sampsell | Jan 1997 | A |
5600383 | Hornbeck | Feb 1997 | A |
5602671 | Hornbeck | Feb 1997 | A |
5606441 | Florence et al. | Feb 1997 | A |
5608468 | Gove et al. | Mar 1997 | A |
5610438 | Wallace et al. | Mar 1997 | A |
5610624 | Bhuva | Mar 1997 | A |
5610625 | Sampsell | Mar 1997 | A |
5619059 | Li et al. | Apr 1997 | A |
5619365 | Rhoades et al. | Apr 1997 | A |
5619366 | Rhoads et al. | Apr 1997 | A |
5629521 | Lee et al. | May 1997 | A |
5629790 | Neukermans et al. | May 1997 | A |
5636052 | Arney et al. | Jun 1997 | A |
5636185 | Brewer et al. | Jun 1997 | A |
5646768 | Kaeriyama | Jul 1997 | A |
5650881 | Hornbeck | Jul 1997 | A |
5654741 | Sampsell et al. | Aug 1997 | A |
5657099 | Doherty et al. | Aug 1997 | A |
5659374 | Gale, Jr. et al. | Aug 1997 | A |
5665997 | Weaver et al. | Sep 1997 | A |
5673139 | Johnson | Sep 1997 | A |
5683591 | Offenberg | Nov 1997 | A |
5699074 | Sutherland et al. | Dec 1997 | A |
5703710 | Brinkman et al. | Dec 1997 | A |
5710656 | Goosen | Jan 1998 | A |
5726480 | Pister | Mar 1998 | A |
5739945 | Tayebati | Apr 1998 | A |
5745193 | Urbanus et al. | Apr 1998 | A |
5745281 | Yi et al. | Apr 1998 | A |
5771116 | Miller et al. | Jun 1998 | A |
5784190 | Worley | Jul 1998 | A |
5784212 | Hornbeck | Jul 1998 | A |
5793504 | Stoll | Aug 1998 | A |
5808780 | McDonald | Sep 1998 | A |
5815141 | Phares | Sep 1998 | A |
5818095 | Sampsell | Oct 1998 | A |
5825528 | Goosen | Oct 1998 | A |
5835255 | Miles | Nov 1998 | A |
5842088 | Thompson | Nov 1998 | A |
5909205 | Furuhashi et al. | Jun 1999 | A |
5912758 | Knipe et al. | Jun 1999 | A |
5936668 | Sawanobori et al. | Aug 1999 | A |
5943158 | Ford et al. | Aug 1999 | A |
5945980 | Moissev et al. | Aug 1999 | A |
5952990 | Inoue et al. | Sep 1999 | A |
5977945 | Ohshima | Nov 1999 | A |
5986796 | Miles | Nov 1999 | A |
6014121 | Aratani et al. | Jan 2000 | A |
6028690 | Carter et al. | Feb 2000 | A |
6038056 | Florence et al. | Mar 2000 | A |
6040937 | Miles | Mar 2000 | A |
6049317 | Thompson et al. | Apr 2000 | A |
6055090 | Miles | Apr 2000 | A |
6061075 | Nelson et al. | May 2000 | A |
6078316 | Page et al. | Jun 2000 | A |
6099132 | Kaeriyama | Aug 2000 | A |
6100872 | Aratani et al. | Aug 2000 | A |
6113239 | Sampsell et al. | Sep 2000 | A |
6147790 | Meier et al. | Nov 2000 | A |
6160833 | Floyd et al. | Dec 2000 | A |
6180428 | Peeters et al. | Jan 2001 | B1 |
6201633 | Peeters et al. | Mar 2001 | B1 |
6222511 | Stoller et al. | Apr 2001 | B1 |
6222518 | Ikeda et al. | Apr 2001 | B1 |
6232936 | Gove et al. | May 2001 | B1 |
6242989 | Barber et al. | Jun 2001 | B1 |
6243149 | Swanson et al. | Jun 2001 | B1 |
6252991 | Uchio et al. | Jun 2001 | B1 |
6275220 | Nitta | Aug 2001 | B1 |
6282010 | Sulzbach et al. | Aug 2001 | B1 |
6295048 | Ward et al. | Sep 2001 | B1 |
6295154 | Laor et al. | Sep 2001 | B1 |
6300921 | Moriconi et al. | Oct 2001 | B1 |
6304297 | Swan | Oct 2001 | B1 |
6307194 | Fitzgibbons et al. | Oct 2001 | B1 |
6323982 | Hornbeck | Nov 2001 | B1 |
6329973 | Hitachi et al. | Dec 2001 | B1 |
6339417 | Quanrud | Jan 2002 | B1 |
6395863 | Geaghan | May 2002 | B2 |
6424094 | Feldman | Jul 2002 | B1 |
6447126 | Hornbeck | Sep 2002 | B1 |
6465355 | Horsley | Oct 2002 | B1 |
6466354 | Gudeman | Oct 2002 | B1 |
6466358 | Tew | Oct 2002 | B2 |
6473072 | Comiskey et al. | Oct 2002 | B1 |
6473274 | Maimone et al. | Oct 2002 | B1 |
6480177 | Doherty et al. | Nov 2002 | B2 |
6484011 | Thompson et al. | Nov 2002 | B1 |
6496122 | Sampsell | Dec 2002 | B2 |
6522794 | Bischel et al. | Feb 2003 | B1 |
6545335 | Chua et al. | Apr 2003 | B1 |
6548908 | Chua et al. | Apr 2003 | B2 |
6549195 | Hikida et al. | Apr 2003 | B2 |
6549338 | Wolverton et al. | Apr 2003 | B1 |
6552840 | Knipe | Apr 2003 | B2 |
6574033 | Chui et al. | Jun 2003 | B1 |
6589625 | Kothari et al. | Jul 2003 | B1 |
6600201 | Hartwell et al. | Jul 2003 | B2 |
6606175 | Sampsell et al. | Aug 2003 | B1 |
6625047 | Coleman, Jr. | Sep 2003 | B2 |
6630786 | Cummings et al. | Oct 2003 | B2 |
6632698 | Ives | Oct 2003 | B2 |
6643069 | Dewald | Nov 2003 | B2 |
6650455 | Miles | Nov 2003 | B2 |
6666561 | Blakley | Dec 2003 | B1 |
6674090 | Chua et al. | Jan 2004 | B1 |
6674562 | Miles et al. | Jan 2004 | B1 |
6680792 | Miles | Jan 2004 | B2 |
6710908 | Miles et al. | Mar 2004 | B2 |
6737979 | Smith et al. | May 2004 | B1 |
6741377 | Miles | May 2004 | B2 |
6741384 | Martin et al. | May 2004 | B1 |
6741503 | Farris et al. | May 2004 | B1 |
6747785 | Chen et al. | Jun 2004 | B2 |
6747800 | Lin | Jun 2004 | B1 |
6762873 | Coker et al. | Jul 2004 | B1 |
6775174 | Huffman et al. | Aug 2004 | B2 |
6778155 | Doherty et al. | Aug 2004 | B2 |
6794119 | Miles | Sep 2004 | B2 |
6811267 | Allen et al. | Nov 2004 | B1 |
6819469 | Koba | Nov 2004 | B1 |
6822628 | Dunphy et al. | Nov 2004 | B2 |
6829132 | Martin et al. | Dec 2004 | B2 |
6853129 | Cummings et al. | Feb 2005 | B1 |
6855610 | Tung et al. | Feb 2005 | B2 |
6859218 | Luman et al. | Feb 2005 | B1 |
6861277 | Monroe et al. | Mar 2005 | B1 |
6862022 | Slupe | Mar 2005 | B2 |
6862029 | D'Souza et al. | Mar 2005 | B1 |
6867896 | Miles | Mar 2005 | B2 |
6870581 | Li et al. | Mar 2005 | B2 |
6870654 | Lin et al. | Mar 2005 | B2 |
6882458 | Lin et al. | Apr 2005 | B2 |
6882461 | Tsai et al. | Apr 2005 | B1 |
6912022 | Lin et al. | Jun 2005 | B2 |
6914586 | Burkhardt | Jul 2005 | B2 |
6952303 | Lin et al. | Oct 2005 | B2 |
6958847 | Lin | Oct 2005 | B2 |
7123216 | Miles | Oct 2006 | B1 |
7138984 | Miles | Nov 2006 | B1 |
7280265 | Miles | Oct 2007 | B2 |
7586484 | Sampsell et al. | Sep 2009 | B2 |
20010003487 | Miles | Jun 2001 | A1 |
20010040538 | Quanrud | Nov 2001 | A1 |
20010050666 | Huang et al. | Dec 2001 | A1 |
20020012159 | Tew | Jan 2002 | A1 |
20020015215 | Miles | Feb 2002 | A1 |
20020024711 | Miles | Feb 2002 | A1 |
20020041264 | Quanrud | Apr 2002 | A1 |
20020054424 | Miles | May 2002 | A1 |
20020075555 | Miles | Jun 2002 | A1 |
20020126364 | Miles | Sep 2002 | A1 |
20020149828 | Miles | Oct 2002 | A1 |
20020171610 | Siwinski et al. | Nov 2002 | A1 |
20020175284 | Vilain | Nov 2002 | A1 |
20020181208 | Credelle et al. | Dec 2002 | A1 |
20020186209 | Cok | Dec 2002 | A1 |
20030004272 | Power | Jan 2003 | A1 |
20030020699 | Hironori et al. | Jan 2003 | A1 |
20030043157 | Miles | Mar 2003 | A1 |
20030072070 | Miles | Apr 2003 | A1 |
20030107805 | Street | Jun 2003 | A1 |
20030112507 | Divelbiss et al. | Jun 2003 | A1 |
20030117382 | Pawlowski et al. | Jun 2003 | A1 |
20030122773 | Washio | Jul 2003 | A1 |
20030128197 | Turner et al. | Jul 2003 | A1 |
20030141453 | Reed et al. | Jul 2003 | A1 |
20030173504 | Cole et al. | Sep 2003 | A1 |
20030202264 | Weber et al. | Oct 2003 | A1 |
20030202265 | Reboa et al. | Oct 2003 | A1 |
20030202266 | Ring et al. | Oct 2003 | A1 |
20040024580 | Salmonsen et al. | Feb 2004 | A1 |
20040027324 | Furuhashi et al. | Feb 2004 | A1 |
20040051929 | Sampsell et al. | Mar 2004 | A1 |
20040058532 | Miles et al. | Mar 2004 | A1 |
20040080807 | Chen et al. | Apr 2004 | A1 |
20040125281 | Lin et al. | Jul 2004 | A1 |
20040145049 | McKinnell et al. | Jul 2004 | A1 |
20040145811 | Lin et al. | Jul 2004 | A1 |
20040147056 | McKinnell et al. | Jul 2004 | A1 |
20040147198 | Lin et al. | Jul 2004 | A1 |
20040150939 | Huff | Aug 2004 | A1 |
20040160143 | Shreeve et al. | Aug 2004 | A1 |
20040174583 | Chen et al. | Sep 2004 | A1 |
20040175577 | Lin et al. | Sep 2004 | A1 |
20040179281 | Reboa | Sep 2004 | A1 |
20040207897 | Lin | Oct 2004 | A1 |
20040209192 | Lin et al. | Oct 2004 | A1 |
20040209195 | Lin | Oct 2004 | A1 |
20040212026 | Van Brocklin et al. | Oct 2004 | A1 |
20040217378 | Martin et al. | Nov 2004 | A1 |
20040217919 | Pichl et al. | Nov 2004 | A1 |
20040218251 | Piehl et al. | Nov 2004 | A1 |
20040218334 | Martin et al. | Nov 2004 | A1 |
20040218341 | Martin et al. | Nov 2004 | A1 |
20040227493 | Van Brocklin et al. | Nov 2004 | A1 |
20040240032 | Miles | Dec 2004 | A1 |
20040240138 | Martin et al. | Dec 2004 | A1 |
20040245588 | Nikkel et al. | Dec 2004 | A1 |
20040263944 | Miles et al. | Dec 2004 | A1 |
20050001797 | Miller et al. | Jan 2005 | A1 |
20050001828 | Martin et al. | Jan 2005 | A1 |
20050002082 | Miles | Jan 2005 | A1 |
20050003667 | Lin et al. | Jan 2005 | A1 |
20050017177 | Tai et al. | Jan 2005 | A1 |
20050017942 | Tsujino et al. | Jan 2005 | A1 |
20050024557 | Lin | Feb 2005 | A1 |
20050035699 | Tsai | Feb 2005 | A1 |
20050036095 | Yeh et al. | Feb 2005 | A1 |
20050036192 | Lin et al. | Feb 2005 | A1 |
20050038950 | Adelmann | Feb 2005 | A1 |
20050042117 | Lin | Feb 2005 | A1 |
20050046922 | Lin et al. | Mar 2005 | A1 |
20050046948 | Lin | Mar 2005 | A1 |
20050057442 | Way | Mar 2005 | A1 |
20050068254 | Booth | Mar 2005 | A1 |
20050068583 | Gutkowski et al. | Mar 2005 | A1 |
20050068605 | Tsai | Mar 2005 | A1 |
20050068606 | Tsai | Mar 2005 | A1 |
20050069209 | Damera-Venkata et al. | Mar 2005 | A1 |
20050078348 | Lin | Apr 2005 | A1 |
20050168849 | Lin | Aug 2005 | A1 |
20050195462 | Lin | Sep 2005 | A1 |
20050202649 | Hung et al. | Sep 2005 | A1 |
20050219272 | Johnson et al. | Oct 2005 | A1 |
20050253820 | Horiuchi | Nov 2005 | A1 |
20060066503 | Sampsell et al. | Mar 2006 | A1 |
20060066596 | Sampsell et al. | Mar 2006 | A1 |
20060066601 | Kothari et al. | Mar 2006 | A1 |
20060077127 | Sampsell et al. | Apr 2006 | A1 |
20060139308 | Jacobson et al. | Jun 2006 | A1 |
20060151601 | Rosenfeld et al. | Jul 2006 | A1 |
20060176241 | Sampsell | Aug 2006 | A1 |
20070023851 | Hartzell et al. | Feb 2007 | A1 |
20070070028 | Zhou et al. | Mar 2007 | A1 |
Number | Date | Country |
---|---|---|
0261897 | Mar 1988 | EP |
0 584 358 | Mar 1994 | EP |
0 602 623 | Jun 1994 | EP |
0608056 | Jul 1994 | EP |
0 649 010 | Apr 1995 | EP |
0667548 | Aug 1995 | EP |
0 725 380 | Aug 1996 | EP |
0986077 | Mar 2000 | EP |
1067805 | Jan 2001 | EP |
1 134 721 | Sep 2001 | EP |
56-092494 | Jul 1981 | JP |
3109524 | May 1991 | JP |
405275401 | Oct 1993 | JP |
07-005860 | Jan 1994 | JP |
06-051721 | Feb 1994 | JP |
09-152848 | Jun 1997 | JP |
10161630 | Jun 1998 | JP |
2000-112435 | Apr 2000 | JP |
2000-352943 | May 2000 | JP |
2001-222276 | Aug 2001 | JP |
2001-242818 | Sep 2001 | JP |
2001-331146 | Nov 2001 | JP |
2002-006818 | Jan 2002 | JP |
2002-287681 | Oct 2002 | JP |
2003 044011 | Feb 2003 | JP |
2003-241720 | Aug 2003 | JP |
2003-248468 | Sep 2003 | JP |
2003-330433 | Nov 2003 | JP |
2004-029232 | Jan 2004 | JP |
2004 088349 | Mar 2004 | JP |
2004-088349 | Mar 2004 | JP |
2004-151222 | May 2004 | JP |
2004-170475 | Jun 2004 | JP |
2004-177784 | Jun 2004 | JP |
2004-205825 | Jul 2004 | JP |
157313 | May 1991 | TW |
WO 9429840 | Dec 1994 | WO |
WO 9530924 | Nov 1995 | WO |
WO 9711447 | Mar 1997 | WO |
WO 9717628 | May 1997 | WO |
WO 9844477 | Oct 1998 | WO |
WO 0025169 | May 1999 | WO |
WO 9952006 | Oct 1999 | WO |
WO 9952006 | Oct 1999 | WO |
WO 0041161 | Jul 2000 | WO |
WO 02063602 | Aug 2002 | WO |
WO 03007049 | Jan 2003 | WO |
WO 03007049 | Jan 2003 | WO |
WO 03069413 | Aug 2003 | WO |
WO 03073151 | Sep 2003 | WO |
WO 03100514 | Dec 2003 | WO |
WO 2004006003 | Jan 2004 | WO |
WO 2004026757 | Apr 2004 | WO |
WO 2004066254 | Aug 2004 | WO |
WO 2004066256 | Aug 2004 | WO |
WO 2004075526 | Sep 2004 | WO |
WO 2004095409 | Nov 2004 | WO |
Number | Date | Country | |
---|---|---|---|
20060066595 A1 | Mar 2006 | US |
Number | Date | Country | |
---|---|---|---|
60613407 | Sep 2004 | US |