The present invention is related to the subject matter of co-pending U.S. patent application entitled “Method and System for Performing Outer Loop Power Control In Discontinuous Transmission Mode,” filed concurrently herewith, Ser. No. 09/410,209, assigned to the assignee herein named. The contents of the co-pending patent application are incorporated by reference herein.
Number | Name | Date | Kind |
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6137789 | Honkasalo | Oct 2000 | A |
6219342 | Rege | Apr 2001 | B1 |
6301485 | Lee | Oct 2001 | B1 |
6373823 | Chen et al. | Apr 2002 | B1 |
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Quality Indicator Bit(FPC_MODE 100), Jul. 1999 Montreal, Samsung Electronics Co. Ltd. Park et al.* |
Jaemin Ahn et al., “Frame Error Estimation of DCCH in DTX Mode”, Samsung Electronics Co., LTD., pp. 1-11, 1999. |
Jimsoo Park et al., Quality Indicator Bit (FPC_Mode 100), Samsung Electronics Co., LTD., pp. 13, Jul. 1999 Montreal. |
Soon Young Yoon et al., Performance of P2 Gating Operation, Samsung Electronics Co., LTD., Jul. 26-30, 1999, Boulder, CO. |