BRIEF DESCRIPTION OF DRAWINGS
The features, nature, and advantages of the present application may be more apparent from the detailed description set forth below with the drawings. Like reference numerals and characters may identify the same or similar objects.
FIG. 1 illustrates a wireless communication system with base stations and access terminals.
FIG. 2 illustrates an example of transmitter structure and/or process, which may be implemented at an access terminal of FIG. 1.
FIG. 3 illustrates an example of a receiver process and/or structure, which may be implemented at a base station of FIG. 1.
FIG. 4 illustrates another embodiment of a base station receiver process or structure.
FIG. 5 illustrates a general example of power distribution of three users in the system of FIG. 1.
FIG. 6 shows an example of a uniform time-offset distribution for frame asynchronous traffic interference cancellation for users with equal transmit power.
FIG. 7 illustrates an interlacing structure used for the reverse link data packets and a forward link automatic repeat request channel.
FIG. 8 illustrates a memory that spans a complete 16-slot packet.
FIG. 9A illustrates a method of traffic interference cancellation for an example of Sequential Interference Cancellation (SIC) with no delayed decoding.
FIG. 9B illustrates an apparatus to perform the method of FIG. 9A.
FIG. 10 illustrates a receiver sample buffer after arrival of successive subpackets of an interlace with Interference Cancellation (IC) of decoded subpackets.
FIG. 11 illustrates an overhead channels structure.
FIG. 12A illustrates a method to first perform Pilot IC (PIC) and then perform Overhead IC (OIC) and Traffic IC (TIC) together.
FIG. 12B illustrates an apparatus to perform the method of FIG. 12A.
FIG. 13A illustrates a variation of the method in FIG. 12A.
FIG. 13B illustrates an apparatus to perform the method of FIG. 13A.
FIG. 14A illustrates a method to perform joint PIC, OIC and TIC.
FIG. 14B illustrates an apparatus to perform the method of FIG. 14A.
FIG. 15A illustrates a variation of the method in FIG. 14A.
FIG. 15B illustrates an apparatus to perform the method of FIG. 15A.
FIG. 16 illustrates a model of transmission system.
FIG. 17 illustrates an example response of combined transmit and receive filtering.
FIGS. 18A and 18B show an example of channel estimation (real and imaginary components) based on the estimated multipath channel at each of three RAKE fingers.
FIGS. 19A and 19B show examples of an improved channel estimate based on RAKE fingers and despreading with the data chips.
FIG. 20A illustrates a method for despreading at RAKE finger delays with regenerated data chips.
FIG. 20B illustrates an apparatus to perform the method of FIG. 20A.
FIGS. 21A and 21B show an example of estimating the composite channel using uniformly spaced samples at chipx2 resolution.
FIG. 22A illustrates a method for estimating composite channel at uniform resolution using regenerated data chips.
FIG. 22B illustrates an apparatus to perform the method of FIG. 22A.
FIG. 23 illustrates a closed loop power control and gain control with fixed overhead subchannel gain.
FIG. 24 is a variation of FIG. 23 power control and gain control with fixed overhead subchannel gain.
FIG. 25 illustrates an example of power control with fixed overhead subchannel gain.
FIG. 26 is similar to FIG. 24 except with overhead gain control.
FIG. 27 illustrates a variation of FIG. 26 with DRC-only overhead gain control.
FIG. 28 illustrates a graph of actual and reconstructed Channel Impulse Responses (CIRs).
FIG. 29A illustrates a method for iterative IC with iterative finger delay adaptation.
FIG. 29B illustrates an apparatus to perform the method of FIG. 29A.
FIG. 30 illustrates a graph of actual, reconstructed and improved CIRs.
FIGS. 31 and 32 illustrate an example and result of channel estimation with fat-paths, respectively.
FIGS. 33 and 34 illustrate an example and result of channel estimation without fat-paths, respectively.